263results about "Signal/carrier strength dependant limiting amplitude" patented technology

A headset having game, chat and microphone audio signals is provided with a programmable signal processor for individually modifying the audio signals and a memory configured to store a plurality of user-selectable signal-processing parameter settings that determine the manner in which the audio signals will be altered by the signal processor. The parameter settings collectively form a preset, and one or more user-operable controls can select and activate a preset from the plurality of presets stored in memory. The parameters stored in the selected preset can be loaded into the signal processor such that the sound characteristics of the audio paths are modified in accordance with the parameter settings in the selected preset.

A tunable filter has a plurality of variable capacitors and a plurality of inductor elements, each being formed on a common substrate, a filter circuit formed by using at least a portion of the plurality of variable capacitors and a portion of the plurality of inductor elements, a monitor circuit formed by using at least a portion of the plurality of variable capacitors and a portion of the plurality of inductor elements, a detecting circuit which detects a prescribed circuit constant of the monitor circuit, a storage which stores information relating to a reference circuit constant of the monitor circuit, and a capacitance control circuit which controls capacitance of the variable capacitors in the monitor circuit and capacitance of the variable capacitors in the filter circuit, based on a result detected by the detecting circuit and information stored in the storage.

An automatic tuning system for a magnetic field generating tuned circuit includes a processor configured to maintain the resonant frequency of a tuned circuit equal to a reference frequency. The tuned circuit is driven by a power amplifier whose output provides an amplified signal at the reference frequency. The tuned circuit includes a magnetic field generating inductor and a bank of individually switchable capacitors controlled by the processor capable of adding and removing the respective capacitances to and from the tuned circuit. The inductor includes a Faraday shield to shield the tuned circuit from the influence of electric fields. A power sense circuit monitors the power delivered by the power amplifier to the tuned circuit and the processor sequentially switches the capacitors in a binary progression format to achieve maximum power delivery indicative of conforming the resonant frequency of the tuned circuit to the reference frequency. In an alternate embodiment of the invention, the inductor includes a plurality of taps that provide individually selectable inductance values available for use in the process of conforming the resonant frequency of the tuned circuit to the reference frequency. In further alternate embodiments, the variable capacitor is in the form of a motor driven variable capacitor and the tuning sequence relies on a phase locked loop using the phase of a reference frequency signal and the phase of the inductor current as control parameters.

The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (τ), with the RC time constant (τ) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy between the RC time constant (τ) of the RC element (1) and a nominal value.

A method of estimating diaphragm excursion of an electrodynamic loudspeaker may be performed using audio signals. An audio output signal may be applied to a voice coil of the electrodynamic loudspeaker through an output amplifier to produce sound. A detected voice coil current and a determined voice coil voltage may be applied to a linear adaptive digital loudspeaker model that has a plurality of adaptive loudspeaker parameters. The parameter values of the adaptive loudspeaker parameters may be computed based on the linear adaptive digital loudspeaker model and applied to a non-linear state-space model of the electrodynamic loudspeaker. For the non-linear state-space model, a predetermined non-linear function may be applied to at least one of the plurality of received parameter values to compute at least one non-linearity compensated parameter value of the adaptive loudspeaker parameters, to determine an instantaneous excursion of the diaphragm.

A channel equalizing device and method of a digital broadcasting receiving system in which a digital broadcasting signal received over a channel is compensated for a channel distortion to recover an original signal is provided. The channel equalizing device includes: a channel estimating unit for estimating and outputting a channel impulse response of a signal, which is received over a transmission channel; a channel characteristic detecting unit for determining as to whether a channel characteristic is a dynamic channel or a static channel by using a difference between the channel impulse response estimated at a current time and outputted from the channel estimating unit and the channel impulse response estimated at a previous time; and a channel equalizing unit for controlling a parameter of an internal filter depending on the channel characteristic detected by the channel characteristic detecting unit, to compensate the received signal for the channel distortion.

An equalizer comprises a sampler, a filter, and a summer. The sampler samples a signal indicative of an input communication signal to determine digital decision output signals having a communication device data rate. The filter receives digital decision output signals from the sampler and generates equalization signals therefrom. The summer couples to the sampler and the filter and combines together the input communication signal with the equalization signals. Further, a plurality of clocks control timing associated with the sampler. These clocks have frequencies that are less than the predetermined data rate of the digital decision output signals.

A peak limiter for use in a system for amplifying a multi-carrier signal receives a baseband signal of each carrier of the multi-carrier signal. The multi-carrier signal is computationally estimated to have carriers combined in an RF band, and obtains power information of the multi-carrier signal to limit an amplitude of the baseband signal based on the power information of the estimated multi-carrier signal to thereby provide peak-limited baseband signals. Thus, the distortion generated by performing the unnecessary peak limitation can be effectively prevented to thereby improve the reliability of the entire system.

Equalization circuitry that includes an analog equalizer and a decision feedback equalizer (DFE) is provided for high-speed backplane data communication. The analog equalizer reduces the number of taps that are required by the DFE, which lessens the error propagation of the DFE. Furthermore, the DFE includes a summing circuit and flip-flop circuitry. The flip-flop circuitry may be used as part of a phase detector by clock and data recovery circuitry. The summing circuit may further be embedded into the flip-flop circuitry to reduce the feedback path delay, thereby allowing for higher speed operation. The DFE may be extended to multiple taps by including additional flip-flops.

The present invention is a hybrid RF-digital signal processor-based filter for multiband radio architectures, systems capable of spectrum re-farming and software defined radios It performs low-loss frequency agile multiple notch filtering at RF where a large dynamic range exists at a filter input between signals in a stopband and passband It is a frequency dependent signal attenuation apparatus having two paths connected together by directional couplers The first path comprising a component such as a delay component or duplexer The second path comprising, in series, a down converter, a digital filter, an up converter, and a bandstop filter At the output of a power amplifier, the invention can be used to attenuate spurs, or noise within bands with strict emission constraints At the input of a low noise amplifier, the invention can be used to attenuate blockers and transmitter noise outside of the receiver passband.

An automatic tuning scheme for two active band-pass filters where both filters operate on the signal while simultaneously being tuned using a reference signal. To allow that the amplitude of a reference signal is made small and since both filters demonstrate a good linearity the build-up of the inter-modulation distortion does not occur. The first band-pass filter is tuned with the reference falling into its pass-band. The second band-pass filter is also tuned with the reference placed into its pass-band. The reference is practically eliminated by the virtue of the complexity of the second band-pass filter. Assuming the filter passes the signal for positive frequencies if the reference is made a negative frequency by appropriate 90 degrees phase shifting it will be attenuated by at least 55 dB, which is a sufficient signal-to-reference ratio.

An adaptive equalizer with a large data rate range is provided. The equalizer comprises an equalizer core, a slicer and an automatic gain control (AGC) loop. The equalizer core is coupled to an input signal from a transmission medium and applies a transfer function to the input signal to compensate for losses incurred in the transmission medium in order to generate a core output signal. The equalizer core is also coupled to a bandwidth control signal that controls a bandwidth of the transfer function. The slicer is coupled to the core output signal and converts the core output signal to a digital output signal having a fixed digital output swing that approximates a transmission swing of the input signal prior to transmission over the transmission medium. The AGC loop is coupled to the core output signal and the digital output signal and compares the core output signal with the digital output signal in order to generate the bandwidth control signal.

A method and an apparatus for exactly and automatically adjusting the characteristics of a dielectric filter in a short time period. The characteristic parameters of a dielectric filter are measured, electric parameters of a designed equivalent circuit of the filter are calculated with the use of characteristic parameters, characteristic adjusting portions of the dielectric filter are adjusted, while at the same time, adjustment functions indicating the variation amounts of electric parameters with respect to adjusting amounts are calculated with the use of the electric parameters and the adjusting amounts which have been changed by the above adjustment. Then, in accordance with simultaneous equations involving adjustment functions, an adjusting amount is calculated with the use of a difference between a present electric parameter and a desired electric parameter, thereby effecting an adjustment which is for example 50%. By repeatedly conducting the above treatments, the characteristic parameters of the filter will be allowed to successively get closer to the desired values.

The invention relates to a variable capacitance circuit which achieves reduction in both of distortion and current consumption and furthermore achieves requirements of high power handling capability, cost reduction, and downsizing of the circuit. The variable capacitance circuit includes a first variable capacitance element unit having n pieces (where n is a natural number of two or more) of variable capacitance capacitor connected in series with respect to high frequency and in parallel with respect to direct current, each of the variable capacitance capacitors including one or more variable capacitance elements, each of which includes a dielectric layer with dielectric constant varying according to an applied direct-current voltage and a pair of electrodes sandwiching the dielectric layer therebetween, and a second variable capacitance element unit which has an applied voltage amplitude smaller than a voltage amplitude of high frequency signal applied to the first variable capacitance element unit, the second variable capacitance element unit including one piece of the variable capacitance elements or having m pieces (where m is a natural number smaller than n) of the variable capacitance elements connected.

The electrically tunable inductive device includes an electromagnet including an electromagnet core and a bias or tuning coil cooperating therewith to define opposing magnetic poles for generating a quiescent magnetic field that may be varied. An inductor is tunable based upon the variable magnetic field and includes an inductor core having a toroidal shape and fixed at a position adjacent the opposing magnetic poles of the electromagnet, and an inductor or signal coil is around at least a portion of the inductor core. The electromagnet core may include a pair of opposing legs and a bight portion therebetween defining a horseshoe shape. The inductor core may be positioned between ends of the opposing legs of the electromagnet core, and the tuning coil may surround the bight portion of the electromagnet core. The electrically tunable inductive device may have the combination of fine precision, high speed and high power handling, useful for tunable RF filters.