The invention relates to the technical field of power sources, and discloses a high-power LDO circuit without externally setting a capacitor, wherein the high-power LDO circuit provided herein is characterized in that the high-power LDO circuit is constituted of an error amplifier EA, an operational amplifier OP, two capacitors C1 and C2, three resistors R1, R2 and R3 and on N-type MOS pipe; the C2 is a built-in capacitor loaded by a gate end of Mpass of the N-type MOS pipe for reducing dominant pole frequency of a loop circuit of the LDO circuit; and at the same time, the capacitor C1 and the resistor R1 are added on an output end of the error amplifier EA to produce a zero point to offset the influence of the secondary dominant pole, thus ensuring the stability of a system. According to the invention, an internal loop circuit is set to compensate a circuit, thus ensuring that the system can still work stably without externally compensating capacitance at a large amount; and at the same time, by using the NMOS as a power device, the response speed of the system is improved, thus ensuring the output power of the LDO. The high-power LDO circuit provided herein is mainly used for supplying electricity for chips like central processing units with high performance, digital signal processors, programmable logic device and converters with high performance.