106results about How to "Improve phase margin" patented technology

The present invention provides a switching power supply circuit capable of stabilizing an output voltage as well as increasing a response speed of the output voltage by improving a phase margin of an open loop as a whole of the switching power supply circuit. The switching power supply circuit according to the present invention includes a resistor and a capacitor in addition to a configuration of a conventional switching power supply circuit. The resistor is connected between a node and the capacitor. The capacitor is connected between the resistor and another node. The resistor and the capacitor configure a phase compensation circuit. The phase compensation circuit has a cut-off frequency in accordance with a resonance frequency of an inductor and a capacitor by adjusting a resistance value of the resistor and a capacitance of the capacitor.

A motor controller of the sort having both a transformation function for transforming three-phase feedback information into two components, and then changing an error signal for each of the two components back into three-phase correction numbers is provided with an ARCTAN correction function. The ARCTAN correction function takes in the time derivative of the changing angular position of the motor rotor, and creates a correction factor that is supplied back to the transformation function for changing the two error signals back into three. By supplying this correction ARCTAN function, the control eliminates a disturbance that may have occurred in the prior art at higher frequencies wherein both of the control loops for the two components needed to come into play to correct an error on either of the two loops.

The invention relates to a delayed time processing and compensating system for wide-area damper control of an electric power system and belongs to the stability and control technical field of the electric power system; the delayed time processing and compensating system is characterized in that: the system is composed of a controlled electric power system, a feedback signal time delay circuit of the electric power system, a band-pass filter, a dephasing compensator, a time delay free wide-area damping controller and a control output signal time delay circuit which are sequentially connected in series in a closed loop way; wherein, the setting wide-area damper controlling target is that a pole point which is corresponding to the low damping low-frequency oscillation mode on a complex plane is shifted left to the condition that lambda0 is equal to sigma0 + jomega0, and then according to actually measured frequency response of the electric power system, a phaseshift link circuit is used for counteracting retarding phase produced at the low-frequency oscillation point owning to time delay of a control circuit, and the phase margin of the system is improved by the band-pass filter for making up the lost phase margin caused by phaseshift owning to time delay, thus preventing the system from losing stability. The system leads the wide-area damping controller to still keep the system stability when the size of the total time delay of the control circuit is 0ms-600ms, and the damping effect is the same as the effect without time delay.

A compensation network, comprising a resistance-capacitance network, a unit gain amplifier network and an error amplifier network, wherein an output end of the resistance-capacitance network is cascaded to an input end of the unit gain amplifier network, and an output end of the unit gain amplifier network is cascaded to an input end of the error amplifier network; the resistance-capacitance network is configured to provide a voltage divider resistance and generate a zero point and a polar point which offset one another; the unit gain amplifier network is configured to generate a zero point for offsetting one polar point in a low-pass filter network and a polar point for suppressing high-frequency noise so as to increase the phase margin of a switch power supply circuit; and the error amplifier network is configured to generate a polar point for increasing one polar point of a low-frequency gain and a zero point for offsetting the other polar point in the low-pass filter network. In addition, the present invention also relates to a switch power supply circuit comprising the compensation network and a circuit compensation method.

The invention relates to an LCL-type grid-connected inverter parallel connection virtual impedance control method. Under weak grid conditions, a parallel connection virtual impedance control method isprovided, difference is solved between grid-connected current ig and grid-connected instruction current parameters iref to obtain a signal ei, then difference is solved between the signal ei and a current signal fed back by an inverter side virtual impedance Zp(s), a and after double-current feedback control, a PWM modulating wave signal is generated to be transmitted into a PWM generator to generate a switch signal. After parallel connection virtual impedance, a system phase margin is increased, a harmonic is obviously lowered, the robustness and the interference resisting capability of thesystem are effectively improved, it is guaranteed that grid-inlet current is not greatly influenced by grid resistance, a parallel connection inverter can still normally work under the change of gridresistance wide ranges, the harmonic is small, and the applicability is good; in the dynamic response process of transforming a half load to a full load of the grid-connected virtual impedance, compared with a traditional method, the transition time is shorter, the overshooting amount is reduced, and stable running of a grid-connected inverter system is not influenced.

A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

The invention discloses a transconductance-enhanced recovery current folded MOS (metal oxide semiconductor) transistor cascade amplifier, belonging to the design field of analogue integrated circuits. The amplifier comprises a transconductance-enhanced input stage, an intermediate stage for amplifying a recovery current and a rail-to-rail output stage, wherein the transconductance-enhanced input stage is formed by four shunted PMOS (P-channel metal oxide semiconductor) transistors and four (two pairs of) PMOS transistors constituting negative resistance enhanced transconductance, and used forconverting input voltage signals into four paths of currents and multiplying transconductance of input tubes; the intermediate stage for amplifying the recovery current mainly comprises two low-voltage current mirrors and is used for realizing the amplification of the recovery current; and the rail-to-rail output stage mainly comprises two PMOS transistors and two NMOS (N-channel metal oxide semiconductor) transistors and is used for realizing the rail-to-rail output of signals. The amplifier is capable of improving the bandwidth capability by over two times under the condition of not increasing power consumption, greatly increases low-frequency gains and large-signal slew rate, improves phase margin and enhances performances of a circuit.

The invention discloses a frequency-adaptation improved resonant control method for an active power filter. Through changing the central frequency of a resonant controller in real time through a phase-locked loop, the disadvantage of narrow frequency adaptation range of an existing control method is overcame, and the frequency adaptation range is improved; according to the actual configuration, through arranging an improved resonant controller or an improved quasi resonant controller in a circuit controller, the resonant control effect is kept, and the system stability is improved; the controller is directly designed at a discrete domain, and accordingly the error due to converting to the discrete domain from a continuous domain is avoided.

Disclosed is an elastic aerial vehicle auto-disturbance-rejection attitude control method. The elastic aerial vehicle auto-disturbance-rejection attitude control method comprises the steps of, 1 designing an elastic filter; 2, designing an extended state observer (ESO) containing a displacement and speed measurement mixed elastic model; 3, designing auto-disturbance-rejection control (ADRC) ruleswith attitude motion total disturbance compensation and elastic mode inhibition. Specifically, the method comprises, when first-stage elastic mode frequency is close to the bandwidth of a control system, designing the elastic filter to filter out other elastic modes except a first-stage elastic mode to reduce loss of system stability margin and increase system phase margin; through the extended state model, rigid body signals, acquiring first-stage elastic mode signals and estimated attitude motion total disturbance; controlling the PD (proportional differential) feedback of rigid body motionstate estimated signals and the compensating part of rigid body total disturbance in the ADRC rules to achieve consistency of dynamic response and control precision of attitude motion with disturbingforces and torques such as parameter deviation, multimode elastic coupling and wind.

A reference current generating circuit applied to low operating voltage is arranged in a chip and utilizes precise reference voltage and precise external resistance to generate precise reference current. The reference current generating circuit utilizes an equivalent resistance to be connected with the external resistance in parallel, so as to provide resistance compensation and reduce the resistance from chip pad to the interior of the chip. Moderate capacitance compensation is added, phase margin of the reference current generating circuit can be improved, and the aim of stable loop is achieved, thus reducing chip area and cost in application of low operating voltage. In addition, the reference current generating circuit utilizes a current mirror to copy the reference current generated by the external resistance, so at to solve the problem that current is influenced by parallel connection of the equivalent resistance and the external resistance.

A driver circuit of the present invention comprises a differential class AB amplifier circuit which comprises: a first differential amplifier circuit configured to amplify differential input signals and output a first signal in a first voltage range; a second differential amplifier circuit configured to amplify the differential input signals and output a second signal in a second voltage range; and a class AB output circuit configured to input the first and the second signals as differential signals and amplify the differential signals, wherein the class AB output circuit comprises: a phase compensating capacitance section; and a current buffer circuit configured to control a current flowing thorough the phase compensating capacitance section.

The invention, belonging to the technical field of design of analogue integrated circuit, discloses a partial common mode feedback fully differential operational amplifier with starting circuit. The circuit comprises a basic two-stage operational amplifier main circuit, a partial common mode feedback circuit and a starting circuit; and the starting circuit comprises a state detection circuit, a reset circuit and a bias switch circuit. The partial common mode feedback fully differential operational amplifier with starting circuit can solve the problem that traditional partial common mode feedback fully differential operational amplifier cannot work normally in some applications. The starting circuit can detect non normal working state of the circuit, and the reset circuit makes the operational amplifier come to normal working state. The bias switch circuit in the starting circuit can avoid competition between the reset circuit and the fixed bias load tube in the partial common mode feedback circuit in the circuit starting process. The partial common mode feedback fully differential operational amplifier with starting circuit is suitable for the circuit having need of using the fully differential operational amplifier.

The invention discloses a high-input-voltage double-loop stable linear voltage regulator. The linear voltage regulator comprises an error amplification unit (1), an overcurrent protection unit (2), acompensation circuit unit (3), a secondary amplification unit (4), a current sampling unit (5), a first PMOS transistor P1 and a second PMOS transistor P2. The error amplification unit (1) is used forcompleting conversion from double-end input to single-end output; the overcurrent protection unit (2) is used for realizing an over-current protection function; the compensation circuit unit (3) is used for ensuring the stability of a loop under various loads; and the secondary amplification unit (4) is used for converting the output of an error amplifier into two paths of control signals relatedto the power supply voltage. There are an error amplification unit main loop and an over-current protection loop, the two loops are both provided with frequency compensation circuits, and frequency compensation does not interfere with each other. The voltage regulator is suitable for a power supply environment with high power supply voltage and a large load change range.

The invention relates to a design method of a digital power supply loop compensator based on PIDalpha, thereby controlling the output voltage of a digital power supply stably, accurately and quickly.The method comprises the following steps: (1), drawing a digital power supply main power transfer function Bode diagram based on simulation software; (2), designing an analog two-zero-point two-pole compensator with the same zero and pole types as the PIDalpha digital loop compensator, and drawing a compensator Bode diagram; (3), converting the analog two-zero-point two-pole compensator in an s domain into a PID alpha digital loop compensator in a z domain; (4), carrying out programming based on structural characteristics of a PIDalpha digital loop compensator algorithm to realize functions; and (5), debugging the functions of the PIDalpha digital power supply loop compensator by a prototype experiment. According to the design method provided by the invention, a loop compensator with excellent performance can be designed for the digital power supply to realize stable, accurate, rapid controlling of the output voltage of the digital power supply.

The invention relates to a liquid floated pendulum type accelerometer temperature control model parameter identification method. According to the liquid floated pendulum type accelerometer temperature control model parameter identification method, a liquid floated pendulum type accelerometer temperature control model is revised into a first-order delay inertia model from a first-order inertial model, and an optimal sample space-based parameter identification method is put forward, and a relative residual error (SL) is constructed so as to be adopted as a regression model for liquid floated pendulum type accelerometer temperature control model parameter identification; an optimal sample space is obtained through conditional judgment and iterative calculation, so that high-accuracy identification of a time constant tau of a pure delay link and a time constant T of a first-order inertia link can be realized, and a basis can be provided for liquid floated pendulum type accelerometer temperature control system PID control parameter design, and the temperature control accuracy of a liquid floated pendulum type accelerometer can be increased, namely, the temperature control accuracy can be increased from a range (-1 DEC C, 1 DEC C) which is realized when the first-order inertial model is adopted to a range (-0.006 DEC C,+0.006 DEC C) which is realized when the first-order delay inertia model is adopted, and high-accuracy use requirements of the liquid floated pendulum type accelerometer can be satisfied.

The invention discloses an inter-satellite coherent light communication system based on composite axis phase locking, which can be applied to an inter-satellite light communication system with large-range and high-speed change of signal light frequency, and achieves real-time tracking of a local oscillator light phase to a received signal light phase by using a mode of combining laser temperaturetuning and external tuning. According to the inter-satellite coherent light communication system, a receiving end takes a field programmable gate array (FPGA) as a digital signal processor to realizethe extraction of a phase error signal, signal light and a local oscillation light frequency difference signal, and a local oscillator light temperature tuning port is driven to realize frequency unloading according to the signal light and the local oscillation light frequency difference signal. The inter-satellite coherent light communication system has the advantages that the features of wide range and low bandwidth of temperature tuning are combined with the features of narrow range and high bandwidth of external tuning; in the initial phase locking stage, rapid loop entry is achieved through temperature scanning, and after phase locking, the system can be guaranteed to keep stable operation of a loop in large-range frequency drift caused by the Doppler effect through real-time unloading of the frequency of temperature tuning; and the inter-satellite coherent light communication system can realize inter-satellite high-sensitivity homodyne coherent light communication.

The invention discloses a blood oxygen detection chip with fast light intensity tracking capability. Illumination is received by a light current buffer to generate an output light current iph which isnot affected by the leakage current as much as possible, a band-gap reference voltage source and a linear voltage regulator are mainly used for obtaining an accurate adjustable reference voltage Vref, an integrator integrates the light current iph to obtain a voltage signal having a linear relationship with the size of the light current, a pulse generator converts the voltage signal into a frequency signal, and finally the waveform is shaped by an output buffer to obtain a final output frequency signal Freq having a linear relationship with the light intensity; meanwhile, in order to ensure that a light frequency sensor has a response speed fast enough to the change of the light intensity, an amplifier A2 in the integrator adopts a three-stage broadband differential amplifier structure under a high capacitive load condition; and the second stage uses a PMOS transistor connected with a diode to serve as a payload, and a negative zero point is introduced by a single-loop resistance-capacitance Miller compensation scheme to improve the phase margin.

The invention discloses a feedback compensation circuit based on variable zero and a switching power supply applying the feedback compensation circuit. The feedback compensation circuit comprises a first error amplifier, a second error amplifier, a compensation capacitor and a compensation resistor, wherein the first polar end of the first error amplifier and the first polar end of the second error amplifier are respectively used for receiving a first signal; the second polar end of the first error amplifier and the second polar end of the second error amplifier are respectively used for receiving a second signal; the compensation capacitor is serially connected between the output end of the first error amplifier and the output end of the second error amplifier; a compensation voltage is formed at the output end of the first error amplifier; one end of the compensation resistor is connected with the output end of the second error amplifier, and the other end of the compensation resistor is in ground connection; the first error amplifier is provided with a variable bias current source, and a direct proportion relationship is formed between the transconductance of the first error amplifier and the size of the variable bias current source. The feedback compensation circuit can adaptively adjust the zero, so that the phase margin is improved, and the stability of the system is guaranteed.