594 results about "External resistor" patented technology

A PFC-PWM controller with a power saving means is disclosed. A built-in current synthesizer generates a bias current in response to feedback voltages sampled from the PWM circuit and the PFC circuit. The bias current modulates the oscillation frequency to further reduce the switching frequencies of the PWM signal and the PFC signal under light-load and zero-load conditions. Thus, power consumption is greatly reduced. The PFC and the PWM switching signals interleave each other, so that power can be transferred more smoothly from the PFC circuit to the PWM circuit. The saturation of the switching components can be avoided by limiting the maximum on-time of the PWM signal. Further, an external resistor is used to start up the PFC-PWM controller and provide an AC template signal for PFC control.

A FinFET device and a method of lowering a gate capacitance and extrinsic resistance in a field effect transistor, wherein the method comprises forming an isolation layer comprising a BOX layer over a substrate, configuring source / drain regions above the isolation layer, forming a fin structure over the isolation layer, configuring a first gate electrode adjacent to the fin structure, disposing a gate insulator between the first gate electrode and the fin structure, positioning a second gate electrode transverse to the first gate electrode, and depositing a third gate electrode on the fin structure, the first gate electrode, and the second gate electrode, wherein the isolation layer is formed beneath the insulator, the first gate electrode, and the fin structure. The method further comprises sandwiching the second gate electrode with a dielectric material. The fin structure is formed by depositing an oxide layer over a silicon layer.

A temperature compensation circuit according to an embodiment of the present invention includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region in which a temperature is lower than a predetermined temperature, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region in which the temperature is equal to or greater than the predetermined temperature, and a transistor having a control terminal supplied with the bias current. The bias circuit includes a first current generating circuit configured to generate a first current increasing in proportion to the absolute temperature, a second current generating circuit configured to generate a second current that does not flow in the low-temperature region and flows in the high-temperature region, and a control circuit configured to control the second current and having a connection terminal capable of being connected with an external resistor for adjusting a magnitude of the second current, and is configured to generate a third current by adding the first current to the second current, and output the bias current depending on or equal to the third current.

Variations of the impedance of each output driver of a semiconductor device can be reduced, and high-speed calibration is achieved. A calibration circuit including a replica circuit having the same configuration as each pull-up circuit or pull-down circuit included in an output driver of a semiconductor device is provided within a chip. During a first calibration operation, the replica circuit is provided with voltage conditions that allow the maximum current to flow through the output driver so that an impedance of the replica circuit is equal to a value of an external resistor. During a second calibration operation, table parameters obtained in the first calibration operation are used to adjust the impedance of the output driver without use of the replica circuit.

A semiconductor device includes an output impedance control circuit, connected to a ZQ pad and an output buffer circuit, for controlling an impedance of the output buffer circuit according to an impedance of an external resistor connected with the ZQ pad.

A FinFET device and a method of lowering a gate capacitance and extrinsic resistance in a field effect transistor, wherein the method comprises forming an isolation layer comprising a BOX layer over a substrate, configuring source / drain regions above the isolation layer, forming a fin structure over the isolation layer, configuring a first gate electrode adjacent to the fin structure, disposing a gate insulator between the first gate electrode and the fin structure, positioning a second gate electrode transverse to the first gate electrode, and depositing a third gate electrode on the fin structure, the first gate electrode, and the second gate electrode, wherein the isolation layer is formed beneath the insulator, the first gate electrode, and the fin structure. The method further comprises sandwiching the second gate electrode with a dielectric material. The fin structure is formed by depositing an oxide layer over a silicon layer.

Provided is an electrical energy storage device including an electrode winding body, which includes a positive electrode generating electrons by oxidation and reduction, a negative electrode for absorbing the generated electrons, and separation layers for physically separating the negative electrode from the positive electrode, which are sequentially wound around a winding core, and an electrolyte provided between the positive electrode and the negative electrode, the electrical energy storage device including: a terminal plate for externally connecting the electrode winding body to an external electrode connecting member such as an external resistor; a cylindrical can for accommodating the electrode winding body connected to the terminal plate; and a conductive interconnecting member for connection between the terminal plate and polarity-leads on one side of the electrode winding body by a method selected from the group consisting of plasma-spraying, welding, soldering and adhesion using a conductive adhesive material. According to the present invention, in which an interconnecting member for reducing a difference in thickness between objects to be welded is employed, it is possible to prevent welding failure between the polarity-leads of the electrode winding body and the terminal plate, thereby improving high-rate discharge (large current discharge) efficiency.

Techniques are provided for controlling an on-chip termination resistance in an input or output (IO) buffer using a calibration circuit. The calibration circuit monitors the voltage between an external resistor and a group of on-chip transistors. When voltage between the external resistor and the group of transistors is within a selected range, the calibration circuit causes the effective resistance of the transistors to match the resistance of the external resistor as closely as possible. The calibration circuit enables another set of transistors in the IO buffer so that the effective on resistance of the transistors in the IO buffer closely match the resistance of the external resistor.

Switching circuits with reduced insertion loss. A first MOS element of a first conductive type is disposed in a substrate of a second conductive type, and comprises a first terminal coupled to an output / input terminal, a second terminal coupled to an antenna element, a control terminal coupled to a control signal, and a bulk terminal coupled to a first voltage through an external resistor. A deep well region of the first conductive type is disposed in the substrate, separating the first MOS element from the substrate.

Disclosed herein is a flexible display device having a bending sensing device configured such that an external resistor is mounted in the flexible display device together with a bending sensor, whereby it is possible to lower an output offset voltage, to reduce resistance deviation depending on temperature change, and to sense twisting of the flexible display device. The bending sensing device includes at least one bending sensor mounted in a bending region of a film (layer) that is tensioned and / or a film (layer) that is compressed when the flexible display device, including a plurality of films (layers), is bent and at least one reference resistor mounted in a non-bending region of the film (layer) that is tensioned and / or the film (layer) that is compressed.

A voltage-dividing circuit 60, which is formed of serially connected voltage-dividing resistors R1, R2, R3, is disposed between the source terminal S of a power MOSFET 15 and the ground. The divided voltage Va at a connecting point A is applied to one of the input terminals of a comparator 62, while the divided voltage Vb at a connecting point B is applied to one of the input terminals of a comparator 64. The other input terminals of the comparators 62, 64 are connected to the connecting line between an external terminal P4, to which an external resistor 12 is connected, and an FET 30.

An impedance adjusting circuit includes: a first calibration resistor circuit configured to be calibrated with an external resistor and generate a first calibration code; a second calibration resistor circuit configured to be calibrated with the first calibration resistor circuit and generate a second calibration code, the second calibration resistor circuit being connected to a first node; and a transmission line circuit configured to be responsive to a control signal to connect the first node to a pin of a system employing the impedance adjusting circuit.

The invention provides a method for constructing a dual-chamber microbial fuel cell (MFC)-type BOD (biochemical oxygen demand) sensor by using potassium permanganate as cathode electron acceptor, which belongs to the field of waste water quality monitoring. The method specially comprises the steps of constructing a dual-chamber MFC reactor; enriching electricigenic microorganisms on an MFC anode plate, and adjusting an external resistor to obtain maximum MFC output power; respectively adding different concentrations of artificial sewage and potassium permanganate solution into an anode chamber and a cathode chamber of the MFC, calculating the generated electricity of the MFC corresponding to different BOD concentrations according to MFC output current and detection time; and processing the generated electricity and BOD by linear fitting to obtain a sensor detection limit and a linear equation. After a to-be-tested solution with unknown BOD value is added into the anode chamber of the MFC, the generated electricity of the MFC is calculated according to the MFC output current and the detection time; and the BOD value of the to-be-tested solution can be calculated according to the known linear equation. The MFC-type BOD sensor using potassium permanganate as cathode electron acceptor has the advantages that the BOD detection range is widened to be 500mg / L; the detection time is shortened by 50% or more; and the detection relative error is less than 10%. Accordingly, the MFC-type BOD sensor has a high application value.

A PFC-PWM controller with a power saving means is disclosed. A built-in current synthesizer generates a bias current in response to feedback voltages sampled from the PWM circuit and the PFC circuit. The bias current modulates the oscillation frequency to further reduce the switching frequencies of the PWM signal and the PFC signal under light-load and zero-load conditions. Thus, power consumption is greatly reduced. The PFC and the PWM switching signals interleave each other, so that power can be transferred more smoothly from the PFC circuit to the PWM circuit. The saturation of the switching components can be avoided by limiting the maximum on-time of the PWM signal. Further, an external resistor is used to start up the PFC-PWM controller and to provide an AC template signal for PFC control.

On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on / off in response to a calibration code set, a current mirror configured to mirror currents of the first node and the second node and a code generator configured to generate a calibration code set according to the mirrored currents. In accordance with a method for calibrating an on die termination circuit of the present invention, the method includes a step of mirroring a current of a first node connected to an external resistor and a current of a second node connected to a plurality of calibration resistors and a step of generating a calibration code set according to the mirrored currents.

Using relatively inexpensive, external resistor networks, an electronic device, such as an FPGA, can be configured to use non-MIPI interfaces to communicate with one or more MIPI-compliant devices, such as video sources (e.g., cameras) and sinks (e.g., displays). High-speed (HS) and low-power (LP) MIPI signaling for each MIPI clock / data lane is supported by a set of one or more non-MIPI interfaces, such as LVDS and / or LVCMOS receivers, transmitters, and / or transceivers, and an appropriate, corresponding, external resistor network. For configurations in which the resistor-configured electronic device can handle high-speed MIPI data from a MIPI-compliant device, the electronic device can detect transitions in the MIPI mode of the MIPI-compliant device. In some configurations, the resistor-configured electronic device can provide high-speed MIPI data to a MIPI-compliant device. In either case, the electronic device configures the non-MIPI interfaces to support the current MIPI HS / LP mode.

The present disclosure proposes a fully integrated accurate LED output current controlling circuit and method, which can be seamlessly combined with true PWM dimming. The current controlling circuit has an auto zero function in the light-emitting diode driver to eliminate offsets caused by the system, process variations, parasitic effects, dimming and so on in an LED driver application, and thus is capable of controlling the LED current with high accuracy. Moreover, the driver of the present disclosure does not require the use of external components such as an external resistor to regulate current accuracy.

The invention provides an input undervoltage protecting circuit of a switching power supply controller. The input undervoltage protecting circuit of the switching power supply controller comprises a current detection circuit, a reference voltage generating circuit, an undervoltage protecting signal generating circuit and a pulse outputting control circuit. The current detection circuit comprises a controller internal resistor R2 and a controller external resistor R1, and the resistance value of the R2 is far smaller than that of the R1. The reference voltage generating circuit comprises an internal resistor R3 and a reference current source Iref, and the R3 and the R2 are resistors of the same type in the controller. The undervoltage protecting signal generating circuit comprises a comparator comp. A protecting point input voltage Vin(p) meets the formula (please see the formula in the specification). When the input voltage Vin of a switching power supply drops to be lower than the protecting point input voltage Vin(p), the output end UVP of the comparator comp generates undervoltage protecting signals to control the pulse outputting control circuit to cut off pulse output of GATE pins of the controller. According to the input undervoltage protecting circuit of the switching power supply controller, the peripheral circuits of the controller are simplified, the loss is small, meanwhile, the precision of input undervoltage protecting is high, and process bias is small. The invention further provides an input undervoltage protecting circuit with feed-forward compensation, the feed-forward compensation current Icom is in proportion to input voltages, the precision is high, and the process bias is small.

Improved digital to analog converter (DAC) circuitry incorporating the ability to utilize a single DAC to generate either voltage or current outputs, and the ability to digitally adjust the gain and offset. Previous digital to analog circuitry has been limited to a single type of analog output per DAC and to the use of external precision resistors to set the gain and offset for a single DAC, or a group of DACs. By utilizing the same on-chip circuitry to supply both types of outputs, chip area, power consumption and cost is reduced while offering more flexibility to the customer. The ability to digitally adjust the gain and offset for a group of DACs eliminates the cost of external resistors, lowers the board area, and lowers the assembly cost for the end product. In addition, since gain and offset can be adjusted dynamically, maximum flexibility is provided to the customer. Digital adjustment of gain and offset can be used to calibrate for chip and system errors, and can allow more exact adjustment and external precision resistors.

The invention relates to a sensor signal amplifying and conditioning circuit which comprises an instrument amplifier, a same-phase scale amplifier and a voltage follower, wherein the input end of the instrument amplifier is connected with a differential input signal; the voltage follower inputs the reference voltage into the reference voltage end of the instrument amplifier; the output signal of the instrument amplifier is accessed to the same-phase input end of the same-phase scale amplifier; the reverse-phase input end of the same-phase scale amplifier is used as a gain adjusting end; and the output end of the same-phase scale amplifier is used as the output end of the whole sensor signal amplifying and conditioning circuit. The invention is used for amplifying the small differential signal sent by the sensor and converting the differential signal into the single-end signal output to the reference end. By arranging the external resistor, the invention can realize zero-point and gain adjustment, extend the application range, and complete the impedance matching through the voltage follower.

A calibration circuit of an on-die termination device includes a code generating unit configured to receive a voltage of a calibration node connected to an external resistor and a reference voltage to generate pull-up calibration codes. The calibration circuit also includes a pull-up calibration resistor unit configured to pull up the calibration node in response to the pull-up calibration codes. The pull-up calibration resistor unit is calibrated such that its resistance becomes higher as a power supply voltage increases.

The invention provides a device and a method for regulating the working frequency of a voltage reduction switching circuit through current detection. The device comprises a current detection circuit, a variable module and a controller. The current detection circuit is used for judging the output load state of the voltage reduction switching circuit through the detection of the size of current flowing out from the voltage reduction switching circuit and outputting a control signal for regulating the working frequency of the voltage reduction switching circuit according to the load state. The variable module is coupled with the voltage reduction switching circuit and is used for providing an external resistor for the voltage reduction switching circuit. The controller is coupled to a current monitoring module and the variable module and is used for receiving the control signal and regulating the resistance value of the variable module according to the control signal so as to regulate the working frequency of the voltage reduction switching circuit. The device and the method can reduce loss of the voltage reduction switching circuit.

On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on / off in response to a calibration code set, a current mirror configured to mirror currents of the first node and the second node and a code generator configured to generate a calibration code set according to the mirrored currents. In accordance with a method for calibrating an on die termination circuit of the present invention, the method includes a step of mirroring a current of a first node connected to an external resistor and a current of a second node connected to a plurality of calibration resistors and a step of generating a calibration code set according to the mirrored currents.

An RC oscillator integrated circuit includes: an active current mirror connected to an external resistor, for receiving a current signal corresponding to a voltage signal applied to the external resistor, performing 1 / N-times division of the received current signal according to an input clock signal, and generating a 1 / N-times current signal; an oscillation circuit for generating an output voltage corresponding to a charging- or discharging-operation of a capacitor via a current path formed by the active current mirror; a feedback switching circuit for controlling a charging- or discharging-path of the capacitor by a feedback of an output signal Vo of the oscillation circuit; and a divider for generating not only a first clock signal capable of driving the active current mirror according to the output signal of the oscillation circuit, but also a second output clock signal having a compensated mismatch of the active current mirror.

The present invention provides an apparatus for adjusting a working frequency of a VRD. The apparatus includes a current detecting circuit, a variable resistance module, and a controller. The current detecting circuit is adapted for determining an output load state of the VRD by detecting a value of a current outputting from the VRD, and outputting a control signal for adjusting the working frequency of the VRD according to the output load state of the VRD. The variable resistance module is coupled to the VRD, and is adapted for providing an external resistor to the VRD. The controller is coupled to the current detecting circuit, and is adapted for receiving the control signal, and adjusting a resistance of the variable resistance module, so as to adjust the working frequency of the VRD.

The invention relates to a brightness adjustment method and system for LED display screens. The method comprises the following steps: determining current corresponding to each point through the brightness of each point, determining benchmark reference current corresponding to each point through the current corresponding to each point, and therefore adjusting the brightness of the LED display screen according to the benchmark reference current corresponding to each point. The current output peak value of a constant-current drive circuit is adjustable, and the adjustment benchmark value is set by an external resistor and is not limited by the external resistor. The overall brightness adjustment overall brightness tends to the selected standard brightness conforming to the requirement of the display screen, and the overall brightness overall brightness cannot be reduced. The method does not need to independently reply on current pulse width adjustment, and the gray-scale sacrifice is reduced, that is, under the conditions of sacrificing less gray scales and preventing display brightness reduction, the adjustment for the brightness consistency of the LED display screen is realized.

The invention relates to a method and device for restoring petroleum-polluted soil through composting by enhancing microbial fuel cells, belonging to the field of environment friendliness. The method comprises the steps of smashing kitchen wastes, then, mixing the kitchen wastes with smashed rice hull, hypsizigus marmoreus composts and rice bran according to a certain proportion, and naturally fermenting to obtain a composting product; mixing the composting product and the petroleum-polluted soil, placing the mixture into a composting tank, arranging the microbial fuel cells, and carrying out composting treatment in a natural environment. Anodes of the microbial fuel cells are distributed in the center of the composting tank, and cathodes are distributed on two side walls of the composting tank; an external resistor is connected between the anodes and the cathodes to form a closed circuit. Through enhancing the microbial fuel cells, the degradation of petroleum pollutants can be accelerated, the time for treating polluted soil can be shortened, and the degradation of microorganisms to low-concentration petroleum hydrocarbon at the later period of composting treatment can be promoted; the composting product is inoculated to the soil, so that not only can alkanes and polyaromatic hydrocarbons in the petroleum pollutants be degraded, but also the odor generated in a compacting process can be eliminated.

A voltage regulator is described which uses external resistors to set a load line and offset. During initial operation and also during normal operation the load line and offset are reset by placing, for instance, the microprocessor in a high active state, low active state and in a sleep mode. By dynamically changing the load line and offset voltage, minimum current is drawn thus extending battery life.

The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on / off without a floating voltage source or a negative voltage source.