Very
low resistance, scaled in
MOSFET devices are formed by employing thin silicidation-stop extension that act both as a silicidation “stop” barriers and as thin interface
layers between source / drain
silicide regions and channel region of the
MOSFET. By acting as silicidation stops, the silicidation-stop extensions confine silicidation, and are not breached by source / drain
silicide. This permits extremely thin, highly-doped silicidation-stop extensions to be formed between the
silicide and the channel, providing an essentially ideal, low series resistance interface between the silicide an the channel. On an appropriately prepared substrate, a selective
etching process is performed to
expose the sides of the channel region (
transistor body). A very
thin layer of a silicidation-stop material, e.g., SiGe, is disposed in the etched away area,
coating the exposed sides of the channel region. The silicidation-stop material is doped (highly) appropriately for the type of
MOSFET being formed (n-channel or p-channel). The etched away areas are then filled with
silicon, e.g., by an Si epi process. Silicidation is then performed (to form, e.g., CoSi2) on the newly filled areas. The silicidation stop material constrains silicidation to the
silicon fill material, but prevents silicide expansion past the silicidation stop material. Because the
germanium (Ge) in SiGe is insoluble in CoSi2, the SiGe acts as a barrier to silicidation, permitting silicidation to go to completion in the Si fill but stopping silicidation at the SiGe boundary when silicidation is performed at a temperature above a silicidation
threshold temperature for Si, but below a silicidation
threshold temperature for SiGe. This results in a very compact, well-defined lateral junction characterized by a
thin layer of SiGe disposed between silicide lateral extensions and the sides of the channel region. Because of the thin, highly-doped SiGe layer between the channel and the silicide lateral extensions, the extension resistance is very low.