207results about How to "Reduce current" patented technology

A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The method and system include providing a first pinned layer, a barrier layer, a free layer, a conductive nonmagnetic spacer layer, and a second pinned layer. Each pinned layer has a pinned layer easy axis. At least a portion of the pinned layer easy axis is in a perpendicular direction. The barrier layer resides between the first pinned layer and the free layer. The spacer layer is between the free layer and the second pinned layer. The free layer has a free layer easy axis, at least a portion of which is in the perpendicular direction. The magnetic element is also configured to allow the free layer to be switched due to spin transfer effect when a write current is passed through the magnetic element. Because of the perpendicular magnetization(s), the writing current for spin transfer may be significantly reduced.

Disclosed is a method for manufacturing a photoelectric converter wherein a lower electrode layer, a compound semiconductor thin film having a chalcopyrite structure which serves as a light absorptive layer and a light-transmitting electrode layer that are laminated to form layers are each patterned by photolithography, thereby minimizing damages to the crystals of the compound semiconductor thin film.

In a power switching circuit, a second commutation member has a second commutation path electrically connected in parallel to a first commutation path and a second diode provided in the second commutation path and electrically connected antiparallel to a semiconductor switching element. While the semiconductor switching element is off, the second commutation path allows a second current based on the inductive load to flow therethrough in a forward direction of the second diode within a commutation period. The second diode has a second reverse recovery time shorter than a first reverse recovery time of the first diode. A second inductance of the second commutation path is higher than a first inductance of the first commutation path.

A personal portable power distribution apparatus including a portable central power source, a power management module coupled to receive power from the central power source, and a harness assembly having at least one power supply node for distributing power from the power management module, wherein the power management module is operable to control supply of power through each individual power supply node, each power supply node terminating in a like connector, and an adaptor module is fitted to a power input terminal of an electronic accessory device to adapt the device for operation with the power distribution apparatus by providing a corresponding connector suitable for interconnection with said like connector(s).

There is provided a thermally assisted magnetic recording device capable of preventing collision between a thermally assisted magnetic recording head and a disk due to thermal deformation of a near-field transducer. The thermally assisted magnetic recording device includes a temperature sensor for measuring the temperature in the vicinity of the near-field transducer, a table that stores the relationship between temperature and deformation in the vicinity of the near-field transducer, and a control unit. The control unit calculates the deformation in the vicinity of the near-field transducer, from the temperature measured by the temperature sensor and the relationship between temperature and deformation stored in the table. Then, the control unit drives the flying height control actuator according to the calculated deformation to control the distance between the thermally assisted magnetic recording and the disk in order to avoid contact between them.

A battery pack includes a battery including a positive electrode and a negative electrode, a switching module including a charge switching device and a discharge switching device, the charge switching device and discharge switching device being electrically connected to a high current path of the battery, a battery management unit (BMU) electrically connected to the switching module, the BMU being configured to adjust a limit value for a charging current supplied by the charge switching device and to set a magnitude of the charging current supplied by the charge switching device to be equal to or less than the adjusted.

In a system that receives power from an electric power grid, a variable frequency AC drive has an output connected to an AC electric motor, and an input connected to the power grid. The motor is in 1 connection with a load, and the AC drive includes an active converter having a predetermined maximum apparent power capacity. The converter is coupled to a controller programmed to regulate reactive power generation and consumption of the variable frequency AC drive so that the drive produces reactive power when the converter is utilizing less than its maximum apparent power capacity. This reactive power is fed to the power grid. A device monitors current and voltage in the power grid and calculates power factor, which is then used as a feedback to an external controller that generates a reactive power reference signal intended to control the system's power factor. The controller is programmed to respond to the signal, controlling power generation and consumption so that the combination of reactive power and real power does not result in apparent power exceeding the maximum capacity of the active converter and avoids generating reactive power that would result in a leading power factor for the system.

A battery system includes a battery unit in which battery arms are connected in parallel, and a charge/discharge control device that controls charge/discharge of the battery unit. Each of the battery arms includes: a battery composed of one or more battery cells connected in series; a switch connected in series to the battery; and a battery monitoring device that, in a case of having detected abnormality of the battery, opens the switch to thereby isolate the battery arm including the abnormal battery, and sends a switch opening signal indicating that the switch has been opened to the charge/discharge control device. The charge/discharge control device performs a control to reduce a charge/discharge current or charge/discharge power of the battery unit when the switch opening signal is sent from the battery monitoring device of the battery unit to the charge/discharge control device.

A phase change random access memory (PRAM), and a method of operating the PRAM are provided. In the PRAM comprising a switching element and a storage node connected to the switching element, the storage node comprises a first electrode, a second electrode, a phase change layer between the first electrode and a second electrode, and a heat efficiency improving element formed between the first electrode and the phase change layer. The heat efficiency improving element may be one of a carbon nanotube (CNT) layer, a nanoparticle layer, and a nanodot layer, and the nanoparticle layer may be a fullerene layer.

A switching power supply includes a switching element connected to a power supply voltage and performs ON and OFF operation; a control circuit; a coil; a capacitor connected to the coil and performs a rectifying operation with the coil; an oscillator to output an oscillator signal to the control circuit; a first comparator for comparing a current detection voltage which transforms a detection current flowing through the coil into a voltage, and the feedback voltage according to a difference of a voltage according to an output voltage with a reference voltage; and a second comparator for comparing a deep threshold voltage set as a value higher than the current detection voltage and is lower than the power supply voltage, with the feedback voltage. A Deep Simple Light Load Mode control is introduced to improve efficiency in a light or no-load area in addition to PWM mode in a heavy loading.

A 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.

The present invention relates to a non-volatile memory cell for storage of a data item in an integrated circuit, comprising a resistive memory element which may have different conductance states depending on the stored data item, a memory unit for passing the stored data item to an integrated circuit, a read unit which can be activated in order to pass a data item on for storage in the memory unit as a function of the conductance state of the memory element, a control unit in order to activate the read unit so that the data item to be passed on is stored in the memory unit, and in order to deactivate the read unit after storage of the data item in the memory unit, such that the memory element is isolated from the memory unit.

In one embodiment, a switching mode power supply (SMPS) may comprise: a power supply for supplying power to a secondary coil of a transformer according to an operation of a main switch, the main switch being coupled to a primary coil of the transformer; a feedback circuit for generating a feedback voltage corresponding to an output voltage; a control module for stopping the main switch when the feedback voltage is lower than a reference voltage in a standby operation mode; an integrated circuit (IC) power unit for generating a constant voltage, the IC power supply being coupled to the secondary coil of the transformer; and a current generator for using the constant voltage to generate a plurality of constant currents for operating a plurality of ICs, and generating a constant current from among the constant currents when the main switch performs no switching on/off operation.

A layout pattern of a static random access memory, including a first inverter and a second inverter constituting a latch circuit. A first inner access transistor, a second inner access transistor, a first outer access transistor and a second outer access transistor are electrically connected to the latch circuit, wherein the first outer access transistor has a first gate length, the first inner access transistor has a second gate length, and the first gate length is different from the second gate length.

The invention discloses an overcurrent protection circuit for a low dropout linear voltage regulator. The overcurrent protection circuit for the low dropout linear voltage regulator comprises a current sampling circuit, a current comparison circuit and an upward pull circuit, wherein the current sampling circuit samples gate-drain voltage of a power tube of the low dropout linear voltage regulator, and outputs a sampling current to the current comparison circuit, the current comparison circuit mirrors the sampling current through a current mirror, and then compares the sampling current with a current of a current source, and after output current value of the low dropout linear voltage regulator exceeds current protection threshold value, control voltage output by the current comparison circuit powers on the upward pull circuit, and the upward pull circuit pulls up gate end voltage of the power tube of the low dropout linear voltage regulator, and thereby limits increasing of the output current, and plays a part in overcurrent protection. The overcurrent protection circuit for the low dropout linear voltage regulator can effectively restrain channel length modulation effects of a current sampling tube in the current sampling circuit, decreases occurrence rate of the problem that deviation between value of the current sampled by the current sampling circuit and ideal value is overlarge, improves current sampling accuracy of the overcurrent protection circuit, and obtains accurate starting threshold value of the overcurrent protection circuit.

Methods and apparatus for designing and producing programmable logic devices are provided. A logic design system may be used to analyze various implementations of a desired logic design for a programmable logic device integrated circuit. The logic design system may be used to produce configuration data for the programmable logic device in accordance with an optimized implementation. A logic circuit for a programmable logic device can be analyzed by taking into account the effects of hotspots, power supply voltage drops, and signal congestion on device performance. By modeling the performance of transistors and other components using position-dependent and signal-dependent variables such as temperature, voltage, and capacitance, the effects of congestion on device performance can be characterized and an optimum implementation of the logic design in a programmable logic device can be obtained.

A processor controlled charging platform/arrangement, and process using responsive charging of a battery as a function of internal resistance and environmental conditions of the battery are provided. Both voltage and temperature measurements can be used to determine the particular chemical state of a battery. Voltage data can be obtained by taking measurements across the battery terminals during the charge, and such data can be used to determine when charging is complete. Temperature data may also be obtained using thermal sensors placed on the surface or terminals of the battery, or utilizing sensors integrated into the battery. The charging platform/arrangement and process use a high current charge while the internal resistance of the battery is low, thus producing moderate heat, then self-adjusting to a lower intensity charge as internal resistance increases, so as to minimize the heat produced. As a result, the battery temperature can be kept at the battery's temperature limit, while maximizing the charging current.

A thin film solar cell is discussed. The thin film solar cell includes a substrate, a first photoelectric conversion unit positioned on the substrate, and a back reflection layer for reflecting back light transmitted by the first photoelectric conversion unit to the first photoelectric conversion unit. The first photoelectric conversion unit includes a first intrinsic layer for light absorption. The back reflection layer includes a first back reflection layer doped with n-type or p-type impurities, and the first back reflection layer directly contacts the first intrinsic layer of the first photoelectric conversion unit.

A quantum cascade laser and its method of fabrication are provided. The quantum cascade laser comprises one or more p-type electrical isolation regions and a plurality of electrically isolated laser sections extending along a waveguide axis of the laser. An active waveguide core is sandwiched between upper and lower n-type cladding layers and the active core and the upper and lower n-type cladding layers extend through the electrically isolated laser sections of the quantum cascade laser. A portion of the upper n-type cladding layer comprises sufficient p-type dopant to have become p-type and to have become an electrical isolation region, which extends across at least a part of the thickness upper n-type cladding layer along a projection separating the sections of the quantum cascade laser.

A power-on code C_o is added to a position preceding a code C including a header H and a subsequent data signal D. In response to reception of the code C_o, the operation mode is switched from the stop mode to the fast mode before the header H is received. Even when the operation mode in a standby mode is set to the stop mode, therefore, the header H can be correctly decoded.

The efficiency of LEDs is increased by incorporating multiple active in series separated by tunnel junction diodes. This also allows the LEDs to operate at longer wavelengths.

The invention discloses an electromagnetic forming device and method of a metal pipe. The device comprises a background magnetic field unit and a metal pipe forming driving coil, wherein the background magnetic field unit is used for generating a pulse background magnetic field on the metal pipe, and a pulse driving magnetic field can generate vortexes on the metal pipe; and the metal pipe forming driving coil is used for generating the pulse driving magnetic field on the metal pipe. Due to the fact that the pulse width of the pulse driving magnetic field is much smaller than that of the pulse background magnetic field, the vortexes generated by the pulse background magnetic field on the metal pipe can be ignored, meanwhile, the influences of the pulse driving magnetic field on a magnetic field on the metal pipe can be ignored, and thus, electromagnetic force is generated on the metal pipe through interaction of the pulse background magnetic field and the vortexes. By independently adjusting the pulse background magnetic field and the pulse driving magnetic field, the electromagnetic force can be improved, the metal pipe high in mechanical strength and low in conductivity can be formed, meanwhile, the design difficulty of the forming driving coil can be lowered, and the service life of the forming driving coil is prolonged.

A switched capacitor sample-and-hold circuit using a source grounded input operational amplifier, wherein a feed forward circuit or a feedback circuit is provided in the operational amplifier and connected to the feedback capacitor of the operational amplifier via switches, an input common voltage or a middle point voltage of outputs is detected, and a difference of the same from a reference voltage is previously charged in the feedback capacitor, thereby suppressing fluctuation of an output operation point at the time of amplification of the operational amplifier.

A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.

The invention describes an adaptive circuit (1, 1′) for driving a lower-voltage DC load (2) from a rectified higher-voltage AC supply (3), which adaptive circuit (1, 1′) comprises a charge-storage circuit (21, 21′), which charge storage circuit (21, 21′) comprises a first capacitor (C1) and a second capacitor (C2) connected essentially in series, wherein the second capacitor (C2) is connected at least in parallel with the load (2); and an active switch (22, 22′) realised as a controlled current source (22, 22′) for controlling a load current (I_load) through the load (2) such that, in a closed switch state, load current (I_load) is drawn essentially from the first capacitor (C1) of the charge-storage circuit (21, 21′), and, during an open switch state, load current (I_load) is drawn essentially from the second capacitor (C2). The invention also describes an LED retrofit lamp (4) comprising a connecting means (40) for connecting the lamp (4) to a higher-voltage mains supply signal (U PS); an LED device (2) rated for a lower-voltage supply; and such an adaptive circuit (1, 1′) for adapting the higher-voltage mains supply signal (U PS) to a low-voltage signal (U C2) for driving the lower-voltage LED device (2). The invention also describes a method of driving a lower-voltage DC load (2) from a rectified higher-voltage AC supply (3).

Methods and circuit configurations for refreshing data in a semiconductor memory device in which refresh operations are performed for a limited number of rows. The limited number of rows may include only those rows that contain valid data, for example, as determined by monitored write operations.

An electronic fuse may receive a silicon/germanium material in the fuse body, which in turn may result in the formation of a metal silicide material of reduced thickness. Consequently, the current density and, thus, the electromigration and heat generation in the metal silicide material may be increased for a given amount of current. Consequently, transistor switches for applying the programming pulse to the electronic fuse may be reduced in size.

Provided is a method of manufacturing a light emitting diode using a nitride semiconductor, which including the steps of: forming n- and p-type current spreading layers using a hetero-junction structure; forming trenches by dry-etching the n- and p-type current spreading layers; forming an n-type metal electrode layer in the trench of the n-type current spreading layer; forming a p-type metal electrode layer in the trench of the p-type current spreading layer; and forming a transparent electrode layer on the p-type metal electrode layer, thereby improving current spreading characteristics as compared with the conventional method of manufacturing the light emitting diode, and enhancing operating characteristics of the light emitting diode.