46results about How to "Reduce Impedance Discontinuities" patented technology

A termination structure for mating a cable connector to a circuit board has a ground terminal and two signal terminals arranged in triangular pattern through the connector in order to reduce the impedance through the connector. The width of the ground terminal increases along its extent with respect to the signal terminals. This increase occurs along either a transition or contact portion of the ground terminal.

A cable bypass assembly is disclosed for use in providing a high speed transmission line for connecting a board mounted connector of an electronic device to a chip on the device board. The bypass cable assembly has a structure that permits it, where it is terminated to the board mounted connector and the chip member, or closely proximate thereto to replicate closely the geometry of the cable. The connector terminals are arranged in alignment with the cable signal conductors and shield extensions are provided so that shielding can be provided up to and over the termination between the cable signal conductors and the board connector terminal tails. Likewise, a similar termination structure is provided at the opposite end of the cable where a pair of terminals are supported by a second connector body and enclosed in a shield collar. The shield collar has an extension that engages the second end of the cable.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

A terminal contact arrangement for a connector promotes reduction in deviation of the impedance of the connector when mated to an opposing connector and energized. The connector has an insulative housing with a plurality of terminal-receiving passages disposed in it. Conductive terminals are supported in some, but not all of the passages. The terminal contain distinct terminal sets that include a pair of differential signal terminals and at least two associated ground reference terminals. The two associated ground reference terminals are interconnected together so that electrically, they act as a single ground terminal having a width equal to the sum of the widths of the two connected ground reference terminals. The ground reference terminals of the sets are disposed in a single row of terminals, while the differential signal terminals of the same terminal set are disposed in another row of terminals spaced apart from the row of ground reference terminals. The differential signal terminals are separated from each other within their terminal row by an empty passage so that the two differential signal terminals of each terminal set are spaced farther apart from each other than they are spaced apart from their associated ground reference terminals.

A capacitive interposer (caposer) is disposed inside an integrated circuit package between a die and an inside surface of the package. Conductive layers within the caposer constitute a bypass capacitor. In a through-hole caposer, micro-bumps on the die pass through through-holes in the caposer and contact corresponding landing pads on the package. As they pass through the caposer, power and ground micro-bumps make contact with the plates of the bypass capacitor. In a via caposer, power and ground micro-bumps on the die are coupled to power and ground landing pads on the package as well as to the plates of the bypass capacitor by power and ground vias that extend through the caposer.

A terminal contact arrangement for a connector promotes reduction in deviation of the impedance of the connector when mated to an opposing connector and energized. The connector has an insulative housing with a plurality of terminal-receiving passages disposed in it. Conductive terminals are supported in some, but not all of the passages. The terminal contain distinct terminal sets that include a pair of differential signal terminals and at least two associated ground reference terminals. The two associated ground reference terminals are interconnected together so that electrically, they act as a single ground terminal having a width equal to the sum of the widths of the two connected ground reference terminals. The ground reference terminals of the sets are disposed in a single row of terminals, while the differential signal terminals of the same terminal set are disposed in another row of terminals spaced apart from the row of ground reference terminals. The differential signal terminals are separated from each other within their terminal row by an empty passage so that the two differential signal terminals of each terminal set are spaced farther apart from each other than they are spaced apart from their associated ground reference terminals.

A capacitive interposer (caposer) is disposed inside an integrated circuit package between a die and an inside surface of the package. Conductive layers within the caposer constitute a bypass capacitor. In a through-hole caposer, micro-bumps on the die pass through through-holes in the caposer and contact corresponding landing pads on the package. As they pass through the caposer, power and ground micro-bumps make contact with the plates of the bypass capacitor. In a via caposer, power and ground micro-bumps on the die are coupled to power and ground landing pads on the package as well as to the plates of the bypass capacitor by power and ground vias that extend through the caposer. In signal redistribution caposer, conductors within the caposer redistribute signals between die micro-bumps and package landing pads. In an impedance matching caposer, termination structures within the caposer provide impedance matching to a printed circuit board trace.

A capacitive interposer (caposer) is disposed inside an integrated circuit package between a die and an inside surface of the package. Conductive layers within the caposer constitute a bypass capacitor. In a through-hole caposer, micro-bumps on the die pass through through-holes in the caposer and contact corresponding landing pads on the package. As they pass through the caposer, power and ground micro-bumps make contact with the plates of the bypass capacitor. In a via caposer, power and ground micro-bumps on the die are coupled to power and ground landing pads on the package as well as to the plates of the bypass capacitor by power and ground vias that extend through the caposer. In signal redistribution caposer, conductors within the caposer redistribute signals between die micro-bumps and package landing pads. In an impedance matching caposer, termination structures within the caposer provide impedance matching to a printed circuit board trace.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

An in-line capacitor, having a pair of inner conductor segments, each of the inner conductor segments having a mating surface. A dielectric spacer positioned between the mating surfaces, each of the mating surfaces having corresponding folds formed thereon.

A method, system and apparatus for coating plated through holes (PTHs) to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.

A high speed, high reliability connector that may be employed with standard Serial ATA (SATA) or Serial Attached SCSI (SAS) compliant receptacle connectors. The present invention reduces impedance discontinuity by reducing the interconnection length and cross-planar transit found in typical SATA and SAS compliant connectors.

A connector with controlled impedance includes at least one set of differential signal terminals with an associated ground terminal. The ground terminal has a symmetric configuration, while the two differential signal terminals have asymmetric configurations. The asymmetric configurations permit capacitive coupling to occur primarily between the two differential signals in an area of the connector where the inductance of the connector would be high. The two differential signal terminals flank the ground terminal.

A termination structure for mating a cable connector to a circuit board includes a plurality of associated sets of terminals, each terminal set including a pair of differential signal terminals and a ground reference terminal. Each associated set of terminals is arranged in triangular pattern through the connector in order to reduce the impedance through the connector, and the sets are fixed within modules or blocks that are engageable together to form a connector housing. The housing modules permit adjacent associated terminal sets to be easily inverted so that the ground reference terminals of alternating associated terminal sets are located along one row of the connector along with signal terminals of intervening terminal sets, while the ground reference terminals of intervening terminal sets are located along a second row of the connector, along with the signal terminals of alternating associated terminal sets.

The invention relates to the technical field of optical communication, and provides a light emitting assembly. The light emitting assembly comprises an LD chip component, an optical wavelength division multiplexer, a first packaging shell and a second packaging shell; the first packaging shell is fixedly connected with the second packaging shell, so as to form a first cavity for packaging the LD chip component and a second cavity for packaging the optical wavelength division multiplexer; the first cavity is located in the first packaging shell; and the second cavity is located in the second packaging shell. The invention further provides a light module. The light module comprises a shell, and further comprises a light receiving assembly and the light emitting assembly; and the light receiving assembly and the light emitting assembly are both arranged on the shell. The LD chip component and the optical wavelength division multiplexer are separated by adopting a two-section structure, and the processing of light signals is carried out in two steps, so that the yield is improved, and the implementation of the installation process is facilitated; and through the adoption of an opticalfiber adapter set, the assembly tolerance can be effectively compensated by utilizing the flexibility of optical fibers, the stress is eliminated, and the problem of light loss of the assembly due tothe stress is avoided.

A paddle card construction disclosed for use in connecting electronic devices together. The paddle card takes the form of a circuit board that has a plurality of conductive contact pads arranged thereon in pairs. The contact pads of each pair are spaced apart from each other to provide a pair of points to which cable wire free ends may be terminated, such as by soldering. The spacing of the pads apart from each other in effect reduces to amount of capacitance in the cable wire termination area on the circuit board, thereby reducing the impedance and insertion loss in that area at high frequencies. The contact pads of each pair may be further interconnected together by a thin, conductive trace that extends lengthwise between the contact pads.

A method, system and apparatus for coating plated through holes (PTHs) to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.

A transmission line includes a transmission line substrate, a signal line, and a first ground pattern that is provided on the transmission line substrate and is located between the transmission line substrate and a metal wire used to connect the signal line to a component.

A printed circuit board comprises a board body, wherein the board body comprises a top layer, a bottom layer and a plurality of reference layers, wherein the reference layers are arranged between the top layer and the bottom layer; the board body is provided with a first bonding pad and a second bonding pad; the first bonding pad and the second bonding pad are arranged on the top layer of the board body, are connected with signal transmission lines on the top layer and are connected with a pair of differential pins of a square flat packaging chip; an avoidance hole is formed in the reference layer which is close to the first bonding pad and the second bonding pad, and is positioned right below the first bonding pad and the second bonding pad; and orthographic projections of the first bonding pad and the second bonding pad on the reference layer which is close to the first bonding pad and the second bonding pad are positioned in a range of the avoidance hole. By the printed circuit board, discontinuity of impedance can be effectively reduced, and the signal transmission quality is improved.

A termination structure for mating a cable connector to a circuit board has a ground terminal and two signal terminals arranged in triangular pattern through the connector in order to reduce the impedance through the connector. The width of the ground terminal increases along its extent with respect to the signal terminals. This increase occurs along either a transition or contact portion of the ground terminal.

A connector with controlled impedance includes at least one set of differential signal terminals with an associated ground terminal. The ground terminal has a symmetric configuration, while the two differential signal terminals have asymmetric configurations. The asymmetric configurations permit capacitive coupling to occur primarily between the two differential signals in an area of the connector where the inductance of the connector would be high. The two differential signal terminals flank the ground terminal.

The invention discloses a multi-layer circuit structure which includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones. The conductive pattern is electrically connected to a reference potential and electrically insulated from the differential transmission line pair.

The invention discloses an optical module and communication equipment. The optical module comprises a substrate, an electric chip, a high-speed signal line and a capacitor. The electric chip, the high-speed signal line and the capacitor are arranged on the substrate. The capacitor is connected between the electric chip and the high-speed signal line. The capacitor comprises a first pole plate anda second pole plate. The first pole plate is connected with a corresponding bonding pad of the electric chip through a signal bonding line, and the second pole plate is connected with the high-speed signal line. The mode in which the electric chip is directly connected to the capacitor through the bonding line and the capacitor is then connected to the high-speed signal line instead of the mode inwhich the electric chip is connected to the high-speed signal line through the bonding line and the capacitor is arranged in the middle section of the path of the high-speed signal line is adopted. Therefore, the number of impedance discontinuity points on a high-speed signal transmission path is reduced, and the integrity of a high-speed signal is improved.

The invention provides an optical module comprising a circuit board, a light emitting sub-module and a flexible circuit board; the light emitting sub-module comprises a shell and a ceramic switching block plated with a metal layer, one side of the ceramic switching block is inserted into the shell, and the other side of the ceramic switching block is exposed outside the shell; signal and grounding bonding pads are arranged on the metal layer of the ceramic switching block, and the signal bonding pads on the inner side and the outer side of the ceramic switching block are connected; an isolation groove is formed between the signal bonding pad and the grounding bonding pad located on the outer side of the shell and on the ceramic switching block, and the isolation groove is sunken in the signal bonding pad and the grounding bonding pad; and one end of the flexible circuit board is connected with the ceramic switching block, and the other end of the flexible circuit board is connected with the circuit board. The isolation groove is formed between the signal bonding pad and the grounding bonding pad, exposed on the outer side of the shell, on the ceramic switching block, the isolation groove is sunken in the signal bonding pad, the dielectric constant of the ceramic switching block is reduced through the isolation groove, impedance discontinuous points at the connecting position of the flexible circuit board and the ceramic switching block are reduced, and thus the signal transmission quality is improved, and the signal integrity is ensured.

Provided is a structure for reducing an impedance-discontinuity in a flexible printed circuit of a hard disk drive. The structure includes an actuator arm, a bracket, a flexible printed circuit having one end installed at the actuator arm and an other end installed at the bracket and including various circuits, and a metal member facing the flexible printed circuit and having one end installed at the actuator arm and an other end installed at the bracket.

A method and apparatus are provided for reducing impedance discontinuities which occur when two expansion connectors are located very close to one another on a bus in an information handling system. An interconnect is situated between the two expansion connectors and exhibits an impedance which is selected to be sufficiently low to compensate for the amount by which the impedance of the expansion bus connectors exceeds the impedance of the expansion bus connected thereto.