268 results about "Signal trace" patented technology

Provided are a display panel and a display device. An isolation dam is provided in a peripheral area of the display panel. The display panel includes: a display functional layer comprising a plurality of display signal traces; and a touch-control functional layer comprising a plurality of touch-control signal traces. On the binding side, there are a first boundary and a second boundary, and a first trace area located between the first boundary and the second boundary, the first boundary is closer to the display area than the second boundary. In the first trace area, the touch-control signal trace is arranged along a first direction and are led out from the binding circuit and connected to the touch-control pattern via the isolation dam and the first trace area in sequence, the display signal trace is arranged along a second direction and intersects with the touch signal trace.

The invention provides a display panel and a display device.The display panel comprises a display area and a frame area, the display panel further comprises a substrate, at least two signal wiring sets arranged on the substrate and organic insulating layers arranged on the signal wiring sets, the signal wiring sets are located in the frame area, and the organic insulating layers are arranged on the signal wiring sets. Each signal routing group comprises a plurality of signal routing lines which are arranged at intervals, the types of signals transmitted by any two adjacent signal routing lines are different, and the signal routing lines in the frame area are divided into at least two signal routing line groups which are arranged at intervals and are different in transmission signal type. The organic insulating layer is arranged between the adjacent signal wiring groups, and the linear insulating patterns are arranged on the organic insulating layer between the adjacent signal wiring groups, so that the adjacent signal wiring groups are insulated and separated by using the linear insulating patterns, electrochemical corrosion between the adjacent signal wiring groups for transmitting different signal types is prevented, the corrosion risk of the signal wiring in the frame area can be reduced, and the service life of the frame area is prolonged. And the reliability of the display panel is improved.

The embodiment of the invention provides a flexible circuit board and electronic equipment, relates to the technical field of signal transmission, and is used for relieving the problem of relatively high signal loss of an FPC (Flexible Printed Circuit) caused by electromagnetic shielding. The flexible circuit board may have a first region and a second region. A reference layer of the flexible circuit board is located in the first area, and the reference layer and the signal layer are stacked. The first shielding layer is located in the first area, and the first shielding layer is stacked on the side, away from the reference layer, of the signal layer. The second shielding layer is located in the second area, and the second shielding layer and the signal layer are stacked. The first grounding wire is electrically connected with the first shielding layer and the reference layer. The first grounding wire is also electrically connected with the second shielding layer. A backflow signal of a signal transmitted by the signal line in the signal layer can flow through the first grounding line from the second shielding layer in the second area, and respectively flows into the first shielding layer and the reference layer in the first area.

A flexure for a camera module is provided. The flexure includes a dynamic platform to which an image sensor is connected such that the image sensor moves with the dynamic platform. The flexure also includes a static platform connected to a static portion of the camera. The flexure further includes a plurality of flexure arms that mechanically connect the dynamic platform to the static platform. The plurality of flexure arms includes a first flexure arm including one or more signal traces having a first impedance and a base layer having a first width. The plurality of flexure arms includes a second flexure arm including one or more signal traces having a second impedance and a base layer having a second width. The first impedance is greater than the second impedance. The first width is less than the second width. The second flexure arm routes image data from the image sensor.

The embodiment of the utility model provides a display substrate and a display device. The display substrate comprises a display area and a first frame area, the display area comprises a plurality of sub-pixels and data lines in a plurality of data signal lines, the first frame area comprises a bending area, and in the bending area, in the first direction, data connecting lines of the data signal lines and a plurality of first power supply connecting structures are arranged at intervals. And at least one data connecting line is arranged between two adjacent first power supply connecting structures. According to the technical scheme provided by the embodiment of the invention, the technical problem of display screen splitting caused by abrupt change of the resistance of the signal wiring in the bending area of the display substrate can be avoided.

A high performance (HP) standard cell architecture for logic cells used in a semiconductor device or product. An example semiconductor device includes a plurality of cells surrounded by a cell boundary, and a backside power delivery network (PDN) routed to the plurality of cells. At least one cell of the plurality of cells has an arrangement of transistors within the cell boundary, the arrangement of transistors coupled together to generate an output signal at an output signal node. There is a metal 0 layer above the arrangement of transistors, the metal 0 layer includes one or more input signal traces and an output signal trace. The output signal trace and the input signal traces are substantially parallel inside the cell boundary and have a first width near the cell boundary; the output signal trace has a region of a wider metal 0 inside the cell boundary.

The invention provides a tumor electric field treatment system which comprises an electric field generator and a plurality of pairs of electrode plates electrically connected with the electric field generator, each electrode plate comprises an electrical function assembly, and each electrical function assembly comprises a plurality of electrode units arranged at intervals and connecting parts for connecting two adjacent electrode units; the electrode unit comprises a main body part and a dielectric element arranged on the front surface of the main body part; the electrode units are divided into a first electrode unit provided with a temperature sensor and a second electrode unit not provided with a temperature sensor. The electrical function assembly is further provided with a plurality of grounding traces, a plurality of signal traces and an AC trace, each grounding trace enables the grounding end of the temperature sensor of at least one first electrode unit to be grounded together, and each signal trace enables the signal end of the temperature sensor of at least one first electrode unit to be connected to the same corresponding detection channel. The AC trace is connected with the dielectric elements of the first electrode units and the dielectric elements of the second electrode units, comprehensive temperature measurement can be achieved, and the body surface of a patient is prevented from being scalded by low temperature.

Receiving a compute express link (CXL) packet at a link controller of an input / output (I / O) chip, and responsively terminating the CXL packet to generate a load / store memory transaction having a plurality of parameters comprising a host physical address (HPA), and a logical device ID (LD_ID), translating, using a forwarding engine, the HPA into a device physical address (DPA) based on the LD_ID, and appending network-on-chip (NoC) routing information to the load / store memory transaction, outputting, the load / store memory transaction and the NoC routing information to a plurality of signal traces on a printed circuit board (PCB), receiving the load / store memory transaction and the NoC routing information, and routing, using a NoC, the load / store memory transaction based on the NoC routing information to a destination port on the NoC, the NoC comprising (i) memory controller ports, (ii) edge processing unit (EPU) ports, and (iii) die-to-die interface ports.

In an embodiment, a power delivery system includes a first current limiter and a second current limiter in parallel with each other, wherein a direct current (DC) voltage is provided to each of the first current limiter and the second current limiter; a first transformer electrically coupled to the first current limiter; a second transformer electrically coupled to the second current limiter; first differential signal traces electrically coupled to the first transformer; and second differential signal traces electrically coupled to the second transformer, wherein the DC voltage is transmitted from the first transformer to the first differential signal traces simultaneous with the DC voltage being transmitted to the second differential signal traces by the second transformer.

A layout of signal traces includes a first set of signal traces and a second set of signal traces that are used for transmitting a first differential signal and a second differential signal respectively. Each set of signal traces includes a first part, a second part, and a third part along the direction of signal transmission. Different parts of the same signal trace as a whole is not straight. All the first parts are in a first signal layer and parallel. The second parts of the two sets of signal traces are in a second signal layer and the first signal layer, respectively, and are across each other. The second part of the first / second set of signal traces is coupled with the first and third parts of the first / second set of signal traces. All the third parts are in the first signal layer and parallel.

A method includes grouping signal traces based on signal trace characteristics. The method includes generating an image, a first dimension of the image corresponding to the signal traces, and a second dimension of the image corresponding to time values, where a visual indicator corresponds to a signal trace characteristic of a signal trace at a time value, the signal trace corresponds to a row or column of the first dimension, and the time value corresponds the second dimension. The method includes detecting a defect in operation of components of manufacturing equipment associated with the signal traces based on a deviation of visual indicators in a row or column from a visual indicator of a respective group of visual indicators associated with signal traces with similar signal trace characteristics. The method includes classifying the defect based on a signal trace corresponding to the row or column of the image.

A computer-implemented method includes: accessing ground-force signal traces measured at each source location when applying a pilot sweep signal characterized by a sweeping instantaneous frequency that includes a fundamental component, wherein each ground-force signal trace comprises a fundamental mode signal component as well as at least one harmonic mode signal component; obtaining an analytic function representation for the pilot sweep signal and each ground-force signal trace, wherein the analytic function representation comprises a phase portion; establishing a matrix representation characteristic of the phase portion of the analytic function representation for the fundamental component in the ground-force signal, and wherein the matrix representation is size limited; retrieving, from the analytic function representation for each ground-force signal trace and after inverting the matrix representation, the fundamental mode signal component of the ground-force signal trace; and providing the retrieved fundamental mode signal component of each ground-force signal trace for subsequent data processing.

The invention provides a display panel and a display device, and belongs to the technical field of display. The display panel is provided with a display area, a peripheral area surrounding the display area, a binding area located on the side, away from the display area, of the peripheral area, and a bending area connected between the peripheral area and the binding area in a bent mode. The peripheral area comprises a first transition area close to the bending area; the display panel comprises a substrate, a signal wire and a stress dispersion structure, wherein the signal wire and the stress dispersion structure are arranged on the substrate; wherein the two ends of the signal wire respectively extend to the first transition area and the binding area from the bending area; the stress dispersion structure is at least partially located in the bending area and is used for dispersing bending stress when the signal wire is bent.

A light-emitting diode driving backplane and a display apparatus are provided, and belong to the field of display technology. The light-emitting diode driving backplane includes: a base substrate divided into luminescent lamp regions and a first wiring region around the luminescent lamp regions; at least one pair of first connection pads, signal traces and an auxiliary functional component on the base substrate. The at least one pair of first connection pads and the auxiliary functional component are in the luminescent lamp regions, the signal traces are in the first wiring region, each pair of first connection pads includes a positive pad and a negative pad, and the signal traces are electrically connected to the corresponding positive negative pads for providing driving signals thereto, and the auxiliary functional component and at least some signal traces are in the same layer.

The invention relates to the technical field of power electronics, in particular to a semiconductor device, a vehicle-mounted charger and a vehicle wherein the semiconductor device comprises: a substrate, a power circuit, a power pin (102) and a signal pin (101); the power circuit is arranged on the substrate; the power pin (102) and the signal pin (101) are connected with a power circuit; the signal pins (101) arranged on the same side edge of the substrate are arranged in groups, and the distance between the signal pins (101) in different groups is larger than the distance between the power pins (102). According to the embodiment of the invention, the power line and the signal line in the semiconductor device are separated, so that the cross line and mutual interference of the power line and the signal line are avoided; and the problem that wiring is difficult due to many pins on the side of the signal pin (101) is avoided.

The utility model provides a circuit board structure, and relates to the technical field of circuit boards. The structure comprises a circuit board body, at least two resistance-capacitance devices and at least four signal wires, the circuit board body is provided with at least two signal holes, at least two backflow ground holes and at least two bonding pad assemblies, each bonding pad assembly comprises at least two bonding pads which are arranged in sequence, the same resistance-capacitance device is correspondingly connected with two adjacent bonding pads in the same bonding pad assembly, the signal wire is correspondingly connected with the bonding pads connected with the resistance-capacitance device, and the signal wire is connected with the signal wire. The through bonding pad assembly and the signal hole are both located between the at least two backflow ground holes. The quality and stability of signal transmission can be enhanced through the signal hole, the backflow ground hole provides a plurality of backflow paths, in high-speed signal transmission and high-frequency application, signal delay and distortion are reduced, the signal quality is improved, the device is suitable for high-speed signal transmission, such as 32Gbps, and the bonding pad assembly, the signal hole and the backflow ground hole are compact in layout structure, small in occupied space and high in reliability. And the high-density arrangement requirement is met.

The invention provides a tumor electric field treatment system which comprises an electric field generator and a plurality of pairs of electrode plates electrically connected with the electric field generator, each electrode plate comprises an electrode array, and each electrode array comprises a trunk and a plurality of branches radially extending from the trunk to the periphery of the trunk. A plurality of electrode units and connecting parts for connecting two adjacent electrode units are arranged on the trunk; each branch is also provided with an electrode unit and a connecting part for connecting the electrode unit to the trunk, and each electrode unit positioned on the branch is only connected with the trunk through a corresponding connecting part; the electrode array also has an AC signal trace, a number of ground traces, and a number of signal traces. According to the tumor electric field treatment system, the number of the conductive traces on the electrode plates can be reduced, and the layout scheme of the conductive traces is simplified.

The present application discloses a display module and a display device, belonging to the field of display technology. The display module includes: a display panel, a first signal shielding layer, a second signal shielding layer and a plurality of functional film layers. After the first signal shielding layer and the second signal shielding layer are respectively arranged on the two opposite sides of the panel bending portion in the display panel, the first signal shielding layer and the second signal shielding layer can shield the external electromagnetic waves under the cooperation of the first signal shielding layer and the second signal shielding layer, so that the probability of these electromagnetic waves interfering with the driving signal transmitted by the signal wiring inside the panel bending portion is low, thereby effectively improving the effect of displaying the picture on the first panel portion.

The anti-vibration crystal oscillator structure provided by the embodiment of the invention comprises a crystal oscillator shell and a crystal oscillator internal structure, the crystal oscillator internal structure comprises an upper part, a middle part and a lower part, the upper part comprises a circuit board and a metal pressing strip, the middle part comprises a steel wire rope assembly and a flexible wire, and the lower part comprises a fixed groove and a metal pressing strip; signal wires and components are arranged in the middle of the circuit board, and boss bonding pads are arranged on the edge of the circuit board; the steel wire rope assembly and the flexible wire are installed between the circuit board and the base. The flexible lead is welded between the corresponding bonding pad of the circuit board and the corresponding lead column of the base; the steel wire rope assembly comprises steel wire ropes and metal sleeves. The steel wire rope is of an annular structure, the upper end and the lower end of the steel wire rope are connected with metal sleeves in a pressing mode respectively, the steel wire rope and the metal sleeves are fixed to the corresponding positions through metal pressing strips on the base and the circuit board, then the steel wire rope and the metal sleeves are welded to a boss bonding pad and a base groove respectively, the steel wire rope is fixed, and the circuit board is flexibly supported above the base. The miniaturized anti-oscillation crystal oscillator is realized under the condition of ensuring relatively good anti-oscillation performance.

The invention provides a tumor electric field treatment system which comprises an electric field generator and a plurality of pairs of electrode plates electrically connected with the electric field generator, each electrode plate comprises an electrode array, and each electrode array comprises two trunks arranged in parallel and a plurality of free branches extending outwards from the two trunks. A plurality of electrode units and connecting parts for connecting two adjacent electrode units are arranged on the trunk and the branches; the plurality of electrode units comprise a plurality of first electrode units with temperature sensors; the electrode array is also provided with a path of AC (Alternating Current) traces for transmitting AC electric signals to the electrode units; the grounding traces are used for short-circuiting and grounding the grounding ends of the temperature sensors of the corresponding first electrode units; and the signal traces are used for connecting the signal ends of the temperature sensors of the corresponding first electrode units in parallel and are matched with the grounding traces to transmit temperature detection signals of the corresponding first electrode units in a time-sharing manner. Comprehensive temperature measurement can be achieved, and the body surface of a patient is prevented from being scalded by low temperature

The invention provides a tumor electric field treatment device and an electrode patch thereof, and the electrode patch comprises an electrode array which comprises twenty electrode units and sixteen temperature sensors. The sixteen temperature sensors are located on the edge and the center of the electrode array and corresponding electrode units located in the middle of the edge and the center respectively in the space structure. The sixteen temperature sensors are arranged on a circuit in four rows and four columns, a flexible circuit board of the electrode array is provided with four grounding traces and four signal traces, and the grounding traces are arranged on the back face of the flexible circuit board and electrically connected with the grounding ends of the temperature sensors in the corresponding row respectively. And the four paths of signal traces are also arranged on the back surface of the flexible circuit board and are electrically connected with the signal ends of the corresponding columns of temperature sensors respectively. According to the tumor electric field treatment device and the electrode patch thereof, the temperature sensors are arranged on part of the electrode units at different positions of the electrode array, so that comprehensive temperature measurement can be realized, and wiring of conductive traces on the flexible circuit board can be simplified.

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display, the display panel comprises a display area and a dam area, and the display panel comprises a substrate, at least one conductive layer, an insulating layer and a touch layer. The at least one conductive layer is located on one side of the substrate, and the conductive layer comprises signal wires; the insulating layer is located on the side, away from the substrate, of the at least one conductive layer, and the thickness of the insulating layer in the display area is larger than that of the insulating layer in the dam area; the touch layer is located on the side, away from the substrate, of the insulating layer and comprises touch wires, and the touch wires are located in the display area. According to the display panel, the thickness of the insulating layer in the display area is set to be larger than that of the insulating layer in the dam area, the risk that the metal wires in the dam area are damaged can be reduced while signal interference of the signal wires in the conductive layer on the touch wires in the touch layer is reduced, and therefore the touch effect and the display effect of the display panel can be improved.

The present disclosure relates to a display panel, a display area of the display panel has a middle area and an edge area located outside the middle area, the display panel comprises a plurality of data lines, a plurality of first power signal lines and a plurality of second power signal lines located in the display area, wherein each data line located in the edge area is led to the middle area through a signal trace, at least part of the signal trace corresponds to the position of the first power signal line, the conductive layer where the signal trace is located further comprises a dummy pattern, the dummy pattern is arranged separately from the signal trace, and at least part of the dummy pattern is electrically connected with the second power signal line.

A device is provided that includes a printed circuit board and an integrated circuit that is installed on the printed circuit board. A plurality of optical transceiver modules are positioned on the printed circuit board around three or more sides of the integrated circuit. The plurality of optical transceiver modules are to be in operable communication with the integrated circuit. A faceplate is installed that has multiple face portions that expose receptacles for the plurality of optical transceiver modules around the integrated circuit.

A display substrate includes a first display area (A1). The first display area (A1) includes a plurality of display island areas (A11) arranged in an array and light-transmissive areas (A121, A122) between adjacent display island areas (A11). The display island area (A11) includes a plurality of first pixel circuits (11) and a plurality of first light-emitting elements (13) disposed on a substrate. At least one first pixel circuit (11) is electrically connected with at least one first light-emitting element (13) and configured to drive the at least one first light-emitting element (13) to emit light. The first pixel circuits (11) in adjacent display island areas (A11) are connected by a plurality of first signal traces in a first direction (X), and the first pixel circuits (11) in adjacent display island areas (A11) are connected by a plurality of second signal traces in a second direction (Y). The material of the plurality of second signal traces includes a transparent conductive material, or the material of the plurality of first signal traces and the plurality of second signal traces both includes a metal material.

A system and method for FPGA-based emulation for verification of an RTL design. A first part of an FPGA is configured to realize user logic according to user RTL received by a network, and a second part of the FPGA is configured to realize control and interface logic that enables remote control and interaction with the user logic. The first portion of the FPGA may further realize emulated off-chip components and interfaces to real off-chip components to provide a realistic environment for the user logic. The second portion of the FPGA may further realize logic-analyzer logic for probing internal signals of the user logic and for capturing and storing signal traces. Memory elements that are coupled to the user logic are expunged at the end of an emulation session prevent data leaks between sessions.

The embodiment of the present invention provides a method, device and NAND flash memory for improving the read and write speed. The NAND flash memory includes an SRAM, N register areas connected to the SRAM, and N charging selection signals corresponding to the N register areas one by one. The cycles of the N charging selection signals include a delay time. There is a time delay between the N charging selection signals. The delay time in the N charging selection signal cycles is superimposed to be equal to the wiring delay of the register selection signals of the N register areas. The method includes: receiving a register address; determining a register area to be read and written according to the register address; and setting the charging selection signal corresponding to the register area to be read and written to be effective. The present invention effectively reduces the time for SRAM to read and write registers, and greatly improves the speed of SRAM to read and write registers.

A method includes grouping signal traces based on signal trace characteristics. The method includes sampling at least one of a set of signal traces to a uniform time sequence and generating an image including visual indicators associated with the set of signal traces with signal trace characteristics. Each visual indicator corresponds to a signal characteristic of a respective signal trace of the set of signal traces and a time value based on the uniform time sequence. The method includes detecting a defect in operation of one or more components of manufacturing equipment based on a deviation of one of the visual indicators of the image. The method includes classifying the defect based on the respective signal trace corresponding to the image.

A display panel and a display device are provided. A first entity portion is connected with a data line and a signal trace, and a first gap is provided between the first entity portion and a first dummy portion. The display panel includes a first metal layer and a second metal layer that are stacked. The first entity portion includes a first portion located on the first metal layer. The first dummy portion includes a third portion located on the first metal layer. The first portion includes a first end of the first entity portion, and the third portion includes a first end of the first dummy portion.

The application discloses a display panel and a display device, and relates to the technical field of display. In the display panel, a pixel circuit and a first signal trace are connected through a first connection position, a second signal trace is connected through a second connection position, and a pixel electrode is connected through a third connection position. Moreover, the orthographic projection of a first opening area in a common electrode on a substrate covers the orthographic projection of each connection position on the substrate, so that the coupling capacitance of the conductive film layer at the common electrode and each connection position can be avoided, and the abnormal increase of the coupling capacitance at each connection position can be avoided. Therefore, the display panel can be prevented from generating a heating phenomenon, and the yield of the display panel can be ensured.