101 results about "Signal trace" patented technology

The present disclosure relates to a display panel, a display area of the display panel has a middle area and an edge area located outside the middle area, the display panel comprises a plurality of data lines, a plurality of first power signal lines and a plurality of second power signal lines located in the display area, wherein each data line located in the edge area is led to the middle area through a signal trace, at least part of the signal trace corresponds to the position of the first power signal line, the conductive layer where the signal trace is located further comprises a dummy pattern, the dummy pattern is arranged separately from the signal trace, and at least part of the dummy pattern is electrically connected with the second power signal line.

A display substrate includes a first display area (A1). The first display area (A1) includes a plurality of display island areas (A11) arranged in an array and light-transmissive areas (A121, A122) between adjacent display island areas (A11). The display island area (A11) includes a plurality of first pixel circuits (11) and a plurality of first light-emitting elements (13) disposed on a substrate. At least one first pixel circuit (11) is electrically connected with at least one first light-emitting element (13) and configured to drive the at least one first light-emitting element (13) to emit light. The first pixel circuits (11) in adjacent display island areas (A11) are connected by a plurality of first signal traces in a first direction (X), and the first pixel circuits (11) in adjacent display island areas (A11) are connected by a plurality of second signal traces in a second direction (Y). The material of the plurality of second signal traces includes a transparent conductive material, or the material of the plurality of first signal traces and the plurality of second signal traces both includes a metal material.

A system and method for FPGA-based emulation for verification of an RTL design. A first part of an FPGA is configured to realize user logic according to user RTL received by a network, and a second part of the FPGA is configured to realize control and interface logic that enables remote control and interaction with the user logic. The first portion of the FPGA may further realize emulated off-chip components and interfaces to real off-chip components to provide a realistic environment for the user logic. The second portion of the FPGA may further realize logic-analyzer logic for probing internal signals of the user logic and for capturing and storing signal traces. Memory elements that are coupled to the user logic are expunged at the end of an emulation session prevent data leaks between sessions.

A method includes grouping signal traces based on signal trace characteristics. The method includes sampling at least one of a set of signal traces to a uniform time sequence and generating an image including visual indicators associated with the set of signal traces with signal trace characteristics. Each visual indicator corresponds to a signal characteristic of a respective signal trace of the set of signal traces and a time value based on the uniform time sequence. The method includes detecting a defect in operation of one or more components of manufacturing equipment based on a deviation of one of the visual indicators of the image. The method includes classifying the defect based on the respective signal trace corresponding to the image.

A display panel and a display device are provided. A first entity portion is connected with a data line and a signal trace, and a first gap is provided between the first entity portion and a first dummy portion. The display panel includes a first metal layer and a second metal layer that are stacked. The first entity portion includes a first portion located on the first metal layer. The first dummy portion includes a third portion located on the first metal layer. The first portion includes a first end of the first entity portion, and the third portion includes a first end of the first dummy portion.

The application discloses a display panel and a display device, and relates to the technical field of display. In the display panel, a pixel circuit and a first signal trace are connected through a first connection position, a second signal trace is connected through a second connection position, and a pixel electrode is connected through a third connection position. Moreover, the orthographic projection of a first opening area in a common electrode on a substrate covers the orthographic projection of each connection position on the substrate, so that the coupling capacitance of the conductive film layer at the common electrode and each connection position can be avoided, and the abnormal increase of the coupling capacitance at each connection position can be avoided. Therefore, the display panel can be prevented from generating a heating phenomenon, and the yield of the display panel can be ensured.

The application provides a display panel and a display device. The display panel comprises a substrate and a binding assembly. The substrate comprises a main body part and a bending part connected with the main body part. Two ends of the binding assembly are electrically connected with the main body part and the bending part respectively. The bending part and one end of the binding assembly away from the main body part are bent to the back of the main body part. By connecting part of signal traces in the main body part of the substrate with the bending part through the binding assembly, the number of traces that need to be electrically connected with the bending part is reduced, and the size of the frame area of the display panel is reduced, and the narrow frame effect is improved.

A leak sensor for monitoring a liquid cooing assembly of an information handling system includes a flexible dielectric substrate. A reference trace is formed on the flexible dielectric substrate. A first signal trace is formed on the flexible substrate substantially in parallel with a first portion of the reference trace. A second signal trace formed on the flexible substrate substantially in parallel with a second portion of the reference trace. The first and second signal traces are separated by insulation into separate regions on the flexible dielectric substrate. Electrically driving the first and second signal traces induces voltages on the first and second signal traces, the voltages correlated with an amount of liquid within the separate regions.

The present disclosure provides a display substrate and a preparation method thereof, and belongs to the technical field of display. The display substrate of the present disclosure comprises: a substrate, having a connecting via hole penetrating through the thickness direction thereof; the substrate comprises a first surface and a second surface oppositely arranged along the thickness direction thereof; a pixel driving circuit arranged on the first surface; a signal trace arranged on the second surface; a connecting structure arranged in the connecting via hole, and the connecting structure electrically connects the signal trace and the pixel driving circuit; wherein part of the connecting via hole is filled with the connecting structure.

The invention relates to the technical field of power electronics, in particular to a semiconductor device, a vehicle-mounted charger and a vehicle wherein the semiconductor device comprises: a substrate, a power circuit, a power pin (102) and a signal pin (101); the power circuit is arranged on the substrate; the power pin (102) and the signal pin (101) are connected with a power circuit; the signal pins (101) arranged on the same side edge of the substrate are arranged in groups, and the distance between the signal pins (101) in different groups is larger than the distance between the power pins (102). According to the embodiment of the invention, the power line and the signal line in the semiconductor device are separated, so that the cross line and mutual interference of the power line and the signal line are avoided; and the problem that wiring is difficult due to many pins on the side of the signal pin (101) is avoided.

A radiating element for a base station antenna comprises a feed stalk printed circuit board and a dipole radiator printed circuit board mounted on the feed stalk printed circuit board. The feed stalk printed circuit board includes a first ground line that includes a first integrated parallel LC circuit, a second ground line that includes a second integrated parallel LC circuit, a first signal trace that extends through an opening in the dipole radiator printed circuit board, and a second signal trace.

This application provides a display panel and a display device. The display panel includes a display area and a non-display area adjacent to the display area. The bezel area includes a substrate and signal traces, a planarization layer, lead traces, and an encapsulation layer sequentially stacked on the substrate. The encapsulation layer includes a first inorganic layer disposed on the lead traces. The display area includes a substrate, a planarization layer, and an anode located on the side of the planarization layer away from the substrate. The lead traces extend from the side of the anode into the bezel area and are connected to the signal traces. This application provides a barrier layer between the lead traces and the first inorganic layer. The orthographic projection of the barrier layer on the lead traces covers the orthographic projection of the first inorganic layer on the lead traces, thereby avoiding the bombardment damage to the lead traces by high-energy plasma when the first inorganic layer is fabricated using plasma-enhanced chemical vapor deposition in the prior art, and thus avoiding the phenomenon of uneven thickness of the first inorganic layer.

The invention provides a display panel and a display device. The display panel comprises a substrate base plate; the first conductive layer is arranged on the substrate and comprises a signal wire, and the signal wire extends to the binding area in the direction from the display area to the binding area; the protective layer is arranged on the side, away from the substrate, of the first conductive layer and located in the non-display area, and the orthographic projection of the protective layer in the non-display area is partially overlapped with the binding area; the packaging layer is arranged on the side, away from the substrate, of the first conductive layer, the packaging layer extends to the non-display area from the display area, a first open groove is formed between the end, extending to the non-display area, of the packaging layer and the end, facing the display area, of the protective layer, and a part of the first conductive layer is exposed out of the first open groove; the touch control layer is arranged on the side, away from the substrate, of the packaging layer, the touch control layer comprises an inorganic film layer, the inorganic film layer extends to the non-display area from the display area, and the inorganic film layer covers the packaging layer and at least covers part of the first open groove.

The present disclosure provides a backlight module and a display device, wherein a first conductive layer is disposed on a substrate and includes signal traces and a first ground line unit; a second conductive layer is disposed on a side of the first conductive layer close to or away from the substrate. The second conductive layer includes a second ground line unit. The light-emitting member is electrically connected with the signal traces and the first ground line unit, and the first ground line unit is connected with the second ground line unit.

A power package includes at least one power substrate having at least one power trace, at least one power device on the at least one power trace, signal terminals, and at least one signal connection assembly. The at least one signal connection assembly includes at least one of the following: at least one signal trace that is thinner than the at least one power trace; at least one embedded routing layer within the at least one power substrate; and / or at least one routing layer on the at least one power substrate.

The disclosure relates to an arrangement of an electrical circuit for powering one or more phase windings of an electrical machine of an automated storage and retrieval system, and such a system and a vehicle for such a system which incorporate such an arrangement. The arrangement comprises: a plurality of layers 910 of the electrical circuit, interposed with electrically insulating material 920, wherein through-connections 930 are provided between the layers; and for each of the phase windings, a first set of electrical connections for mounting a first active device, a second set of electrical connections for mounting a second active device, and a connection point for electrical connection with the respective phase winding of the electrical machine; wherein for each of the phase windings there is provided a respective area of conductive material in at least one of the layers that forms at least a part of an electrical connection between the respective connection point and a respective supply terminal of the first active device and a respective receiving terminal of the second active device, wherein the respective supply terminal and the respective receiving terminal are electrically connected with their respective area by one or more of the through-connections and without using signal traces for that connection.

A box dipole radiating element uses a compact quadrilateral arrangement of substantially coplanar radiating arms that supports tilted polarized radiation in response to differential mode currents generated along four sides of the quadrilateral arrangement and in response to common mode currents that can be generated in substantially the same plane as the differential mode currents. A feed signal routing network is provided that includes a feed signal routing substrate located on portions of the radiating arms, first through fourth signal traces located on a front side of the substrate, and first through fourth ground plane segments located on a back side of the substrate. The first through fourth ground plane segments are capacitively coupled to the radiating arms. Each of the signal traces receives a corresponding feed signal and spans a corresponding air gap between a pair of the radiating arms.

This application discloses a filtering trace structure, device, and flexible circuit board. The filtering trace structure includes at least one high-impedance trace and at least one low-impedance trace. The high-impedance and low-impedance traces are alternately arranged and connected in series. The characteristic impedance of the high-impedance trace is greater than a preset threshold, and the characteristic impedance of the low-impedance trace is less than the preset threshold. By alternately arranging and connecting at least one high-impedance and at least one low-impedance trace in series, a transmission line structure with periodic impedance changes is formed. The filtering effect is achieved by utilizing the impedance mismatch effect between the high-impedance and low-impedance segments, thereby directly integrating the filtering capability into the signal trace and effectively suppressing radio frequency interference.

A display substrate and a display device are disclosed. The display substrate includes a plurality of sub-pixels, data signal lines, and second signal traces. The plurality of sub-pixels includes a first sub-pixel emitting red light, a third sub-pixel emitting blue light, and a second and a fourth sub-pixel emitting green light. The data signal lines include a first data signal line connected to a pixel driving circuit of the first sub-pixel, a second data signal line connected to pixel driving circuits of the second and fourth sub-pixels, and a third data signal line connected to a pixel driving circuit of the third sub-pixel. The pixel columns include a first pixel column and a second pixel column. The first pixel column includes a first data signal line, a third data signal line, a first sub-pixel, and a third sub-pixel. The second pixel column includes a second data signal line, a second signal trace, a second sub-pixel, and a fourth sub-pixel. The second signal traces transmit constant voltage signals or transmit data signals.

An integrated circuit assembly comprises a plurality of die connection points configured to couple to an integrated circuit die, and a plurality of external connection points configured to couple to external circuitry. A metal power signal trace and a metal ground signal trace are each coupled to at least a respective one of the plurality of die connection points to provide electrical power to the integrated circuit. A first metal-insulator-metal capacitor comprises a plurality of first extensions interleaved with a plurality of extensions of the metal power signal trace and is separated from the plurality of extensions of the metal power signal trace by an insulator. A second metal-insulator-metal capacitor comprises a plurality of second extensions interleaved with a plurality of extensions of the metal ground trace and is also separated from the plurality of extensions of the metal ground trace by an insulator.

The application provides a display panel and a display device. The display panel comprises a substrate and a signal trace arranged on the substrate. The substrate comprises a flat display area and a bending area surrounding the flat display area. The flat display area comprises a first side edge and a second side edge adjacent to each other. The bending area comprises a first bending area bent along the first side edge, a second bending area bent along the second side edge, and a corner area between the first bending area and the second bending area. The signal trace comprises a first trace and a bridge line connected to the first trace, the first trace is located in the first bending area, the bridge line is located in the corner area, and the elongation rate of the bridge line is greater than that of the first trace. The application can prevent the corner area from being wrinkled to cause the signal trace to be broken, and improve the yield of the display panel.

The invention discloses a display panel and a display device.The display panel comprises a substrate, a signal wiring layer, at least one retaining wall and a packaging layer, and the signal wiring layer is arranged on the substrate and comprises at least one signal wire; the at least one retaining wall is positioned in the retaining wall setting area and is arranged on the signal wiring layer; the packaging layer comprises a first inorganic packaging sub-layer, an organic packaging sub-layer and a second inorganic packaging sub-layer which are arranged in a stacked mode, the first inorganic packaging sub-layer and the second inorganic packaging sub-layer cross the retaining wall close to the bending area and make contact in the packaging area, and the organic packaging sub-layer is located on the side, close to the display area, of the retaining wall; wherein the signal wire comprises a main body part and an extension part which are connected, the main body part is located between the packaging area and the display area, and the extension part extends out of the side, away from the retaining wall setting area, of the packaging area from the side, close to the packaging area, of the main body part. According to the invention, the wiring width is increased while a narrow frame is realized.

The invention belongs to the technical field of electronic circuit design, and discloses a differential signal Fanout structure for improving the integrity of a high-speed signal, and the structure comprises a PCB substrate; the differential signal pair is arranged on the PCB substrate, the differential signal pair comprises a P signal wire and an N signal wire, and the P signal wire and the N signal wire are respectively used for connecting chip pins; and a ground shield unit. By adopting layered fan-out and large-spacing decoupling design, crosstalk of high-speed differential signals is remarkably reduced, the limitation that tight coupling wiring must be conducted on the same layer in a traditional Fanout structure is broken through, P signals and N signals are arranged on the surface layer and the inner layer of a PCB respectively, and therefore the signal transmission efficiency is improved. By means of isolation of a vertical space, maximization of horizontal projection spacing is achieved (a decoupling spacing area is formed), inter-line coupling capacitance is remarkably reduced, far-end crosstalk is remarkably reduced through the structure, and the signal-to-noise ratio and eye pattern opening of a high-speed link are improved.

Embodiments herein relate to systems, apparatuses, techniques, or processes for stiffeners for a surface of a package substrate, where the stiffeners provide EMI / RFI shielding for signal traces or other electrical routings within the package, and in particular for traces at a surface of the package such as microstrip routings. Other embodiments may be described and / or claimed.

Systems, methods, and computer program products for determining a photon number. Electrical signal trace data is received by a signal processor. A plurality of trace data points are defined based on the received electrical signal trace data. Each trace data point includes both a signal value and a time value indicating the position of that trace data point within the electrical signal trace. The trace data points are input to a machine learning model trained to output predicted photon number data usable to determine the photon number corresponding to the received electrical signal trace. The machine learning model can be trained to output predicted photon number data based on an incomplete set of trace data points, and even individual trace data points. This can allow the photon number to be predicted when data is partially missing or lost, and / or before the entire electrical signal trace has been received.

Technologies for conformal power delivery structures near high-speed signal traces are disclosed. In one embodiment, a dielectric layer may be used to keep a power delivery structure spaced apart from high-speed signal traces, preventing deterioration of signals on the high-speed signal traces due to capacitive coupling to the power delivery structure.

The invention provides a display panel and a display device, and belongs to the technical field of display. The display panel comprises a substrate, a transistor layer, a first source-drain metal layer, a second source-drain metal layer and a pixel layer which are sequentially stacked, the display panel comprises circuit areas arranged in an array mode, and the circuit areas are provided with pixel driving circuits for driving sub-pixels. The display panel is provided with a first connecting line and a data signal line, and the circuit area column comprises a plurality of circuit areas which are sequentially arranged in the column direction; the first connecting line comprises first sub-lines which are alternately arranged on the first source-drain metal layer and second sub-lines which are arranged on the second source-drain metal layer in sequence, and the adjacent first sub-lines and second sub-lines are electrically connected through via holes; the display panel further comprises a second connecting line. Wherein at least part of the first connecting lines are electrically connected with the data signal wires through the second connecting lines. The display panel and the display device applying the display panel have the effects of reducing the processing cost and improving the display quality.

The embodiment of the invention provides a myoelectricity sensor, a myoelectricity sensor module and a myoelectricity sensor device, and relates to the field of electronic devices. In the myoelectricity sensor, a flexible substrate, a device layer, a circuit layer and an electrode layer are stacked, the device layer comprises at least one signal processing device, the electrode layer comprises at least one sensing electrode, and the sensing electrode and the signal processing device are connected through a signal wire to form a myoelectricity sensing unit. Orthographic projections of the sensing electrode and the signal processing device on the flexible substrate are arranged in a staggered manner. According to the design, the flexible substrate is adopted to bear other film layers of the myoelectricity sensor, so that the flexibility of the myoelectricity sensor can be improved, the myoelectricity sensor can be well attached to the skin of a user during use, foreign body sensation generated during attachment is reduced, and the use experience of the user is improved; and the sensing precision reduction caused by the too close distance between the myoelectricity sensor and the sensor can be avoided, and the myoelectricity sensor is ensured to have high detection precision.

A thin-film material measurement and characterization fixture system using an embedded coplanar waveguide fixture including a substrate layer, an upper conductor layer disposed on top of the substrate layer, the upper conductor layer including a first upper conductor layer and a second upper conductor layer spaced from the first upper conductor layer by a gap, a signal trace disposed on top of the substrate layer in the gap between the first upper conductor layer and the second upper conductor layer, and a superstrate layer disposed on top of the upper conductor layer and the signal trace, the superstrate layer filling the gap between the first upper conductor layer and the second upper conductor layer to achieve accurate thin-film characterization in the millimeter wave bands.

The present application provides an array substrate, a display panel, and a display apparatus. The array substrate comprises a substrate, a driver circuit layer, and a light-shielding layer. The driver circuit layer is disposed on a side of the substrate and comprises a plurality of signal traces disposed in an array area. The light-shielding layer is disposed between the substrate and the driver circuit layer, and comprises at least two conductive layers arranged in a stacked configuration, and further comprises a plurality of connecting lines located in a peripheral area, wherein the plurality of connecting lines are respectively connected to the plurality of signal tracings.