577 results about "Signal trace" patented technology

A physiological status monitoring system includes a shirt and a stretchable circumferential band attached to the shirt. The stretchable band includes a respiration detector subsystem and signal transmission conductors. One or more sensors on the band are electrically connected to a signal transmission conductor. At least one sensor has an exposed electrode inside the shirt. The system includes a cover over the band and / or the one or more sensors. A connection subsystem on the band is electrically connected to the respiration detector subsystem and the signal transmission conductors and includes signal traces therefrom to a first connector accessible from outside the shirt. An electronics module is releasably attached to the shirt and includes a second connector which mates with the first connector. The electronics module includes a processing system and a transmitter. The remote display unit includes a receiver, a display, and a processing system.

An electrical connector is provided for operation in a point-to-point application. The connector includes an insulated housing having first and second card interfaces configured to mate with associated first and second circuit cards. An electrical wafer is held in the housing and configured to operate in a point-to-point architecture. The signal traces end at signal contact pads located proximate to first and second edges, respectively. The signal contact pads receive a unidirectional signal. Each of the signal traces include a break section at an intermediate point along a length thereof to form a disconnect in the signal traces. The connector further includes an active compensation component bridging the break section in the signal traces. The active compensation component compensates the differential signal incoming from the input contact pads for signal degradation and transmits a compensated signal outward to the output contact pads. The active compensation component transmits the signal only in a single direction within the point-to-point architecture.

Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.

A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure, a microstrip structure, a stripline structure, or the like. The cable can be coupled to destination components using a variety of connection techniques, e.g., direct bonding to a circuit substrate, direct soldering to a flip chip, mechanical attachment to a component, or integration with a circuit substrate. The cable can also be terminated with any number of known or standardized connector packages, e.g., SMA, GPPO, or V connectors.

Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.

Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.

Detection of abnormal signal traces in electrochemical measurements generated using an electrochemical test strip to which a potential is applied allows for an indication of an erroneous analyte determination. The current trace has an expected shape in which a peak current is observed a time tpeak after which there is a decrease in current. To detect abnormal signal traces, the time tpeak is determined experimentally and compared with an expected value, t′peak, and if the difference between the two values to over a predetermined threshold, an error message is provided to the user instead of a test result. The value of t′peak is determined as a function of a mobility term that is determined during a potentiometry phase following the amperometric measurements.

A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure, a microstrip structure, a stripline structure, or the like. The cable can be coupled to destination components using a variety of connection techniques, e.g., direct bonding to a circuit substrate, direct soldering to a flip chip, mechanical attachment to a component, or integration with a circuit substrate. The cable can also be terminated with any number of known or standardized connector packages, e.g., SMA, GPPO, or V connectors.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

A connector and circuit board assembly includes terminals in a connector that are mounted to vias in a circuit board. Signal and ground terminals are thus coupled to signal traces and ground planes in the circuit board. Additional pinning vias that are aligned with the ground vias may be provided in a circuit board to help improve electrical performance at the interface between the terminals in the connector and the signal traces in the circuit board. A signal collar may allow pairs of signal traces to be split and routed around two difference sides of a via before rejoining while maintaining close electrical proximity that provides for relatively consistent electrical coupling between the traces in the pair of signal traces.

The present invention provides a method and apparatus for fabricating densely stacked ball-grid-array packages into a three-dimensional multi-package array. Integrated circuit packages are stacked on one another to form a module. Lead carriers provide an external point of electrical connection to buried package leads. Lead carriers are formed with apertures that partially surround each lead and electrically and thermally couple conductive elements or traces in the lead carrier to each package lead. Optionally thin layers of thermally conductive adhesive located between the lead carrier and adjacent packages facilitates the transfer of heat between packages and to the lead carrier. Lead carriers may be formed of custom flexible circuits having multiple layers of conductive material separated by a substrate to provide accurate impedance control and providing high density signal trace routing and ball-grid array connection to a printed wiring board.

A method of fabricating a printed circuit board having a coaxial via is disclosed. The method includes assembling a plurality of layers configured in a stack so that the plurality of layers has a top signal layer and a bottom signal layer; forming a hollow via through the plurality of layers to connect GND layers in the printed circuit board, forming or inserting into the hollow via a conductor coated with non-conductive material, covering the top layer and bottom layer with dielectric and patterned signal layers, covering the top layer and bottom layer with a masking agent, plating the top layer and bottom layer with a conductive material that connects signal traces within via, and removing the masking agent from the top layer and bottom layer.

Detection of abnormal signal traces in electrochemical measurements generated using an electrochemical test strip to which a potential is applied allows for an indication of an erroneous analyte determination. The current trace has an expected shape in which a peak current is observed a time tpeak after which there is a decrease in current. To detect abnormal signal traces, the time tpeak is determined experimentally and compared with an expected value, t′peak, and if the difference between the two values to over a predetermined threshold, an error message is provided to the user instead of a test result. The value of t′peak is determined as a function of a mobility term that is determined during a potentiometry phase following the amperometric measurements.

It will be understood by those skilled in the art that there is disclosed in the present application a biometric sensor that may comprise a plurality of a first type of signal traces formed on a first surface of a first layer of a multi-layer laminate package; at least one trace of a second type, formed on a second surface of the first layer or on a first surface of a second layer of the multi-layer laminate package; and connection vias in at least the first layer electrically connecting the signal traces of the first type or the signal traces of the second type to respective circuitry of the respective first or second type contained in an integrated circuit physically and electrically connected to one of the first layer, the second layer or a third layer of the multilayer laminate package.

A personal key having an inexpensive and robust integrated USB connector is disclosed. The apparatus comprises a circuit board having a processor and a plurality of conductive traces communicatively coupling the processor to a peripheral portion of the circuit board. The plurality of conductive traces includes, for example, a power trace, a ground trace, and at least two signal traces. The apparatus also comprises a first housing, having an aperture configured to accept the periphery of the circuit board therethrough, thereby presenting the plurality of conductive traces exterior to the aperture. The apparatus also comprises a shell, surrounding the plurality of conductive traces, the shell including at least one locking member interfacing with the first housing.

An HGA includes a magnetic head slider with at least one thin-film magnetic head element, a metal suspension for supporting the magnetic head slider, signal trace conductors formed via an insulation material layer on the metal suspension, for transmitting signals of the at least one thin-film magnetic head element, and external signal connection pads formed via an insulation material layer on the metal suspension and electrically connected to the signal trace conductors. At least part of the metal suspension under the external signal connection pads is removed.

A transmission line circuit is described which includes a conductive plane, a plurality of signal traces, and an intermediate layer between the conductive plane and the signal traces. The intermediate layer maintains a substantially constant separation between the conductive plane and the signal traces. At least a portion of the intermediate layer comprises air. The signal traces and the conductive plane form transmission lines.

A connector can be provided that allows for improved route-out including straight-back routing. Signal and ground terminal tails can be arranged in a single row to help facilitate such functionality. Consequentially, a connector with two vertically stacked card slots can be provided that allows for straight back routing of the signal traces in four layers while still providing a compact connector design.

A circuit board including a board substrate having opposite first and second sides. The board substrate has a thickness measured along a z-axis that is perpendicular to the first and second sides. The circuit board also includes plated thru-hole (PTH) vias extending along the z-axis from the first side into the board substrate. The PTH vias are arranged to form multiple signal pairs. The circuit board also includes signal traces that are directly coupled to the PTH vias and extend perpendicular to the z-axis in the board substrate. The signal traces and the PTH vias are configured to transmit differential signals. The circuit board also includes ground columns that extend along the z-axis in the board substrate. The ground columns are distributed relative to the signal pairs to form shield arrays. Each of the shield arrays surrounds one of the signal pairs, wherein the ground columns comprise microvias.

An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board. In view of the high frequencies used in today's wireless communication systems, the interconnection structure proposed aids in the practical implementation of radio frequency modules by mitigating the effects of impedance discontinuities ordinarily present at signal trace-to-via transition regions.

A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure. The cable can be coupled to destination components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.

A high speed flexible interconnect cable for an electronic assembly includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The cable can be coupled to electronic components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.

Analyzing interactions between vias in multilayered electronic packages that include at least two spaced-apart conducting planes, and multiple vias that connect signal traces on different layers. Voltages at active via ports are represented as magnetic ring current sources, which generate electromagnetic modes inside the plane structure. Substantial electromagnetic coupling between vias occurs. A full-wave solution of multiple scattering among cylindrical vias in planar waveguides is derived using Foldy-Lax equations. By using the equivalence principle, the coupling is decomposed into interior and exterior problems. For the interior problem, the dyadic Green's function is expressed in terms of vector cylindrical waves and waveguide modes. The Foldy-Lax equations for multiple scattering among the cylindrical vias are applied, and waveguide modes are decoupled in the Foldy-Lax equations. The scattering matrix of coupling among vias is then calculated for use in determining signal reflection, transmission, and / or coupling in the electronics package.

The present invention is a circuit board having a plurality of voids in a conductive reference plane to increase the characteristic impedance of a signal trace. The circuit board of the present invention comprises a conductive reference plane having a plurality of voids formed therein, and a signal trace formed over the conductive reference plane.

The embodiment of the invention discloses a display panel and a display device. The display panel comprises a first display area and a second display area, the second display area is multiplexed intoa sensor reserving area; the second display area comprises a plurality of light-transmitting areas and a plurality of non-light-transmitting areas, and the non-light-transmitting areas comprise a plurality of first-class non-light-transmitting areas and a plurality of second-class non-light-transmitting areas; one of the first-class non-light-transmitting areas and the second-class non-light-transmitting areas comprises pixel array areas which comprise sub-pixels of at least three luminous colors, and the other one of the first-class non-light-transmitting areas and the second-class non-light-transmitting areas comprises first trace concentration areas which comprise a plurality of parallel signal traces arranged of the at least three sub-pixels; or one of the first-class non-light-transmitting areas and the second-class non-light-transmitting areas comprises first pixel array areas, the other one of the first-class non-light-transmitting areas and the second-class non-light-transmitting areas comprises second pixel array areas and second trace concentration areas, andeach second trace concentration area comprises at least two parallel signal traces of the at least two sub-pixels.According to the technical scheme of the display panel andthe display device, normal display of the sensor setting area of the display panel is achieved, the screen-to-body ratio is increased, and theinfinity display is achieved.

A positive differential signal trace and a negative differential signal trace are formed on different layers of a printed circuit board. A first ground trace is formed on the layer on which the positive differential signal trace is formed, and a second ground trace is formed on the layer on which the negative differential signal trace is formed. An insulation layer is positioned between the two layers and has a predetermined thickness. A differential mode impedance and a common mode impedance of differential signals are dependent on the predetermined thickness of the insulation layer, width and thickness of each differential signal trace, and a space between each differential signal trace and the corresponding ground trace formed on the same layer.

A conductive ground layer provides a low cost method of reducing, controlling, or tailoring printed circuit board (PCB), for example, a motherboard, trace impedance and / or size, cross-talk, and EMI without having to add additional layers. A thin layer of conductive epoxy is applied over a solder mask high speed signal trace area of the PCB. The conductive epoxy is connected to or coupled to a ground plane or layer of the PCB. The inclusion of a higher number of traces on the PCB is made possible by tailoring the characteristic impedance of the traces, which allows the trace size to be reduced.