265results about "Orthogonal PCBs mounting" patented technology

An electronic system with multiple printed circuit boards interconnected through a midplane. Connectors are mounted on two sides of the midplane to facilitate connection of daughter cards from both the front and the back of the midplane. For cross-connecting coupling signals between daughter cards mounted to the front and daughter cards mounted to the back of the midplane, connectors mounted to the front and the back of the midplane are overlapped in certain regions. Within these regions, an efficient routing pattern is employed to cross-connect signals from the front of the midplane to the back of the midplane. The routing is achieved in a very small space but provides the desired impedance of the interconnects.

A differential connector has a plurality of rows. Each row includes a plurality of signal conductors provided as differential pairs. Each signal conductor has a first contact end connectable to a printed circuit board, a second contact end, and an intermediate portion having a first width. For each differential pair, one first contact end lies along a first line parallel to the plurality of rows and the other first contact end lies along a second line parallel to and spaced from the first line. The differential connector further includes a plurality of ground conductors, with each ground conductor corresponding to a differential pair. Each ground conductor has a first contact end connectable to the printed circuit board, a second contact end, and an intermediate portion having a second width that is at least twice the first width.

The embodiments of the present invention relate to an improved printed circuit board having additional rows of ground vias to reduce crosstalk in the board. A printed circuit board according to one embodiment of the present invention comprises a first row of vias and a second row of vias, each having a plurality of signal vias. The circuit board also comprises a plurality of rows of vias being coupled to a ground plane between the first row of signal vias and the second row of signal vias. According to one embodiment, the plurality of rows of vias being coupled to a ground plane comprise rows of vias having different sizes. Some of the vias are designed to receive a component, while others are generally smaller and designed to provide a return current path for the signal vias.

A system and method are disclosed in which flex cables are affixed to PCBs, for providing high-speed signaling paths between ICs disposed upon the PCBs. The flex cables are fixably attached to the PCBs so as to substantially mimic their structural orientation. Where the configuration includes more than one PCB, the flex cables include multiple portions which are temporarily separable from one another and from the die, using flex-to-flex and flex-to-package connectors, allowing field maintenance of the configuration. By routing the high-speed signals between ICs onto the flex cable, single-layer PCBs can be used for non-critical and power delivery signals, at substantial cost savings. By disposing the flex cables onto the PCB rather than allowing the cables to float freely, the configuration is thermally managed as if the signals were on the PCB and cable routing problems are avoided.

A switch chassis includes a plane having pass-through vias. An array of connector pairs is provided. A connector pair includes a first multi-path connector on first side of the plane and a second multi-path connector on the second side of the plane interconnected through the pass-through vias in the plane. Fabric cards can be connected to respective columns of first connectors and line cards can be connected respective rows of second connectors of the connector pairs to orient the fabric and lines cards orthogonally with respect to each other.

A receptacle assembly for a midplane connector system has a receptacle housing having openings receiving signal contacts and ground shields of a header assembly. The receptacle assembly includes contact modules coupled to the receptacle housing that each have a leadframe, a dielectric frame and a ground shield. The leadframe has signal contacts arranged in pairs carrying differential signals that are generally arranged along a leadframe plane with mating portions at ends thereof that have at least two points of contact electrically connected to a corresponding signal contact of the header assembly. The dielectric frame holds the signal contacts. The ground shield is coupled to a side of the dielectric frame and has ground tabs extending into the dielectric frame to provide electrical shielding between the pairs of signal contacts and grounding beams electrically connected to ground shields of the header assembly.

A circuit board design is disclosed that is useful in high-speed differential signal applications uses either a via arrangement or a circuit trace exit structure. In the via arrangement, sets of differential signal pair vias and an associated ground are arranged adjacent to each other in a repeating pattern. The differential signal vias of each pair are spaced closer to their associated ground via than the spacing between the adjacent differential signal pair associated ground so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias. The circuit trace exit structure involves the exit portions of the circuit traces of the differential signal vias to follow a path where they meet with and join to the transmission lines portions of the traces.

In the case where high speed differential signals are transmitted in differential transmission lines through via holes with open-stubs, signal waveforms are distorted due to impedance mismatch in the open-stubs of the via holes, thus causing jitter, which has become an issue of high speed signals. For differential transmission lines that pass through via holes with open-stubs, a degree of coupling of the lines is decreased while the differential characteristic impedance is made constant. Thereby, the effects of backward cross talk noise caused by the coupling can be minimized, and thus jitter can be suppressed.

A high-speed, high-power modular router is disclosed. As opposed to conventional designs using optical backplane signaling and/or bus bars for power distribution, the disclosed embodiments combine high-power, low-noise power distribution with high-speed signal routing in a common backplane. Disclosed backplane features allow backplane signaling at 2.5 Gbps or greater on electrical differential pairs distributed on multiple high-speed signaling layers. Relatively thick power distribution layers are embedded within the backplane, shielded from the high-speed signaling layers by digital ground layers and other shielding features. A router using such a backplane provides a level of performance and economy that is believed to be unattainable by the prior art.

A circuit board including a board substrate having opposite first and second sides. The board substrate has a thickness measured along a z-axis that is perpendicular to the first and second sides. The circuit board also includes plated thru-hole (PTH) vias extending along the z-axis from the first side into the board substrate. The PTH vias are arranged to form multiple signal pairs. The circuit board also includes signal traces that are directly coupled to the PTH vias and extend perpendicular to the z-axis in the board substrate. The signal traces and the PTH vias are configured to transmit differential signals. The circuit board also includes ground columns that extend along the z-axis in the board substrate. The ground columns are distributed relative to the signal pairs to form shield arrays. Each of the shield arrays surrounds one of the signal pairs, wherein the ground columns comprise microvias.

A bus system for carrying out data transfer between one bus master and a plurality of bus slaves. The bus system includes plural directional couplers which are formed by arranging respective parts of lines drawn from the bus slaves, without being in contact with, in the neighborhood of, and in parallel with a line drawn from the bus master. The line drawn from the bus master to a terminating resistance is wired to be folded. The directional couplers are further formed by arranging parts of the lines drawn from the bus slaves alternatively with respect to a first line part of the line drawn from the bus master ranging from the bus master to a fold of the line drawn from the bus master and with respect to a second line part of the line drawn from the bus master ranging from the fold to the terminating resistance.

An interface card-type motherboard containing a CPU, chipset, and memories. The interface card-type motherboard can be directly plugged to the original motherboard of a computer so as to upgrade the computer, whereby the computer can execute new software and connect with new peripheral devices.

A connector for coupling high frequency signals between devices includes a substrate having an array of vias for coupling a reference voltage to reference voltage traces that extend along the substrate surface between the devices. Signal traces including device pads for coupling signals to and from the devices alternate with the reference voltage traces. The widths of the reference voltage traces are varied to maintain a substantially constant separation between the reference voltage trace and an adjacent signal trace.

An optically connectable circuit board and optical components mounted thereon. At least one component includes optical transceivers and provides an optical connection to the board. Electronic components may be directly connected to the board electrically or optically. Also, some electronic components may be indirectly connected optically to the board through intermediate optical components.