1402results about "High voltage circuit adaptations" patented technology

An electric power conversion apparatus includes: a channel case in which a cooling water channel is formed; a double side cooling semiconductor module that comprises an upper and lower arms series circuit of an inverter circuit; a capacitor module; a direct current connector; and an alternate current connector. The semiconductor module comprises a first and a second heat dissipation metals whose outer surfaces are heat dissipation surfaces, the upper and lower arms series circuit is disposed tightly between the first heat dissipation metal and the second heat dissipation metal, and the semiconductor module further comprises a direct current positive terminal, a direct current negative terminal, and an alternate current terminal which protrude to outside. The channel case is provided with the cooling water channel which extends from a cooling water inlet to a cooling water outlet, and a first opening which opens into the cooling water channel.

An LED apparatus includes a base having thermal conductivity, an insulative substrate provided on one surface of the base and including electrodes provided on a surface of the substrate, at least one base-mounting area that is an exposed part of the base, exposed within a pass-through hole provided in the substrate, a plurality of LED elements mounted on the base in the base-mounting area and some of the LED elements in a unit electrically connected to the electrodes in series, a plurality of the units are electrically connected in parallel, and a frame disposed to surround the base-mounting area and configured to form a light-emitting area.

A method of manufacturing a multilayer printed circuit board (PCB) is provided, the PCB having blind vias connecting to power layers. A portion of the blind vias in the power layers are grouped together to form a cluster of blind vias. Signal layers, provided separate from the power layers, include signal routing channels, with at least some of the signal routing channels aligned above or below the cluster of blind vias of the power layers.

There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.

A filter for use in a coaxial cable network includes a printed circuit board having first and second opposed major surfaces, and first and second opposing sides. The opposed major surfaces are substantially parallel to a single plane, and are bisected by a longitudinal axis. The first and second opposing sides are substantially parallel to the longitudinal axis. The filter further includes an input terminal and an output terminal connected to the printed circuit board. The input terminal and the output terminal have an axis extending substantially parallel to the longitudinal axis. A signal path is disposed on the printed circuit board and extends from the input terminal toward the output terminal. The filter further includes a plurality of resonator elements fabricated upon the first opposed major surface. In one embodiment, the inductor elements are arranged in series along the signal path defining a footprint of less than 540 square millimeters. The filter passes a first range of frequencies in a provider bandwidth and attenuates a second range of frequencies in a personal data network bandwidth. In one embodiment, the resonator elements are parallel inductor elements and capacitor elements, the inductor elements being etched spiral inductors.

Nanotube ESD protective devices and corresponding nonvolatile and volatile nanotube switches. An electrostatic discharge (ESD) protection circuit for protecting a protected circuit is coupled to an input pad. The ESD circuit includes a nanotube switch electrically having a control. The switch is coupled to the protected circuit and to a discharge path. The nanotube switch is controllable, in response to electrical stimulation of the control, between a de-activated state and an activated state. The activated state creates a current path so that a signal on the input pad flows to the discharge path to cause the signal at the input pad to remain within a predefined operable range for the protected circuit. The nanotube switch, the input pad, and the protected circuit may be on a semiconductor chip. The nanotube switch may be on a chip carrier. The deactivated and activated states may be volatile or non-volatile depending on the embodiment. The ESD circuit may be repeatedly programmed between the activated and deactivated states so as to repeatedly activate and deactivate ESD protection of the protected circuit. The nanotube switch provides protection based on the magnitude of the signal on the input pad.

A high density electronic circuit for use in an implantable stimulation device that comprises a flexible substrate that has the advantage of integrating “chip-and-wire” microelectronic circuits and flexible interconnections that are adapted to conform to the body compatible housing into a single structure. The flexible substrate has die attach pads, each die attach pad having a set of wire bond pads therearound, each wire bond pad being connected to conductors formed within the substrate according to circuit function. A plurality of chip-and-wire integrated circuit (IC) chips are mounted by epoxy die attachment on the die attach pads, each IC chip has a plurality of contact pads formed on a top surface thereof, and gold wire bonds electrically connect the plurality of contact pads to the wire bonds pads. The wire bonds include a primary bond and, optionally, a safety bond for reinforcement. Other techniques are disclosed to enable the use of the gold wire bonds on a flexible substrate.

A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid FR-4 laminate, a polyimide, a polymer or a multilayer PCB via a process such as screen or stencil printing. In one embodiment, the VVM includes two types of conductive particles, one with a core and one without a core. The VVM can also have core-shell type semiconductive particles.

An interconnect system between an integrated circuit device and a printed circuit board may include a filter between the integrated circuit device and the power subsystem of the printed circuit board. The filter may be a low-pass filter that reduces current in a higher frequency range without negatively modifying current in a lower frequency range and may reduce radiated emissions produced during operation of the integrated circuit. The filter may be implemented by arranging core-power voltage conductors and ground conductors at a first or second level interconnect into one or more voltage groupings and one or more adjacent ground groupings such that series inductance is increased. In some embodiments, the first level interconnect may include conductive bumps or pads between an integrated circuit and a substrate. In some embodiments, the second level interconnect may include solder balls, pins, pads, or other conductors of a package, socket, or interposer.

A flexible printed circuit board (FPCB) and FPCB manufacturing method that improves a signal transfer characteristic at a high speed. The FPCB includes an insulating layer having a signal pattern that transfers signals, a cover layer formed on the signal pattern, and a shielding layer formed at a position opposite to the signal pattern. The shielding layer faces at least one of the insulating layer and the cover layer across anspace formed there between.

Techniques for preventing electrostatic discharge (ESD) and circuit noise are provided. More particularly, the present invention provides a method to prevent ESD damage during the assembly of computer disk commonly called a hard disk for memory applications. The coating mainly involves a ion-deposition process. Merely by way of example, the present invention is implemented by using filtered cathodic vacuum arc (FCVA) with a dissipative crystalline and/or amorphous carbon base thin film coating on a flexible circuit to drain the potential electrostatic charges during circuit assembly and interconnect processes, yet it would be recognized that the invention has a much broader range of applicability on any electronic apparatus that is susceptible to electrostatic damage and static noise.

The present invention provides overvoltage circuit protection. Specifically, the present invention provides a voltage variable material (“VVM”) that includes an insulative binder that is formulated to intrinsically adhere to conductive and nonconductive surfaces. The binder and thus the VVM is self-curable and may be applied to an application in the form of an ink, which dries in a final form for use. The binder eliminates the need to place the VVM in a separate device or for separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid (FR-4) laminate, a polyimide or a polymer. The VVM can also be directly applied to different types of substrates that are placed inside a device.

Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.

A lightning protection appliqué incorporates a plurality of conductive plies adhesively affixed to a composite surface, at least a first one of the plies providing conductive characteristics sufficient to divert electrical energy from a lightning strike and at least a second one of the plies comprising operational circuitry. A dielectric ply is fixed to the composite surface over and completely covering at least one metal surface feature between the plurality of conductive plies and the composite surface.

A compliant printed flexible circuit including a flexible polymeric film and at least one dielectric layer bonded to the polymeric film with recesses corresponding to a target circuit geometry. A conductive material is printed in at least a portion of the recesses to form a circuit geometry. At least one dielectric covering layer is printed over at least the circuit geometry. Openings can be printed in the dielectric covering layer to provide access to at least a portion of the circuit geometry.

An improved electrical circuit that includes an embedded electrical component and an embedded voltage variable material (“VVM”) is provided. In one embodiment, the embedded VVM is provided as a voltage variable substrate, which is used in combination with an embedded electrical component, such as an embedded resistive material or an embedded capacitive material.

An electromagnetic interference filter and surge suppression apparatus comprising: a first filter operably connected in series with the first power input terminal and a first output terminal and an impedance comprising a first conductor on a first layer of a circuit card forming a distributed inductance in series with the second filter, the impedance also including a second conductor on a second layer of the circuit card operably connected to a ground, the first conductor and the second conductor forming a distributed capacitance.

Example embodiments utilize machines to model reservoir geometry having geological layers as 2.5D unstructured grids. Example embodiments include program products to simulate a reservoir by generating a reservoir data system, performing a numerical fluid flow simulation, and visualizing the simulation. Data system embodiments include data structures to model a reservoir geometry as laterally unstructured two-dimensional (2D) grids and associated layer depths defining z-lines to thereby define a 2.5D unstructured grid, including datasets for: vertices of the grid cells for the future grid top and bottom surfaces, a number and listing of vertices for each grid cell, cell center coordinates, and vertex adjacency information using a compressed sparse row format. Computer-implemented methods include projecting external and internal boundaries onto a future grid surface; generating 2D unstructured, e.g., Voronoi, grids, for the top and bottom surfaces; and generating z-lines of depths corresponding to reservoir layers to thereby generate 2.5D unstructured grids.

A digital core embodied within a semiconductor die is situated within any of a variety of integrated circuit packaging technologies including but not limited to Ball Grid Array or Quad Flat Pack surface mount technology. Said semiconductor die is of the variety that requires plural separate power supply voltage domains such as a digital core supply of differing voltage than the input/output pad ring supply voltage. Within the integrated circuit package including said semiconductor die also exists a high efficiency DC-to-DC voltage converter of type commonly known as a chopper or a switch mode power supply. In the preferred embodiment this switch mode power supply would be of the highest efficiency, a synchronous step-down regulator, thus to enable powering the entire integrated circuit from one supply voltage. The components contained within the integrated circuit package along with the semiconductor die include the majority if not the totality of the components comprising the switch mode power supply, which could include the power switching transistors; an inductor core and windings; the output voltage fixing circuitry; the output capacitor; and the substrate for mounting said components when integrated within a packaging technology that does not already include a substrate such as within the periphery of a lead frame for leaded devices.

A voltage regulator. The voltage regulator includes an interposer having, on a first side, a plurality of electrical connections suitable for coupling to a printed circuit board (PCB). The interposer also includes at least one power plane and at least one ground plane, wherein each of the power and ground planes is coupled to one or more of the electrical connections. The voltage regulator further includes a DC-DC converter that is electro-mechanically attachable to and detachable from the interposer. The interposer includes a socket, on a second side, that is suitable to receive two or more electro-mechanical connecting members of the DC-DC converter. When the DC-DC converter is attached to the interposer, at least one of the electromechanical connecting members is electrically coupled to a power plane of the interposer, while at least one other one of the electromechanical connecting members is electrically coupled to the ground plane.

A plurality of signal conductor wires connected respectively to signal lead patterns, and a plurality of power conductor wires connected respectively to power lead patterns are formed on a connector tail and are arranged to extend in a leading-out direction. A pitch of the power conductor wires is twice larger than a pitch of the signal conductor wires. A sufficient insulating gap is secured between the adjacent power conductor wires, and therefore there is no fear that the short-circuiting occur even when a high drive voltage is applied.