1586 results about "Electronic packages" patented technology

The invention is directed to a method of bonding a hermetically sealed electronics package to an electrode or a flexible circuit and the resulting electronics package, that is suitable for implantation in living tissue, such as for a retinal or cortical electrode array to enable restoration of sight to certain non-sighted individuals. The hermetically sealed electronics package is directly bonded to the flex circuit or electrode by electroplating a biocompatible material, such as platinum or gold, effectively forming a plated rivet-shaped connection, which bonds the flex circuit to the electronics package. The resulting electronic device is biocompatible and is suitable for long-term implantation in living tissue.

An electronic package assembly is formed with a plurality of integrated circuit dies stacked in layers. At least one first die is placed on a substrate. Each subsequent layer of the stack contains at least one die. Each die on each layer has a size and shape such that, when placed on the dies on a lower layer, it is offset from the edges of the dies on the lower layer to allow affixing of wirebonds to input/output pads of the dies on the lower layer. Each die on each layer with more than one die has input/output pads placed on two sides of the die. Each die on an upper layer is placed orthogonally to each die of a lower each layer such that wirebonds are affixed without interference.

A medical monitor includes a lanyard and an electronic package supported in the manner of a pendant. The lanyard includes integral electrodes or other sensors for making physiological measurements, auxiliary components and connectors for electrically connecting the electrodes or sensors to the electronic package. The physiological measurements may be stored in the monitor for later readout, or may be transmitted, before or after processing, to a remote location.

A flexible circuit electronic package including a heat sink, a flexible circuit having a semiconductor chip positioned thereon and electrically coupled thereto, and a quantity of heat shrunk adhesive securing the flexible circuit to the heat sink such that the flexible circuit is planar. This package is then adapted for being positioned on and electrically coupled to a circuitized substrate such as a printed circuit board. A method of making this package is also provided.

A heat sink in a heat transfer relationship with a substrate such as an integrated chip, chip carrier, or other electronic package. The heat sink is connected to a frame which is connected to a printed circuit board or other suitable support on which the substrate is positioned. The heat sink, which extends through an aperture in the frame is coupled to a surface of the substrate. The heat sink is mechanically decoupled from the substrate. Large heat sinks may be thermally connected to surface mount substrates mounted using technologies such as ceramic ball or column grid arrays, plastic ball or column grid arrays, or solder balls or columns. The heat sink is attached coaxially through the aperture to the substrate. After assembly and lead/tin or other metallic surface mount interconnects are relaxed such that the substrate and is completely supported by the frame and the heat sink imparts zero or nearly zero downward force. Because the heat sink moves freely within the aperture during assembly, the heat sink package is useful for a variety of different substrates. Preferably, the frame is a plate and a plurality of studs. The plate material are selected to match the thermal expansion of the underlying support, and the stud material matched the thermal expansion of the substrate. Thus, the frame construction allows matching expansion and contraction of the assembly to the underlying substrate and support.

Organic electronic packages having sealed edges. More specifically, packages having organic electronic devices are provided. A number of sealing mechanisms are provided to hermetically seal the edges of the package to completely protect the organic electronic device from external elements. A sealant may be implemented to completely surround the organic electronic device. Alternatively, edge wraps may be provided to completely surround the organic electronic device.

The invention is directed to a method of bonding a hermetically sealed electronics package to an electrode or a flexible circuit and the resulting electronics package, that is suitable for implantation in living tissue, such as for a retinal or cortical electrode array to enable restoration of sight to certain non-sighted individuals. The hermetically sealed electronics package is directly bonded to the flex circuit or electrode by one of several methods, including attachment by an electrically conductive adhesive, such as epoxy or polyimide, containing platinum metal flake in biocompatible glue; diffusion bonding of platinum bumps covered by an insulating layer; thermal welding of wire staples; or an integrated interconnect fabrication. The resulting electronic device is biocompatible and is suitable for long-term implantation in living tissue.

An electronic package, and method of making the electronic package, is provided. The package includes a semiconductor chip and an multi-layered interconnect structure having a high density interconnect layer such as an allylated surface layer. The semiconductor chip includes a plurality of contact members on one of its surfaces that are connected to the multi-layered interconnect structure by a plurality of solder connections. The multi-layered interconnect structure is adapted for electrically interconnecting the semiconductor chip to a circuitized substrate (eg., circuit board) with another plurality of solder connections and includes a thermally conductive layer being comprised of a material having a selected thickness and coefficient of thermal expansion to substantially prevent failure of the solder connections between said first plurality of electrically conductive members and the semiconductor chip. The electronic package further includes a dielectric material having an effective modulus to assure sufficient compliancy of the multi-layered interconnect structure during operation. The allylated surface layer has the property of being able to withstand thermal stresses that arise during thermal cycling operation of the electronic package.

A method for determining full chip leakage power first estimates leakage power and dynamic power for each circuit macro. The power supply voltage to each macro is first assumed to be nominal. The power dissipation for each macro is modeled as a current source whose value is the estimated power divided by the nominal power supply voltage. The power distribution network is modeled as a resistive grids. The thermal environment of the IC and its electronic package are modeled as multi dimensional grids of thermal elements. Algebraic multi-grid (AMG) methods are used to calculate updated circuit macro voltages and temperatures. The macro voltages and temperatures are updated and updated leakage and dynamic power dissipation are calculated. Iterations are continued until leakage power converges to a final value.

An electronic package is provided for dissipating heat away from electronic devices. The package includes a substrate and electronic devices mounted on the substrate. The package also has a thermally conductive heat sink assembled over the electronic device. The heat sink includes compliant pedestals each having a contact surface for contacting a surface of an electronic device to conduct thermal energy away from the electronic device. The package is held together such that the heat sink is in contact with the surface of an electronic device such that each compliant pedestal applies a compressive force to the surface of the electronic device.

An electronic package includes a die including a thermal interface material through which a primary heat flux path is enabled for conducting heat from the die, an organic substrate, and a thermal interposer provided between the organic substrate and the die, the thermal interposer having an area extending beyond a footprint of the die, the area including the thermal interface material, the thermal interposer conducting heat generated by the die through the thermal interface material such that an auxiliary heat flux path for conducting heat generated in the die is enabled.

An assembly is provided for an implantable medical lead. The assembly includes a first lead body comprising one or more electrical leads, and a hermetic encasement. The encasement comprises a housing having first and second openings and interior walls, an interior space defined by the interior walls, an electronic network housed within the interior space, and a circuit board extending through the first and second openings. The circuit board comprises a plurality of layers into which the electronic network is at least partially integrated, a first set of one or more terminals electrically coupling the electronic network to the first lead body, and a second set of one or more terminals electrically coupled to the electronic network for external electrical engagement.

An electrical connector assembly (1) for electrically connecting an electronic package (2) with a circuit substrate (4). The connector assembly includes a socket (11), and a fastening device (10) surrounding the socket. The fastening device includes an insulative frame (13), and a lever (12) and a metal clip (14) respectively pivotably mounted to a first side (131) and a second side (132) of the frame. The first side of the frame defines a pair of guiding grooves (161). Each guiding groove is bounded in part by a lower arcuate wall (162) and an upper arcuate wall (163). The lever includes a pair of acting portions (123) movably received in the guiding grooves. When the lever is rotated from a vertical position down toward the clip, the acting portions of the lever slide from the lower walls to the upper walls.

An electronic package having a controlled standoff height between a surface mount electronic device and a substrate includes a plurality of polymeric standoffs adhered to at least one of the underside of the surface mount electronic device or an upper surface of the substrate. The polymeric standoffs prevent collapse of the surface mount electronic device during overmolding or encapsulation of the surface mount electronic device.