741 results about "Electronic packages" patented technology

A method for forming the same is provided. The method comprises: providing a package substrate; attaching back conductive blocks onto a back surface of the package substrate via back solder bump; loading the package substrate on a first bottom chase with the back conductive blocks facing upward, and pressing, with a first top chase, the back conductive blocks against the first bottom chase to reshape the back solder bumps and horizontally align top surfaces of the back conductive blocks with each other; attaching front conductive blocks onto a front surface of the package substrate via front solder bumps; loading the package substrate on a second bottom chase with the front conductive blocks facing upward, and pressing, with a second top chase, the front conductive blocks against the second bottom chase to reshape the front solder bumps and horizontally align top surfaces of the front conductive blocks with each other.

An electronic package provides a plurality of conductive posts having separable blocks and a first electronic component having a separable block, and a cladding layer wraps the first electronic component, the separable blocks and the conductive posts to expose the separable blocks out of a surface of the cladding layer, and then the separable blocks are removed to form a plurality of conductive posts having a plurality of separable blocks and a plurality of conductive posts having a plurality of separable blocks and a plurality of conductive posts having a plurality of separable blocks and a plurality of conductive posts having a plurality of separable blocks. And a plurality of conductive columns are arranged on the surface of the cladding layer so as to form a plurality of concave parts on the surface of the cladding layer, and the plurality of conductive columns and the first electronic element are exposed out of the concave parts, so that through the design of the concave parts, the contact area between a circuit part subsequently formed on the cladding layer and the cladding layer is increased, and the condition of delamination of the circuit part is avoided during thermal circulation.

An electronic package is mainly characterized in that a dam body is formed at the edge of the electronic package to prevent a packaging material from overflowing to the lower part, so that the packaging material does not contact a conductive element below the packaging material, and the problem that the conductive element is not wetted during subsequent reflow soldering of the conductive element can be avoided.

The invention relates to an electronic package with a recessed terminal. A power module includes a substrate including an electrically insulating layer. A first conductive region, a second conductive region, and a third conductive region are each disposed on the electrically insulating layer. The conductive regions are electrically isolated from each other. A plurality of high-side power switches are disposed on and electrically coupled to the first conductive region. A first connector is coupled between the plurality of high side power switches and the second conductive region. A plurality of low-side power switches are disposed on and electrically coupled to the second conductive region. The insulative encapsulant at least partially encapsulates the power module assembly. The enclosure defines a plurality of recesses disposed in a bottom surface of the power module. A plurality of conductive pins extend from the bottom surface. Each conductive pin is aligned with a respective recess of the plurality of recesses.

Electronic packages and package-on-package structures are described. In an embodiment, an electronic package include multiple staircased dies and multiple vertical wire bonds encapsulated by a molding layer, where the multiple vertical wire bonds protrude from a top surface of the molding layer so that the vertical wire bonds stand proud above a top surface of the molding layer.

An electronic package and a manufacturing method thereof are provided, in which a plurality of conductive pillars with detachable blocks and a first electronic component with detachable blocks are provided, and the first electronic component, the plurality of detachable blocks and the plurality of conductive pillars are covered with an encapsulating layer, so that the plurality of detachable blocks are exposed from the surface of the encapsulating layer, and then the plurality of detachable blocks are removed to form a plurality of recesses on the surface of the encapsulating layer, so that the plurality of conductive pillars and the first electronic component are exposed from the recesses. Therefore, through the design of the recesses, the contact area between the circuit portion subsequently formed on the encapsulating layer and the encapsulating layer can be increased, thereby preventing from peeling of the circuit portion during thermal cycles.

Provided are an electronic package and a manufacturing method thereof. An electronic component is embedded in an encapsulation layer, the electronic component has a first electrode pad and a second electrode pad on two opposite sides thereof to form a double-sided power supply structure, and thus a circuit structure and a wiring structure on the two opposite sides of the electronic component can be electrically connected to the first electrode pad and the second electrode pad, thereby it is beneficial for reducing loss of the power.

The invention provides two-component low-hardness silicone rubber based on a vinyl silicone oil / silicon dioxide composite material and a preparation process of the two-component low-hardness silicone rubber. By introducing modified silicon dioxide, a photoinitiator and a platinum catalyst and combining a dual cross-linking mechanism of ultraviolet curing and thermocuring, rapid curing and uniform deep cross-linking of the silicone rubber are realized. And the modified silicon dioxide adopts a core-shell structure design, so that the compatibility of the filler and a matrix is improved, and the mechanical property and long-term stability of the material are effectively improved. The prepared silicone rubber has low hardness, high tensile strength, excellent high temperature resistance and self-repairing capability, and is suitable for the fields of electronic packaging, medical instruments, automobile parts and the like. The process is simple and convenient, the curing speed is high, the product performance is excellent, and the industrial application value is wide.

The invention relates to a high-performance electronic packaging adhesive based on graphene composite diamond micro-powder and a preparation method of the high-performance electronic packaging adhesive. By adding surface-modified graphene composite diamond micro-powder and a fumed silica dispersing agent into an epoxy resin system, an efficient heat-conducting grid is formed in a resin matrix, so that the heat-conducting effect is remarkably improved, the interface interaction between a heat-conducting filler and the resin matrix is synergistically and efficiently enhanced, and the compatibility is improved; the influence on the processability and the mechanical property of the resin matrix when a large amount of heat-conducting filler is conventionally added is avoided. In addition, a self-developed liquid nitrogen-phosphorus flame retardant and a toughening agent are added, so that the packaging adhesive has good flame retardance and toughness while high heat conductivity is ensured. The proportion range of the modified graphene composite diamond micropowder and fumed silica is determined by optimizing the formula, the addition amount of the heat-conducting filler in the packaging adhesive is reduced to the maximum extent, the reaction cost is effectively reduced, and meanwhile, the advantages of high heat conductivity, high flame retardance and good toughness of the packaging adhesive are synergistically realized. The packaging adhesive is suitable for the field of wider electronic packaging materials.

An antenna substrate, electronic package and manufacturing method thereof are provided in which an antenna substrate including a silicon core layer, a circuit structure and conductive pillars, and the circuit structure has a first dielectric layer, a first circuit layer and a first antenna portion. The circuit structure and the conductive pillars are formed on opposite sides of the silicon core layer, and the antenna substrate is stacked and bonded to a circuit board having a second antenna portion through the conductive pillars. Thereby, the present disclosure can thin a thickness of the antenna substrate and the electronic package, or precisely control a distance between the antenna substrate and the circuit board.

An electronic package and a method of fabricating the same are provided, including providing a first carrier structure and a second carrier structure having a thickness smaller than that of the first carrier structure, disposing at least one first electronic component on the first carrier structure, and disposing at least one second electronic component on the second carrier structure. The first electronic component and the second electronic component are wrapped by a wrapping layer, so that the second electronic component can be arranged on the second bearing structure by adopting a packaging module, and the problem that the packaging module is too high is avoided.

An electronic package and a manufacturing method thereof are provided, mainly an electronic component stacking structure is arranged on a bearing structure to integrate a plurality of chips in a single package, so that the electronic package can meet the requirement of miniaturization without increasing the layout area of the bearing structure.

An electronic package is provided, in which an electronic element that is electrically connected to a plurality of conductive vias and a functional part that has a hollow area are disposed on a photonic die that has the plurality of conductive vias and at least one external connection portion, where a cladding layer covers the electronic element and the functional part, such that the external connection portion is exposed from the hollow area and the cladding layer for an optical fiber to insert into the hollow area and connect to the external connection portion, so as to achieve the purpose of optoelectronic integration.

A microelectronic socket structure and a method of forming the same. The socket structure comprises: a socket structure housing defining a cavity therein; and an interconnection structure including: a contact element disposed at least in part within the cavity, and configured to be electrically coupled to a corresponding microelectronic package, the contact element corresponding to one of a signal contact element or a ground contact element; and a conductive structure disposed at least in part within the cavity, electrically coupled to the contact element, and having an outer contour that is non-conformal with respect to an outer contour of the contact element.

An electronic package and its supporting structure and manufacturing method. The supporting structure includes a protective layer formed on a metal part with multiple conductive columns, and the protective layer exposes the end faces of the conductive columns to allow conductors to be formed on the end faces of the conductive columns to avoid damage to the protective layer.

Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers. An example wafer-level process fabricates running waveguides, optical routing, and direct-bonded optical interconnects for silicon photonics and optoelectronics packages when two wafers are joined.

The invention provides a method for synthesizing aluminum nitride fibers by preheating combustion, which comprises the following steps: preheating aluminum powder and aluminum nitride serving as raw materials in a low-pressure nitrogen environment, and then inducing a combustion synthesis reaction to prepare the aluminum nitride fibers with the average diameter of 0.3-0.8 mu m and the average length of 400-800 mu m. The preparation method has the characteristics of simple process, low preparation cost and the like, and the prepared aluminum nitride fiber can be used as a high-thermal-conductivity filler for electronic packaging.

An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.

The invention relates to the technical field of electronic packaging materials, and discloses an epoxy molding compound and a preparation method thereof. The epoxy molding compound is prepared from the following raw materials in percentage by weight: 70 to 90 percent of filler, 5 to 15 percent of epoxy resin, 3.1 to 10.5 percent of phenolic resin-stearylamine intermediate, 0.2 to 0.8 percent of catalyst, 1 to 5 percent of stress absorbent, 0.2 to 2 percent of coupling agent, 0.1 to 1.2 percent of release agent and 0.1 to 0.5 percent of coloring agent. According to the invention, by adding the phenolic resin-stearylamine intermediate into the epoxy molding compound, the final volume resistivity of the epoxy molding compound can be reduced to 108-1011 omega.cm, and by reducing the volume resistivity and improving the conductivity of the material, rapid release of static electricity is realized, and the problem of electrostatic adsorption is solved.

The invention discloses an antistatic polyester film capable of phase change temperature regulation and a preparation method thereof, the film provided by the invention has a double-layer structure, the bottom layer is a temperature regulation functional layer doped with a phase change material, and the surface layer is a functional layer doped with carbon black to prevent electrostatic aggregation. According to the antistatic polyester film capable of adjusting the temperature through phase change, the adjusting temperature is 27 DEG C, the phase change enthalpy is 17 j / g, the surface resistivity of the surface layer is 1.1 * 10 < 7 > omega / m < 2 >, and the antistatic polyester film is expected to be applied to the fields of intelligent wearable equipment, medical sensors, electronic packaging materials, supercapacitor protection layers and the like.

The invention discloses a nano composite material of liquid silica gel and a preparation equipment control system thereof. The nano composite material of liquid silica gel is prepared from the following materials: 50-85% of a silica gel matrix; 50 to 300 parts of nano filler, wherein the nano filler is prepared from graphene nanosheets, nano titanium dioxide and carbon nanotubes; 15-100 parts of a surface modifier, wherein the surface modifier is selected from a composite system containing a siloxane coupling agent and polyether amine; 10-50 parts of a functional auxiliary agent, wherein the functional auxiliary agent comprises a flame retardant and a heat conducting agent; the nanofiller is uniformly distributed in the silica gel matrix through an in-situ dispersion technology, and the surface of the nanofiller is subjected to plasma treatment to form a chemical bonding interface. According to the material design, the problems of dispersion and function collaboration of the nanofiller are solved, an intelligent control system achieves multi-layer optimization of technological parameters through deep fusion of an algorithm and hardware, the industrialization potential is achieved, and the method is particularly suitable for the high-end fields such as high-precision electronic packaging adhesives and flexible heat conduction interface materials.

Described herein is a novel approach that leverages a 3D stacked die complex with an active optical interposer integrated with an I / O chiplet including high-speed serializer / deserializer (SerDes). By integrating silicon in this way, shoreline constraints are eliminated, allowing for the SerDes macros to be placed virtually anywhere on the I / O chiplet. The photonic-based interconnects described herein improve upon conventional approaches based on co-packaged optics (CPO), Linear-drive Pluggable Optics (LPO) and copper-based solutions in terms of bandwidth and power consumption. The interconnects described herein rely on photonic-electronic packages in which a PIC provides processing units (e.g., XPU), electronic switching chips or other types of application-specific integrated circuits (ASIC) with access to optical fiber-based networks while multiple SerDes provide high-speed serialization and deserialization.

An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing an adhesive layer to attach an upper electronic package to a lower die and / or utilizing metal pillars for electrically connecting the upper electronic package to a lower substrate, wherein the metal pillars have a smaller height above the lower substrate than the lower die.

Embodiments disclosed herein include electronic packages with photonics integrated circuits (PICs). In an embodiment, an electronic package comprises a glass substrate with a first recess and a second recess. In an embodiment, a PIC is in the first recess. In an embodiment, an optics module is in the second recess, and an optical waveguide is embedded in the glass substrate between the first recess and the second recess. In an embodiment, the optical waveguide optically couples the PIC to the optics module.

The invention relates to the technical field of dissimilar material connection, in particular to a lead-free composite brazing filler metal and method for low-temperature connection of large-size ceramic and metal, the composite brazing filler metal is obtained by mixing copper powder and tin-bismuth welding powder according to the mass ratio of 1: 75-100, tabletting and standing; wherein the tin content in the tin-bismuth welding powder is 42%, and the bismuth content in the tin-bismuth welding powder is 58%. According to the Cu-SnBi composite solder developed by the invention, the brittleness of the SnBi solder is effectively avoided, and the Cu-SnBi composite solder is particularly suitable for large-size (mainly aiming at electronic packaging welding spots at present and relatively small in size) brazing, can realize successful welding at the temperature of 200 DEG C or below without brittle cracking, and is excellent in comprehensive mechanical property.

The invention discloses an electronic packaging component reflow soldering thermal deformation testing method based on reliability analysis, relates to the technical field of electronic packaging testing, and aims to solve the problems that a packaging body of an existing electronic packaging component is gradually thinned, and due to the difference of physical attributes of packaging body forming materials, the packaging body is not thinned. And the problem of packaging body warping caused by temperature change in the reflow soldering process of the electronic packaging component is solved. According to the electronic packaging component reflow soldering thermal deformation testing method based on reliability analysis, the thermal deformation condition of an electronic packaging component in a high-temperature state can be analyzed in a room-temperature state, reflow soldering thermal deformation testing of the electronic packaging component is achieved at low cost, the testing point coverage ranges from 11 DEG C to 313 DEG C, and the testing accuracy is high. The device can test component packaging including common BGA packaging, LGA packaging, QFN packaging and the like, can meet the assembly test requirements of electronic packaging components of most production lines, is high in applicability and low in cost, and can effectively evaluate the welding reliability of the components.

The invention discloses a phosphorus-nitrogen macromolecule modified MOFs flame retardant and an epoxy resin composite material and a preparation method thereof, and belongs to the technical field of flame-retardant composites.The nanometer flame retardant takes NH2-MIL-125 as a matrix, a phosphorus-chlorine bond compound and an amido compound are sequentially grafted, and in-situ polymerization is conducted to form a phosphorus-nitrogen coating layer; the composite material is prepared from 77.15 to 80.44 parts of epoxy resin, 16.85 to 17.56 parts of a curing agent and 1 to 6 parts of M (at) F-PZN through high-temperature curing. When the addition amount of the flame retardant is less than or equal to 6wt%, the peak value of the heat release rate of the composite material is reduced by 51.6%, the maximum smoke production rate is reduced by 51.5%, the tensile strength is improved by 62.2% compared with that of pure epoxy when the flame retardant is added by 2wt%, synergistic improvement of flame retardance, smoke suppression, toxicity reduction and mechanical properties is realized, and the flame retardant is suitable for the fields of electronic packaging, aerospace and the like.

An electronic package and a manufacturing method thereof are provided, in which a plurality of photonic integrated circuit chips and an auxiliary electronic element are separately configured on a package module to shorten the transmission distance of the optical signal. Therefore, the signal transmission rate of a circuit structure can be increased, thereby improving the overall operating performance of the electronic package.

The invention relates to a method for establishing a viscoplastic constitutive model of a solder bump considering damage. Comprising the following steps: performing a uniaxial tension and compression test on a solder bump sample to obtain a macroscopic stress-strain curve of the sample; a unit cube finite element model is established, the unit cube finite element model adopts the solder constitutive model constructed in the step (2), loads are set for the model for numerical simulation, and a stress-strain curve calculated by the model is obtained; and fitting the stress-strain curve obtained by simulation in the step (3) with the macroscopic stress-strain curve obtained by the tension and compression test in the step (1) through a test parameter method, and determining parameters of the solder constitutive model, so that the final solder bump viscoplastic constitutive model considering the damage is established. The method can accurately predict the deformation and other mechanical behaviors of the solder under the thermal-force loading condition, and can be widely applied to fatigue life prediction and reliability evaluation of the electronic packaging structure.