577 results about "Electronic packages" patented technology

An electronic package is mainly characterized in that a dam body is formed at the edge of the electronic package to prevent a packaging material from overflowing to the lower part, so that the packaging material does not contact a conductive element below the packaging material, and the problem that the conductive element is not wetted during subsequent reflow soldering of the conductive element can be avoided.

Electronic packages and package-on-package structures are described. In an embodiment, an electronic package include multiple staircased dies and multiple vertical wire bonds encapsulated by a molding layer, where the multiple vertical wire bonds protrude from a top surface of the molding layer so that the vertical wire bonds stand proud above a top surface of the molding layer.

Provided are an electronic package and a manufacturing method thereof. An electronic component is embedded in an encapsulation layer, the electronic component has a first electrode pad and a second electrode pad on two opposite sides thereof to form a double-sided power supply structure, and thus a circuit structure and a wiring structure on the two opposite sides of the electronic component can be electrically connected to the first electrode pad and the second electrode pad, thereby it is beneficial for reducing loss of the power.

The invention relates to a high-performance electronic packaging adhesive based on graphene composite diamond micro-powder and a preparation method of the high-performance electronic packaging adhesive. By adding surface-modified graphene composite diamond micro-powder and a fumed silica dispersing agent into an epoxy resin system, an efficient heat-conducting grid is formed in a resin matrix, so that the heat-conducting effect is remarkably improved, the interface interaction between a heat-conducting filler and the resin matrix is synergistically and efficiently enhanced, and the compatibility is improved; the influence on the processability and the mechanical property of the resin matrix when a large amount of heat-conducting filler is conventionally added is avoided. In addition, a self-developed liquid nitrogen-phosphorus flame retardant and a toughening agent are added, so that the packaging adhesive has good flame retardance and toughness while high heat conductivity is ensured. The proportion range of the modified graphene composite diamond micropowder and fumed silica is determined by optimizing the formula, the addition amount of the heat-conducting filler in the packaging adhesive is reduced to the maximum extent, the reaction cost is effectively reduced, and meanwhile, the advantages of high heat conductivity, high flame retardance and good toughness of the packaging adhesive are synergistically realized. The packaging adhesive is suitable for the field of wider electronic packaging materials.

An antenna substrate, electronic package and manufacturing method thereof are provided in which an antenna substrate including a silicon core layer, a circuit structure and conductive pillars, and the circuit structure has a first dielectric layer, a first circuit layer and a first antenna portion. The circuit structure and the conductive pillars are formed on opposite sides of the silicon core layer, and the antenna substrate is stacked and bonded to a circuit board having a second antenna portion through the conductive pillars. Thereby, the present disclosure can thin a thickness of the antenna substrate and the electronic package, or precisely control a distance between the antenna substrate and the circuit board.

An electronic package and a method of fabricating the same are provided, including providing a first carrier structure and a second carrier structure having a thickness smaller than that of the first carrier structure, disposing at least one first electronic component on the first carrier structure, and disposing at least one second electronic component on the second carrier structure. The first electronic component and the second electronic component are wrapped by a wrapping layer, so that the second electronic component can be arranged on the second bearing structure by adopting a packaging module, and the problem that the packaging module is too high is avoided.

An electronic package is provided, in which an electronic element that is electrically connected to a plurality of conductive vias and a functional part that has a hollow area are disposed on a photonic die that has the plurality of conductive vias and at least one external connection portion, where a cladding layer covers the electronic element and the functional part, such that the external connection portion is exposed from the hollow area and the cladding layer for an optical fiber to insert into the hollow area and connect to the external connection portion, so as to achieve the purpose of optoelectronic integration.

A microelectronic socket structure and a method of forming the same. The socket structure comprises: a socket structure housing defining a cavity therein; and an interconnection structure including: a contact element disposed at least in part within the cavity, and configured to be electrically coupled to a corresponding microelectronic package, the contact element corresponding to one of a signal contact element or a ground contact element; and a conductive structure disposed at least in part within the cavity, electrically coupled to the contact element, and having an outer contour that is non-conformal with respect to an outer contour of the contact element.

An electronic package and its supporting structure and manufacturing method. The supporting structure includes a protective layer formed on a metal part with multiple conductive columns, and the protective layer exposes the end faces of the conductive columns to allow conductors to be formed on the end faces of the conductive columns to avoid damage to the protective layer.

Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers. An example wafer-level process fabricates running waveguides, optical routing, and direct-bonded optical interconnects for silicon photonics and optoelectronics packages when two wafers are joined.

The invention provides a method for synthesizing aluminum nitride fibers by preheating combustion, which comprises the following steps: preheating aluminum powder and aluminum nitride serving as raw materials in a low-pressure nitrogen environment, and then inducing a combustion synthesis reaction to prepare the aluminum nitride fibers with the average diameter of 0.3-0.8 mu m and the average length of 400-800 mu m. The preparation method has the characteristics of simple process, low preparation cost and the like, and the prepared aluminum nitride fiber can be used as a high-thermal-conductivity filler for electronic packaging.

An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.

The invention relates to the technical field of electronic packaging materials, and discloses an epoxy molding compound and a preparation method thereof. The epoxy molding compound is prepared from the following raw materials in percentage by weight: 70 to 90 percent of filler, 5 to 15 percent of epoxy resin, 3.1 to 10.5 percent of phenolic resin-stearylamine intermediate, 0.2 to 0.8 percent of catalyst, 1 to 5 percent of stress absorbent, 0.2 to 2 percent of coupling agent, 0.1 to 1.2 percent of release agent and 0.1 to 0.5 percent of coloring agent. According to the invention, by adding the phenolic resin-stearylamine intermediate into the epoxy molding compound, the final volume resistivity of the epoxy molding compound can be reduced to 108-1011 omega.cm, and by reducing the volume resistivity and improving the conductivity of the material, rapid release of static electricity is realized, and the problem of electrostatic adsorption is solved.

The invention discloses an antistatic polyester film capable of phase change temperature regulation and a preparation method thereof, the film provided by the invention has a double-layer structure, the bottom layer is a temperature regulation functional layer doped with a phase change material, and the surface layer is a functional layer doped with carbon black to prevent electrostatic aggregation. According to the antistatic polyester film capable of adjusting the temperature through phase change, the adjusting temperature is 27 DEG C, the phase change enthalpy is 17 j / g, the surface resistivity of the surface layer is 1.1 * 10 < 7 > omega / m < 2 >, and the antistatic polyester film is expected to be applied to the fields of intelligent wearable equipment, medical sensors, electronic packaging materials, supercapacitor protection layers and the like.

Described herein is a novel approach that leverages a 3D stacked die complex with an active optical interposer integrated with an I / O chiplet including high-speed serializer / deserializer (SerDes). By integrating silicon in this way, shoreline constraints are eliminated, allowing for the SerDes macros to be placed virtually anywhere on the I / O chiplet. The photonic-based interconnects described herein improve upon conventional approaches based on co-packaged optics (CPO), Linear-drive Pluggable Optics (LPO) and copper-based solutions in terms of bandwidth and power consumption. The interconnects described herein rely on photonic-electronic packages in which a PIC provides processing units (e.g., XPU), electronic switching chips or other types of application-specific integrated circuits (ASIC) with access to optical fiber-based networks while multiple SerDes provide high-speed serialization and deserialization.

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing an adhesive layer to attach an upper electronic package to a lower die and / or utilizing metal pillars for electrically connecting the upper electronic package to a lower substrate, wherein the metal pillars have a smaller height above the lower substrate than the lower die.

Embodiments disclosed herein include electronic packages with photonics integrated circuits (PICs). In an embodiment, an electronic package comprises a glass substrate with a first recess and a second recess. In an embodiment, a PIC is in the first recess. In an embodiment, an optics module is in the second recess, and an optical waveguide is embedded in the glass substrate between the first recess and the second recess. In an embodiment, the optical waveguide optically couples the PIC to the optics module.

The invention discloses a phosphorus-nitrogen macromolecule modified MOFs flame retardant and an epoxy resin composite material and a preparation method thereof, and belongs to the technical field of flame-retardant composites.The nanometer flame retardant takes NH2-MIL-125 as a matrix, a phosphorus-chlorine bond compound and an amido compound are sequentially grafted, and in-situ polymerization is conducted to form a phosphorus-nitrogen coating layer; the composite material is prepared from 77.15 to 80.44 parts of epoxy resin, 16.85 to 17.56 parts of a curing agent and 1 to 6 parts of M (at) F-PZN through high-temperature curing. When the addition amount of the flame retardant is less than or equal to 6wt%, the peak value of the heat release rate of the composite material is reduced by 51.6%, the maximum smoke production rate is reduced by 51.5%, the tensile strength is improved by 62.2% compared with that of pure epoxy when the flame retardant is added by 2wt%, synergistic improvement of flame retardance, smoke suppression, toxicity reduction and mechanical properties is realized, and the flame retardant is suitable for the fields of electronic packaging, aerospace and the like.

The invention relates to a method for establishing a viscoplastic constitutive model of a solder bump considering damage. Comprising the following steps: performing a uniaxial tension and compression test on a solder bump sample to obtain a macroscopic stress-strain curve of the sample; a unit cube finite element model is established, the unit cube finite element model adopts the solder constitutive model constructed in the step (2), loads are set for the model for numerical simulation, and a stress-strain curve calculated by the model is obtained; and fitting the stress-strain curve obtained by simulation in the step (3) with the macroscopic stress-strain curve obtained by the tension and compression test in the step (1) through a test parameter method, and determining parameters of the solder constitutive model, so that the final solder bump viscoplastic constitutive model considering the damage is established. The method can accurately predict the deformation and other mechanical behaviors of the solder under the thermal-force loading condition, and can be widely applied to fatigue life prediction and reliability evaluation of the electronic packaging structure.

The invention relates to the technical field of high polymer materials, in particular to a high-adhesion polyimide resin material and a preparation method thereof, and the high-adhesion polyimide resin material is prepared from a polyimide precursor and a surface modified inorganic filler; wherein a dynamic disulfide bond network constructed by a thioctic acid modified diamine monomer enables the material to achieve a scratch repair rate of 88% or above within 12 h after being heated at 60 DEG C, the service life is remarkably prolonged, and the material is endowed with an ultraviolet absorption rate of 90% or above through the synergistic effect of triazine ring dianhydride and thioctic acid; according to the present invention, the silane coupling agent modified filler enables the damp-heat resistance time to break through 2800h, and is nearly doubled compared with the traditional material, the heat conductivity coefficient of 0.60-0.65 W / mK is achieved through the compound filler system and the dynamic cross-linking structure, the high adhesion of 7.1 N / cm is maintained, the high-end electronic packaging requirement is met, and the wide application prospect is provided.

An electronic package is provided, in which an electronic structure used as an integrated voltage regulator and a plurality of conductive pillars are embedded in an encapsulating layer to facilitate electrical transmission with electronic components at a close range.

The invention belongs to the technical field of functional composite materials, and particularly relates to an all-organic epoxy resin composite material as well as a preparation method and application thereof. The method comprises the following steps: S1, heating, melting and blending epoxy resin and phenolic hydroxyl polyphenyl ether to obtain a composite system; s2, adding a curing agent and a catalyst into the composite system, heating, stirring, reacting, vacuumizing, defoaming, casting the obtained mixed solution into a mold, curing, cooling and demolding to obtain the all-organic epoxy resin composite material. The heat conductivity coefficient of the obtained composite material is improved by 44.2% compared with that of pure epoxy resin, and the thermal expansion coefficient is reduced by 32.8%. The method is mild in condition, short in technological process, low in energy consumption and suitable for large-scale production, an innovative thought and an effective strategy are provided for development of a high-performance all-organic electronic packaging material, and silicon-free and ceramic-free all-organic upgrading of the packaging field is expected to be promoted.

The invention belongs to the technical field of composite materials, and particularly relates to a modified resin powder filling master batch and a preparation method and application thereof.The filling master batch takes recycled waste circuit board epoxy resin as a matrix, modified resin powder is obtained after coupling agent modification treatment, and efficient recycling of waste resources is achieved. Through synergistic toughening modification of linear low-density polyethylene and maleic anhydride grafted polyethylene, the mechanical properties of the material are significantly improved. Meanwhile, activated aluminum oxide and nano silicon dioxide are adopted, so that the heat resistance and the size stability of the material are improved. In addition, by optimizing the anti-aging agent and the lubricant, the processability and durability of the material are further improved. The filling master batch has the excellent characteristics of light specific gravity, high strength, good heat resistance, strong corrosion resistance and the like, has the advantages of environmental protection and cost, not only solves the problem of recovery of waste resin, but also remarkably reduces the production cost, conforms to the development concept of green manufacturing, and can be widely applied to the fields of electronic packaging, automobile parts and the like.

An electronic structure is provided, in which a plurality of conductors are disposed on one surface of an electronic body, an epoxy molding compound is used as a protective layer to encapsulate the plurality of conductors, a circuit portion is bonded onto the other surface of the electronic body, and a plurality of external bumps and solder material are formed on the circuit portion. Therefore, with the design of the protective layer, heat energy can be effectively transferred from the protective layer to the solder material below during a process of heating the electronic structure so as to avoid a problem of non-wetting of the solder material.

An electronic package is provided, in which an electronic element is disposed on a carrier structure, and an interposer is stacked on the electronic element. Further, a wire is connected to the interposer and grounds the carrier structure, such that the wire and the interposer surround the electronic element. Therefore, the wire can be used as a shielding element when the electronic package is in operation to prevent the electronic element from being subjected to external electromagnetic interference.

An electronic package is provided, in which an electronic module and a plurality of conductive pillars are embedded in an encapsulation layer, and a circuit structure is formed on the encapsulation layer, where the electronic module includes a carrier structure having conductive vias and at least a first electronic element disposed on the carrier structure. The first electronic element has a plurality of conductors in a form of conductive through-silicon vias, and at least a second electronic element is disposed on the circuit structure. Therefore, the design of the electronic module can reduce the layout area occupied by the electronic element on a surface of a packaging zone of the circuit structure, such that other functional elements can be added to the electronic package according to requirements, and the electronic package can improve functional requirements of the end product.

An electronic package is provided, in which an electronic module including a first electronic element and a second electronic element is disposed on a carrier structure embedded with a third electronic element, and the third electronic element is a photonic chip electrically connected to the electronic module. Therefore, with this configuration, it is beneficial to reduce a layout area of the carrier structure to meet the requirement of miniaturization.

Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate with a first surface and a second surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a via opening through the substrate, where sidewalls of the via opening have a root mean squared (RMS) surface roughness that is approximately 100 nm or greater. In an embodiment, the electronic package further comprises a liner over the sidewalls of the via opening, where an RMS surface roughness of the liner is approximately 50 nm or smaller. An electronic package may further comprise a via through the via opening.

A continuity detector for determining the continuity of a Unit Under Test (UUT). The detector comprises a housing defining an interior volume, an electronics package disposed within the interior volume defined by the housing assembly, a first test contact and a second test contact to interface with the electrical wire or harness assembly, a precision resistance standard disposed within the housing and electrically coupled to the electronics package, and a power source disposed within the housing assembly. The first test contact and the second test contact are external to the interior volume. The first test contact and the second test contact are electrically coupled to the electronics package. The electronics package comprising a resistance measurement device and a comparator circuit. The comparator circuit is configured to determine if the resistance of the UUT is greater than, less than, or equal to the resistance of the resistance standard.

An electronic package and a manufacturing method thereof and an interposer are provided, in which grooves are formed on conductive through holes on a back side of an interposer body of the interposer, and a routing structure electrically connected to the conductive through holes is formed directly on the back side of the interposer body and in the grooves, without a passivation layer to be formed, such that the CVD process and CMP process are omitted, thereby effectively simplifying the manufacturing process and saving a lot of manufacturing time and material costs.