5823 results about "Dielectric permittivity" patented technology

A method for depositing silicon oxide layers having a low dielectric constant by reaction of an organosilicon compound and a hydroxyl forming compound at a substrate temperature less than about 400° C. The low dielectric constant films contain residual carbon and are useful for gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers in sub-micron devices. The hydroxyl compound can be prepared prior to deposition from water or an organic compound. The silicon oxide layers are preferably deposited at a substrate temperature less than about 40° C. onto a liner layer produced from the organosilicon compound to provide gap fill layers having a dielectric constant less than about 3.0.

A method of forming a nitrided high-k film by disposing a substrate in a process chamber and forming the nitrided high-k film on the substrate by a) depositing a nitrogen-containing film, and b) depositing an oxygen-containing film, wherein steps a) and b) are performed in any order, any number of times, so as to oxidize at least a portion of the thickness of the nitrogen-containing film. The oxygen-containing film and the nitrogen-containing film contain the same one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table, and optionally aluminum, silicon, or aluminum and silicon. According to one embodiment, the method includes forming a nitrided hafnium based high-k film. The nitrided high-k film can be formed by atomic layer deposition (ALD) or plasma-enhanced ALD (PEALD).

The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.

A method to achieve a very low effective dielectric constant in high performance back end of the line chip interconnect wiring and the resulting multilayer structure are disclosed. The process involves fabricating the multilayer interconnect wiring structure by methods and materials currently known in the state of the art of semiconductor processing; removing the intralevel dielectric between the adjacent metal features by a suitable etching process; applying a thin passivation coating over the exposed etched structure; annealing the etched structure to remove plasma damage; laminating an insulating cover layer to the top surface of the passivated metal features; optionally depositing an insulating environmental barrier layer on top of the cover layer; etching vias in the environmental barrier layer, cover layer and the thin passivation layer for terminal pad contacts; and completing the device by fabricating terminal input/output pads. The method obviates issues such as processability and thermal stability associated with low dielectric constant materials by avoiding their use. Since air, which has the lowest dielectric constant, is used as the intralevel dielectric the structure created by this method would possess a very low capacitance and hence fast propagation speeds. Such structure is ideally suitable for high density interconnects required in high performance microelectronic device chips.

A field effect transistor in which a continuous semiconductor layer comprises:

• • a) an organic semiconductor; and,
  • b) an organic binder which has an inherent conductivity of less than 10⁻⁶Scm⁻¹ and a permittivity at 1,000 Hz of less than 3.3

and a process for its production comprising:

coating a substrate with a liquid layer which comprises the organic semiconductor and a material capable of reacting to form the binder; and,

converting the liquid layer to a solid layer comprising the semiconductor and the binder by reacting the material to form the binder.

This invention relates to processes for the assembly of three-dimensional structures having periodicities on the scale of optical wavelengths, and at both smaller and larger dimensions, as well as compositions and applications therefore. Invention embodiments involve the self assembly of three-dimensionally periodic arrays of spherical particles, the processing of these arrays so that both infiltration and extraction processes can occur, one or more infiltration steps for these periodic arrays, and, in some instances, extraction steps. The product articles are three-dimensionally periodic on a scale where conventional processing methods cannot be used. Articles and materials made by these processes are useful as thermoelectrics and thermionics, electrochromic display elements, low dielectric constant electronic substrate materials, electron emitters (particularly for displays), piezoelectric sensors and actuators, electrostrictive actuators, piezochromic rubbers, gas storage materials, chromatographic separation materials, catalyst support materials, photonic bandgap materials for optical circuitry, and opalescent colorants for the ultraviolet, visible, and infrared regions.

Intermetal dielectric (IMD) and interlevel dielectric (ILD) that have dielectric constants (K) ranging from 2.0 to 2.6 are prepared from plasma or photon assisted CVD (PACVD) or transport polymerization (TP). The low K dielectric (LKD) materials are prepared from PACVD or TP of some selected siloxanes and F-containing aromatic compounds. The thin films combine barrier and adhesion layer functions with low dielectric constant functions, thus eliminating the necessity for separate adhesion and barrier layers, and layers of low dielectric constant. The LKD materials disclosed in this invention are particularly useful for <0.18 .mu.m ICs, or when copper is used as conductor in future ICs.

A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises one or more ordered pairs of first and second layers. With the present invention, the dielectric constant of the high-k dielectric layer can be optimized while improving interface characteristics. With a higher crystallization temperature realized by forming the multi-layer structure, each of whose layers is not more than the critical thickness, leakage current can be reduced, thereby improving device performance.

The present invention relates to high sensitivity chemical sensors, more particularly relates to high sensitivity chemical sensors which are capacitively coupled, FET based analyte sensors. A sub-threshold capacitively coupled Field Effect Transistor (CapFET) sensor for sensing an analyte comprises fixed dielectric placed on substrate of the CapFET and second dielectric sensitive to the analyte, placed between gate terminal of the CapFET and the fixed dielectric, wherein presence of the analyte alters either dielectric constant of the second dielectric or work function of the gate.

Methods of forming structures having dielectric films with improved properties, such as, for example, improved elastic modulus and/or dielectric constant are disclosed. Exemplary films can be formed using a cyclic deposition process. Exemplary methods use activated species to cleave (e.g., symmetric-structured) precursor molecules to form the high quality dielectric layers.

A method for forming a silicone polymer insulation film having low relative dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate is applied to a plasma CVD apparatus. The first step is vaporizing a silicon-containing hydrocarbon compound expressed by the general formula SialphaObetaCxHy (alpha=3, beta=3 or 4, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The next step is introducing additive gas into the reaction chamber. The residence time of the material gas is lengthened by reducing the total flow of the reaction gas, in such a way as to formed a silicone polymer film having a micropore porous structure with low relative dielectric constant.

Methods are provided for depositing a low dielectric constant material. In one aspects, a method is provided for depositing a low dielectric constant material including introducing a processing gas comprising hydrogen and an oxygen-containing organosilicon compound, an oxygen-free organosilicon compound, or combinations thereof, to a substrate surface in a processing chamber and reacting the processing gas at processing conditions to deposit the low dielectric constant material on the substrate surface, wherein the low k dielectric material comprises at least silicon and carbon. The processing gas may further include an inert gas, a meta-stable compound, or combinations thereof. The method may further include treating the low dielectric constant material with a hydrogen containing plasma, annealing the deposited low dielectric constant material, or combinations thereof.