Manufacturing method of semiconductor device

a manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, basic electric elements, electrical appliances, etc., can solve the problems of deterioration of transistor characteristics such as mobility, and achieve the effect of suppressing the growth of interface silicon oxide and reducing oxygen deficiency

Inactive Publication Date: 2009-01-08
RENESAS TECH CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0016]By this means, since the high dielectric layer is densified by the heat treatment at the step (b), the high dielectric layer with a high relative dielectric constant can be obtained. Also, since oxygen in the oxygen supplying layer is supplied to the high dielectric layer by the heat treatment at the step (e), the high dielectric layer in which the oxygen deficiency is reduced can be obtained. In other words, it is possible to obtain the oxide in which the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth can be achieved.

Problems solved by technology

However, although an oxide film formed by the rapid heat treatment in the non-oxidation atmosphere has sufficient densification, such an oxide film has oxygen deficiency which can be one of the defect sites to cause the deterioration of transistor characteristics such as mobility.

Method used

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  • Manufacturing method of semiconductor device

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first embodiment

[0033]In the first embodiment, the present invention is applied to a manufacturing method of an n channel MIS transistor, which will be described with reference to FIG. 1 to FIG. 9. FIG. 1 to FIG. 9 are cross-sectional views schematically showing a semiconductor device in a manufacturing process, in which FIG. 2 to FIG. 6 show a principal part of the semiconductor device in an enlarged manner. Note that a p channel MIS transistor has an opposite polarity to that of an n channel MIS transistor, and the present invention can also be applied to a manufacturing method of a p channel MIS transistor.

[0034]As shown in FIG. 1, element isolation trenches ID are first formed in a main surface (element formation surface) of a semiconductor substrate (hereinafter, referred to as substrate) SUB made of, for example, p type single crystal silicon by the well-known STI (Shallow Trench Isolation) technique. Next, after boron is ion-implanted in an n channel MIS transistor formation region of the su...

second embodiment

[0063]Although the case where hafnium-based oxide deposited by the ALD is used in the step of forming the oxygen supplying layer has been described in the first embodiment, the case where aluminum oxide (Al2O3) deposited by the ALD or tantalum oxide (Ta2O5) deposited by the ALD is applied to form the oxygen supplying layer will be described in the second embodiment. Note that the other steps in the second embodiment are similar to those in the first embodiment.

[0064]As described in the first embodiment, the oxygen supplying layer HK2 functions to supply oxygen to the high dielectric layer HK1 in the oxygen supplying annealing in order to supplement oxygen lost in the high dielectric layer HK1. Therefore, an oxygen supplying layer which has an oxygen concentration (oxygen proportion) higher than that in the high dielectric layer HK1 just after the densification annealing in which the oxygen deficiency has occurred can be used as the oxygen supplying layer HK2. Accordingly, the oxygen...

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Abstract

The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims priority from Japanese Patent Application No. JP2007-128692 filed on May 15, 2007, the content of which is hereby incorporated by reference into this application.TECHNICAL FIELD OF THE INVENTION[0002]The present invention relates to a technology for manufacturing a semiconductor device. More particularly, it relates to a technology effectively applied to the manufacture of a semiconductor device provided with a MIS (Metal Insulator Semiconductor) transistor having a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide (SiO2).BACKGROUND OF THE INVENTION[0003]In recent years, with the trend of scaling down the size of MIS transistors constituting a semiconductor integrated circuit, the thickness of a gate insulating film made of silicon oxide has been rapidly reduced. However, when the thickness of the gate insulating film is reduced to about 2 nm,...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/469
CPCH01L21/28185H01L21/28194H01L21/3105H01L29/7833H01L21/31645H01L21/324H01L29/517H01L21/3141H01L21/02183H01L21/02178H01L21/0228H01L21/02181H01L21/02362H01L21/02337
Inventor NABATAME, TOSHIHIDE
Owner RENESAS TECH CORP
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