13 results about "Reactive plasma" patented technology

The invention discloses a method for improving the photoelectric property of a transparent conductive oxide film and application, and belongs to the field of optoelectronic devices. The method comprises the following steps: growing a transparent conductive oxide film (TCO), a glass substrate or a silicon substrate by using a magnetron sputtering technology (or a reaction plasma deposition technology); and growing a gradient refractive index SiNyOx / SiOx thin film on the TCO thin film by using a radio frequency magnetron sputtering technology so as to construct the composite thin film (TCO / SiNyOx / SiOx) and improve the optical transmittance and the electrical stability of the TCO thin film. According to the invention, the optical and electrical properties of the transparent conductive oxide film can be improved, the transmission of the film is enhanced, the reflection is reduced, and the transparent conductive oxide film can be applied to crystalline silicon heterojunction solar cells or other optoelectronic devices and the like.

Disclosed herein are approaches for directional angled etching to form hardmask openings and to reduce line-width-roughness (LWR) of patterning lines. In one approach, a method may include forming a plurality of mask lines over a stack of layers, wherein each of the plurality of mask lines includes a first sidewall and a second sidewall, and wherein a surface defect is present along the first sidewall or the second sidewall. The method may further include removing the surface defect by delivering a reactive plasma beam to the plurality of mask lines at a non-zero angle relative to a perpendicular to a plane defined by an upper surface of the plurality of mask lines.

This application provides a metal electrode, a crystalline silicon solar cell, and a fabrication method thereof, relating to the field of crystalline silicon solar cell manufacturing technology. The metal electrode fabrication method mainly involves coating a positive photoresist onto the surface of a substrate, shaping and photolithographically forming grooves corresponding to the pattern; using magnetron sputtering or reactive plasma deposition technology, a seed layer and a copper electrode are sequentially formed within the grooves, with the total height of the seed layer and the copper electrode being lower than the height of the positive photoresist layer. The crystalline silicon solar cell fabrication method mainly involves forming front and back metal electrodes using the metal electrode fabrication method described above; coating negative photoresist onto the front and back metal electrodes respectively, and removing the positive photoresist layer; forming an anti-reflection film and a passivation film on the front and back of the silicon substrate, and removing the negative photoresist layer. The metal electrode fabrication method, the crystalline silicon solar cell, and the fabrication method thereof result in excellent electrode quality, high aspect ratio, and high cell efficiency.

Disclosed herein are approaches for line critical dimension (CD) modulation and end-to-end CD reduction with angled etch and angled deposition. One method may include forming a plurality of patterning lines over a stack of layers, wherein each of the patterning lines includes first and second sidewalls. The method may further include delivering one or more reactive plasma beams to the patterning lines at a non-zero angle relative to a perpendicular to a plane defined by an upper surface of the patterning lines, wherein the one or more reactive plasma beams modulate a line CD between a first pair of adjacent patterning lines by performing at least one of the following: an angled etch to remove a material of the patterning lines from the first and second sidewalls, and an angled deposition to form an additional material along the first and second sidewalls.

The invention provides a passivation contact crystalline silicon heterojunction solar cell which can be applied to the technical field of solar cells. The passivation contact crystalline silicon heterojunction solar cell comprises a first transparent conductive layer, an N-type microcrystalline silicon oxygen layer, a first intrinsic amorphous silicon oxygen passivation layer, N-type crystalline silicon, a second intrinsic amorphous silicon oxygen passivation layer, an undoped tin oxide hole transport layer and a second transparent conductive layer which are stacked in sequence, the undoped tin oxide hole transport layer is obtained by deposition through a reaction plasma deposition method; the second transparent conductive layer includes an element doped tin oxide. The invention further provides a preparation method of the crystalline silicon heterojunction solar cell.

The application discloses a transparent conductive oxide film and a preparation method and application thereof. The preparation method of the transparent conductive oxide film comprises the following steps: 1) argon and oxygen are taken as reaction gas, a transparent conductive oxide is deposited on a substrate by using a reactive plasma deposition method, the deposition gas pressure is controlled to be 0.1Pa-1Pa, the water vapor partial pressure is controlled to be less than or equal to 1*10 ‑3 Pa, and the deposition thickness is controlled to be less than or equal to 50nm, so that a deposited film with crystal nuclei formed on the surface is obtained; and 2) the deposited film is placed in an air atmosphere to perform annealing, and thus the transparent conductive oxide film is obtained. The RPD technology is adopted, argon and oxygen are taken as the reaction gas, the water vapor partial pressure and the deposition gas pressure are strictly controlled, and the high-mobility ultrathin TCO film is deposited, so that the TCO film can be applied in a solar cell, the consumption of the TCO can be reduced, and the production cost of the solar cell is reduced.

The invention discloses a lossless unsealing method suitable for a copper bonding wire of an advanced packaging plastic package device. The lossless unsealing method comprises the following steps: step 1, positioning: positioning a chip bonding area; step 2, laser pretreatment: after positioning, carrying out rapid laser rough etching until the solder ball is exposed; step 3, after the solder balls are exposed, reversely selecting an outer area of the chip, and etching until two solder joints are exposed; step 4, performing reactive plasma first-stage etching according to a gas proportion 1; step 5, after the first stage of plasma etching is carried out, the device is interrupted and taken out for inspection, if the chip bonding pad is not exposed, the step 4 is repeated, and otherwise, the step 6 is carried out; step 6, performing reactive plasma second-stage etching according to a gas ratio 2; step 7, cleaning and drying; and 8, carrying out subsequent bonding detection and analysis.

The invention discloses a composite surface finish machining method for a hard and brittle semiconductor wafer, and belongs to the technical field of semiconductor manufacturing. The method is used for treating a wafer subjected to accurate grinding and comprises the following sequential steps: (1) pretreating the surface of the wafer subjected to accurate grinding by utilizing reactive plasma to form a micron-sized pre-modified layer with a loose physical structure and changed chemical properties; (2) placing the wafer in a specific process environment, scanning the pre-modified layer by using femtosecond laser of which the energy density is accurately controlled, and selectively removing the pre-modified layer through a cold ablation effect to obtain a preliminary smooth surface; and (3) the surface subjected to femtosecond laser treatment is subjected to ultra-precision polishing treatment, so that the final atomic-scale flat surface is obtained. Through a three-step synergistic process of plasma pre-softening, femtosecond laser selective quick stripping and ultra-precision polishing ending, the technical problems that traditional chemical mechanical polishing (CMP) is low in efficiency, high in cost and poor in hard and brittle material machining effect are solved, and a new ultra-hard wafer surface finish machining path with high efficiency, low damage and low cost is achieved.

The invention relates to an electron transport layer, a preparation method thereof and a perovskite cell. The sheet resistance of the electron transport layer is 1000 omega / square or above. The thickness of the electron transport layer is less than 40 nm; the material of the electron transport layer is IWO. The preparation method comprises the following steps: under the condition that the oxygen partial pressure is 2%-4.5%, reactive plasma deposition is carried out on the surface of a substrate, and the electron transport layer with the thickness being 40 nm or less and the sheet resistance being 1000 omega / square or more is obtained. According to the preparation method provided by the invention, the preparation of the high-sheet-resistance electron transport layer can be realized by adopting an RPD coating mode, the production efficiency of the perovskite cell is improved, the sheet resistance of the obtained electron transport layer is more than 1000 omega / square, relatively high carrier concentration can be maintained, the energy level matching between the obtained electron transport layer and the perovskite film layer is realized, and the performance of the perovskite cell is improved. And when the material is used for a perovskite battery, good device performance can be obtained.

Disclosed herein are approaches for line critical dimension (CD) modulation and end-to-end CD reduction with angled etch and angled deposition. One method may include forming a plurality of patterning lines over a stack of layers, wherein each of the patterning lines includes first and second sidewalls. The method may further include delivering one or more reactive plasma beams to the patterning lines at a non-zero angle relative to a perpendicular to a plane defined by an upper surface of the patterning lines, wherein the one or more reactive plasma beams modulate a line CD between a first pair of adjacent patterning lines by performing at least one of the following: an angled etch to remove a material of the patterning lines from the first and second sidewalls, and an angled deposition to form an additional material along the first and second sidewalls.

The invention discloses a wafer bonding structure edge breakage inhibition method based on etching compensation, and the method comprises the steps: employing a grinding wheel thinning machine to carry out the initial thickness reduction of a wafer bonding structure, setting the initial thickness of the wafer bonding structure as A and the target thickness as B, and enabling the range of the initial thickness reduction to be (A-B) / 2-2 (A-B) / 3, wafer surface damage and wafer warping caused by thinning are reduced; chemical mechanical polishing equipment is adopted for wafer polishing, wafer surface damage caused by initial thickness reduction is removed, the wafer thickness is reduced to a small extent, and the local over-polishing phenomenon caused by wafer warping is avoided by reducing the polishing pressure of the chemical mechanical polishing equipment and increasing the rotating speed of a polishing disc and a polishing head; and removing the top layer material of the wafer bonding structure on the whole surface by using a deep reactive plasma etching machine, and thinning to a target thickness to realize etching compensation. According to the invention, the problems of poor compatibility and edge breakage and fragments of the existing processing technological process in the manufacturing process of the three-dimensional integration technology can be solved.

The invention discloses reaction type plasma coating equipment. The equipment comprises a coating chamber with a vacuum cavity; the target seat is arranged in the vacuum cavity, and the target seat is used for bearing a target material; the plasma generator is arranged at the side part of the coating chamber and is used for emitting electron beams to the target material, so that the target material is sublimated and dissociated into target material ions; the conveying system is used for carrying the substrate, and the conveying system and the target seat are oppositely arranged; the gas dissociation system is communicated with the vacuum cavity, the gas dissociation system is used for inputting reaction gas ions into the vacuum cavity, and the target material ions and the reaction gas ions are deposited on the surface of the substrate and combined to form a thin film. In this way, the gas dissociation system dissociates the reaction gas into high-activity reaction gas ions in advance, then the reaction gas ions are conveyed into the vacuum cavity, the content or concentration of the reaction gas ions in the vacuum cavity is increased, and the target material ions are fully combined with the reaction gas ions to form the film.

Disclosed herein are approaches for directional angled etching to form hardmask openings and to reduce line-width-roughness (LWR) of patterning lines. In one approach, a method may include forming a plurality of mask lines over a stack of layers, wherein each of the plurality of mask lines includes a first sidewall and a second sidewall, and wherein a surface defect is present along the first sidewall or the second sidewall. The method may further include removing the surface defect by delivering a reactive plasma beam to the plurality of mask lines at a non-zero angle relative to a perpendicular to a plane defined by an upper surface of the plurality of mask lines.