10results about How to "Improve data retention" patented technology

The invention discloses an RRAM control method and system, a control end and an RRAM, and the RRAM control method comprises the steps: inputting a first control signal and a second control signal to a read-write control end of a storage unit, so as to enable the storage unit to execute a write-in operation according to the first control signal; the first control signal comprises a plurality of write control pulses, the second control signal comprises metastable state elimination pulses corresponding to the write control pulses respectively, and the pulse direction of the metastable state elimination pulses is opposite to that of the corresponding write control pulses. And the read-write control pulse is generated between the corresponding write control pulse and the first read-write control pulse after the write control pulse. In the application, the metastable state elimination pulse can counteract or eliminate the metastable state after the write control pulse is removed, so that the metastable state is prevented from interfering processes such as read verification executed by a subsequent storage unit, and the data retention of the storage unit can be improved, thereby improving the reliability of the storage unit during the subsequent execution of the processes such as read verification.

The invention discloses a ferroelectric memory cell, which comprises an oxide layer arranged in the middle of a ferroelectric layer and at least one side surface of the ferroelectric layer, and the material of the oxide layer and the material of the ferroelectric layer comprise the same main body element. By inserting the oxide layer having the same main body element as the ferroelectric layer between the electrode and the ferroelectric layer and inside the ferroelectric layer, the proportion of an orthogonal phase and a tetragonal phase in the ferroelectric memory unit can be regulated and controlled, and then regulation and control of a coercive field of the ferroelectric memory unit are realized; and finally, the data retention capability and the durability of the ferroelectric storage unit under a low operation electric field are improved.

The invention discloses a transistor, a semiconductor device, a preparation method thereof and electronic equipment. The transistor comprises a source electrode, a channel region and a drain electrode which are sequentially arranged along a first direction, and a grid electrode which is arranged at the periphery of the channel region in an insulating manner; the source electrode comprises a first semiconductor layer and a second semiconductor layer, the same ends of the first semiconductor layer and the second semiconductor layer in the first direction are connected with the channel region, and the second semiconductor layer is located on the side, close to the grid electrode, of the first semiconductor layer in the direction perpendicular to the first direction. The doping concentration of the first semiconductor layer is smaller than that of the second semiconductor layer. The invention relates to the technical field of semiconductor devices, in particular to a transistor, a semiconductor device, a preparation method of the semiconductor device and electronic equipment, and aims to restrain accumulation of holes in a channel as a starting point, relieve formation of a parasitic bipolar transistor and prolong storage retention time.

The present invention provides a split-gate flash memory and a manufacturing method thereof. By heat-treating a semiconductor substrate, an oxidation protection layer that at least covers the sidewalls of a gate structure is formed. The oxidation protection layer formed by the heat treatment has a high density and can play a good blocking role for electrons in the gate structure, thereby preventing the loss of electrons in the gate structure. Furthermore, the oxidation protection layer cooperates with the gate sidewall on its sidewall, which can further increase the blocking of electrons in the gate structure, thereby effectively preventing the loss of electrons in the gate structure, thereby improving the data retention capability and reliability of the split-gate flash memory. In addition, when the semiconductor substrate is heat-treated, the doped ions in the source and drain regions of the semiconductor substrate can also be activated, so the annealing process for activating the doped ions can be omitted, saving the process and process time, and improving the process efficiency.

The present invention belongs to the field of bioelectronics and neuromorphic computing technology, and relates to a SF-based memristor with a reversible negative photoelectric effect and a preparation method thereof, wherein SF@WS is spin-coated on the upper surface of a conductive layer. 2 After suspension, drying forms SF@WS 2 layer, and then deposit the electrode layer to obtain a SF-based memristor with a reversible negative photoelectric effect. 2 The solution was prepared by adding WS to the SF solution. 2 The invention solves the problems of poor cycle stability, short data retention time and irreversibility of negative photoelectric memristor in existing SF-based memristor, and realizes reversible regulation of device resistance with light intensity, long data retention time and good cycle stability.

The application relates to the technical field of semiconductor nonvolatile storage devices, in particular to a ferroelectric thin film and a ferroelectric field effect transistor. The ferroelectric thin film comprises a quantum well ferroelectric charge storage layer, a bottom electrode or semiconductor layer and a top electrode layer, wherein the bottom electrode or semiconductor layer, the quantum well ferroelectric charge storage layer and the top electrode layer are stacked in sequence from bottom to top; the quantum well ferroelectric charge storage layer is composed of hafnium silicon oxide and doped transition material. The ferroelectric thin film can improve the durability and data retention capability of the ferroelectric field effect transistor, and has a more stable layer structure in terms of resistance to doping concentration change, thickness change, temperature change and stress change.

The invention discloses a memory data correction method and device, a storage medium and a product, and relates to the technical field of data storage, the memory is provided with verification current thresholds, and the method comprises the following steps: for any memory unit in the memory, obtaining current reading results of the memory unit under the verification current thresholds; if the current reading results are different, unit data correction is carried out on the storage unit, so that the current reading results of the storage unit under the verification current thresholds are consistent. The technical problem of low stability of the memory is solved.

This invention provides a method, electronic device, and storage medium for dynamically adjusting the operating voltage of flash memory, relating to the field of semiconductor testing. The method includes: adjusting the bit line voltage and control gate voltage of the flash memory chip to predetermined values; adjusting the control gate voltage level while keeping the bit line voltage level unchanged to program the array; adjusting the word line voltage and setting the read level; reading the array status, and if successful, recording the current voltage and level as the operating voltage; if unsuccessful, adjusting the bit line or control gate voltage level and cyclically programming and reading until successful or reaching the highest level. This application solves the problem of over-programming or under-programming caused by uniform target voltage adjustment by dynamically determining the optimal operating voltage on a chip-by-chip basis, covering the current increase after baking, and significantly improving wafer yield and chip reliability.

The invention relates to a phase change material which comprises an indium element and a sulfur element, the chemical formula of the phase change material is InxSy, x and y are atomic components of the elements, and 0 lt is met; x / (x + y) lt; 1, 0lt; y / (x + y) lt; 1; the invention also provides a phase change memory unit comprising the phase change material and a preparation method of the phase change memory unit. According to the InxSy phase change material, the resistance difference value before and after phase change is large, and very high adjustability is achieved; and when being applied to a phase change memory unit, the phase change memory unit has better data retention and higher operation speed.

The present invention provides a method for manufacturing a non-volatile memory device. The method includes forming a groove through a sacrificial layer and extending into a substrate, filling a first insulating material in the groove, and implanting a dopant into the first insulating material by an implantation process. Afterwards, the first insulating material is partially removed to form a first recess between the sacrificial layers. The lowest point of the first recess is lower than the top surface of the substrate. The method includes filling a second insulating material in the first recess, and removing the sacrificial layer to form a second recess adjacent to the second insulating material. The method includes forming a first polysilicon layer in the second recess, and sequentially forming a dielectric layer and a second polysilicon layer on the first polysilicon layer.