77results about How to "Write speed" patented technology

A hierarchical data-storage system has a volatile storage medium, a first non-volatile storage medium, and a controller including a ranking engine tracking data writes to each of the memory mediums. Each medium is associated with a pre-set capacity threshold, and the controller, upon the volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the volatile medium, copies the data in those blocks to the non-volatile medium, and marks those blocks as available for new data writes, and the controller, upon the non-volatile medium reaching its pre-set threshold, identifies one or more blocks of data as least-frequently written to the non-volatile medium, and marks those blocks as available for new data writes from the volatile medium.

The invention discloses a method, log server and system for recording log data. The method comprises that log data obtained according to the log obtaining condition forms a log set; a data storage server for storing the log set is determined; the log set is stored in the data storage server, and a data sheet of the log set is generated in the data storage server; and after all log data of the log set is introduced into the data sheet, an index is created for the data sheet of the log set. According to the method, log server and system, the storage speed of log data can be improved, a network platform can timely record a lot of log data that is generated in a short time, data loss is prevented, and delayed query time can be shortened.

A MONOS nonvatile memory transistor includes a semiconductor substrate, a memory insulator film on the semiconductor substrate composed of a tunnel insulator film, a memory nitride film and a top oxide film, and a memory gate electrode on the memory insulator film. The tunnel insulator film is constituted of a silicon nitrided oxide film containing oxygen and nitrogen and an oxygen-rich silicon nitrided oxide film or a silicon oxide film to make the nitrogen content of the tunnel insulator film in the vicinity of its interface with the semiconductor substrate greater than its nitrogen content in the vicinity of its interface with the memory nitride film. By this, the barrier height of the tunnel insulator film to holes in the semiconductor substrate is lowered without lowering the barrier height thereof to holes captured on the memory nitride film side.

The invention discloses a shared storage message queue-based implementation method for high availability of virtual machines and relates to the field of cloud computing. The shared storage message queue-based implementation method for the high availability of the virtual machines comprises the following steps: initializing a piece of contiguous space on shared storage by a server program to serve as a logical volume; distributing a plurality of contiguous sectors from the logical volume to serve as a sector pool of a client program; acquiring the configuration information of the sector pool and the number of a virtual machine, of which the high availability is enabled, by the client program; sending a heartbeat message by the client program, and updating the timestamp of a virtual machine control block maintained by the client program; receiving the heartbeat message by the server program, and updating the timestamp of the virtual machine control block maintained by the server program by utilizing the timestamp carried in the heartbeat message. According to the shared storage message queue-based implementation method disclosed by the invention, the unnecessary stop time of the virtual machines is avoided; system resource consumption is low by adopting a heartbeat detection mechanism; the performance is high; the service life of the disk of the shared storage is prolonged.

The invention provides a storage unit, a memory and a data writing method. The storage cell includes: a spin-orbit torque providing structure, comprising two spin-orbit torque providing lines which are a first spin-orbit torque providing line and a second spin-orbit torque providing line respectively, and the spin polarization directions of spin currents generated by the first spin-orbit torque providing line and the second spin-orbit torque providing line for write currents in the same direction are different; two storage structures, respectively a first storage structure and a second storagestructure, the two storage structures being arranged at an interval, the first storage structure being arranged on the surface of the first spin-orbit torque supply line, the second storage structurebeing arranged on the surface of the second spin-orbit torque supply line, and each storage structure comprising a free layer which is in contact with the spin-orbit torque supply line. The write-inspeed of the storage unit is high.

The invention discloses a storage management method of the NOR Flash of a small-internal-memory single-chip microcomputer and relates to the field of data processing. The method is characterized in that a NOR Flash chip which comprises a storage module and an executing program module is integrated onto the small-internal-memory single-chip microcomputer, and executing program module achieves datawriting and data reading on a storage module and spatial-loss-balancing storage management by building a sector mapping table. The method has the advantages that data storage safety is increased, andthe difficulty for cracking NOR Flash data content is increased; original data can be recovered, and data access reliability is guaranteed; the service life of the NOR Flash is prolonged by the loss balancing function; an upper program can directly read and write the NOR Flash and does not need to consider the erase operation of the NOR Flash; writing speed is higher than direct NOR Flash operation.

The invention discloses a vehicle-mounted DVR (Digital Video Record) raw disk file storage system, which is applied to DVR video big data storage. The system comprises a disk, an equipment side and a player, wherein the equipment side and the player are connected with the disk; the equipment side is also used for writing data; and the player is used for reading the data. The disk is divided into two partitions, wherein one partition is a data index partition of the first partition, the other partition is a data storage partition of the second partition, and the ratio of the data index partition to the data storage parathion is about 1:500. Since the data index partition of the second partition does not need to carry out the recording work of any file system, the a writing speed is high, the data index partition of the second partition does not need to be formatted and does not need to carry out system detection work, all file system formatting, system detection and file system repair happen in an ultra-small partition, i.e., the data index partition of the first partition, workload is greatly reduced even if a behavior style is the same, all pieces of work can be finished within 30 seconds, a flying feeling is brought for users during daily startup and routine examination and repair, and the system has the advantages of being high in running speed, smooth in use and convenient in operation.

The invention discloses a data writing method, a data writing device, a solid state disk and a computer readable storage medium. The data writing method is applied to the solid-state disk. The solid state disk comprises a plurality of physical storage areas, wherein each physical storage area comprises a plurality of data blocks, the plurality of data blocks comprise storage data blocks and reserved data blocks, and the method comprises the following steps: when at least one reserved data block in the physical storage area is fully written with data, determining the quantity of valid data in each storage data block in the physical storage area; judging whether a storage data block with the number of valid data being zero exists in the physical storage area or not; and if yes, erasing all data in the storage data block with the number of valid data being zero in the physical storage area. The method is high in data writing speed and particularly suitable for the field of video monitoring.

The invention provides a resistance random access memory based on multiferroic heterostructure. The resistance random access memory comprises a substrate, a ferromagnetic bottom electrode layer, a ferroelectric barrier layer, a ferromagnetic top electrode layer, an insulating layer, and a contact electrode lead layer, wherein the ferromagnetic bottom electrode layer is arranged on the substrate; the ferroelectric barrier layer is arranged at one side, deviated from the substrate, of the ferromagnetic bottom electrode layer, and the ferroelectric barrier layer partially covers the ferromagneticbottom electrode layer; the ferromagnetic top electrode layer is arranged at one side, deviated from the ferromagnetic bottom electrode layer, of the ferroelectric barrier layer, and the area of theferromagnetic top electrode layer is same as that of the ferroelectric barrier layer; the insulating layer is arranged on the ferromagnetic bottom electrode layer and surrounds the sidewall of the ferroelectric barrier layer and the sidewall of the ferromagnetic top electrode layer; and the contact electrode lead layer is arranged at one side, deviated from the ferroelectric barrier layer, of theferromagnetic top electrode layer. The memory has the features of being fast in writing speed and low in written current density and has multiple non-volatile memory states.

A polymorphic non-volatile solid-state memory cell based on a vertical read/write operation includes a bottom electrode layer, a ferroelectric piezoelectric layer formed on the bottom electrode layer,an intermediate electrode layer thereon, a pn junction layer adjacent to the intermediate electrode layer, and a top electrode layer thereon. The ferroelectric piezoelectric layer is used as the information writing layer and the pn junction layer is used as the information storage layer. The ferroelectric piezoelectric layer has a plurality of stress states under the vertical electric field, andthe pn junction layer has a plurality of non-volatile resistance states on the ferroelectric piezoelectric layer, so that the information can be written and erased. A read current or voltage is applied to the pn junction layer in a vertical direction so that information of the memory layer is read vertically. Vertical writing and reading of information and polymorphic features are conducive to greatly improve the storage density; the invention realizes information writing and erasing by utilizing an electric field, which is also conducive to reducing information access power consumption.

A P-channel non-volatile memory is described. The P-channel non-volatile memory includes a substrate, a first memory cell, and second memory cell. An N-well is disposed over the substrate, and the first cell and the second cell are disposed over the N-well. The first memory cell includes a first gate, a first charge storage structure, a first doped region and a second doped region. The first doped region and the second doped region are disposed in the substrate on the respective sides of the first gate. The second cell includes a second gate, a second charge storage structure, a third doped region, and the second doped region. The third doped region and the second doped region are disposed in the substrate on the respective sides of the second gate. The second cell and the first cell share the second doped region.

The invention discloses an air quality big data management method and system for smart cities. Air quality data of the multiple smart cities are managed and early warned. A multi-dimensional air quality big database is established, and the database is a cloud database and provides storage and retrieval functions. An air quality big data management main system of the smart cities is built based ona Hadoop platform. Data of the cloud main system comes from monitoring points of all subsystems. Only a small amount of historical data is locally stored in the monitoring points. The air quality early warning subsystem acquires required data from the main system, predicts local air quality data by using a Spark-based distributed prediction model in combination with various influence factors and corresponding data characteristics, performs early warning on possible serious conditions, and takes processing measures.

The invention provides an information read-write method and device based on a block chain, and the method comprises the steps: receiving a service processing request of a project member, wherein the service processing request carries a to-be-processed service material of the project member; sending a business file in the to-be-processed service material to an object storage server side and receiving a file storage identifier returned by the object storage server side; writing the service information in the to-be-processed service material and the file storage identifier into a block chain, andstoring a Hash value which is returned by the block chain and corresponds to writing success information; and writing the file storage identifier of the object storage server into the block chain, and improving the success rate of writing the information into the block chain by combining the public transparency and collective maintenance characteristics of the block chain and the characteristicsof large storage information amount and information security of the object storage server.

A data storage method and device, used for solving to some extent a technical problem that an existing storage system in a data duplication manner cannot provide both desirable read and write performance. In some feasible implementation manners, the method comprises: writing a first duplicate of data to be stored into multiple main storage devices in a main storage subsystem in a first data organization manner, and writing a second duplicate of the data to be stored into an on-duty backup storage device in a backup storage subsystem in a second data organization manner, the on-duty backup storage device being the only backup storage device in a working state (110); and reading data that is stored in the main storage device corresponding to the on-duty backup storage device and is inconsistent with that in the on-duty backup storage device, and writing the read inconsistent data into the on-duty backup storage device in a third data organization manner (120), wherein the first data organization manner and the second data organization manner are write-optimized, the write speed in the second data organization manner is faster than that in the first data organization manner, and the third data organization manner is read-optimized.

The invention discloses a video compression system and method, a computer readable storage medium and a server, the video compression system comprises a color space conversion module, a memory, an FIFO array module, a read-write control module and a video compression control module, the memory comprises a cache space and a compressed data storage space, the FIFO array module comprises a plurality of FIFOs, and the read-write control module comprises a read-write control module and a video compression control module. The FIFO is used for storing data of a Y component or a V component or a U component, and the FIFO array module is configured to correspondingly set the bit width of the FIFO based on the number of the FIFO so as to enable the FIFO to store the data of the Y component or the U component or the V component of two adjacent rows at the same time; and the read-write control module is configured to sequentially read Y component or U component or V component data at corresponding positions of two adjacent rows from the corresponding FIFO in each clock period and send the data to the video compression control module. Through the scheme of the invention, the reading speed of the video data and the video compression speed are improved.

Tampering with fiscal information written to memory can be detected without reducing the write speed. When fiscal information is written to first memory unit 411 by means of a fiscal control CPU 42 , a memory control CPU 412 writes a first hash value corresponding to the fiscal information in second memory unit 413. When fiscal information is read from the first memory unit 411, the fiscal control CPU 42 reads the first hash value from the second memory unit 413 through the memory control CPU 412, compares the first hash value with a second hash value calculated from the fiscal information read from first memory unit 411, and detects tampering with the fiscal information.

The invention discloses a high-speed rotating LED display method and system based on double-port RAM and double CPUs. The high-speed rotating LED display method comprises the steps that an upper computer converts a video or image file into an LED file, and transmits the LED file to a first processor through an Internet of Things module; the first processor stores the data packet into a Nand Flashread-write module; the first processor reads video or image data from the Nand Flash read-write module and writes the data space of the dual-port RAM unit fully; the second processor reads part of video or image data from a specified address of the dual-port RAM unit at regular intervals and transmits the data to the CPLD unit for latching; and the CPLD unit transmits the video or image data to the LED driving module. The high-speed rotating LED display method converts a video or picture file into an LED file through the upper computer, increases the data transmission and reading speed to a great extent, and realizes higher resolution by adopting two CPUs, one dual-port RAM unit and one CPLD unit.

Among register settings performed on a DMAC (302) by a master (301), a transfer source address setting detection unit (305) acquires a DMA transfer source address from the DMA transfer source region transfer start address setting. Before the DMAC (302) starts a DMA transfer, a look-ahead process unit (303) reads out data from a resource (304) specified by the DMA transfer source address and increments the DMA transfer source address, thereby repeating the look-ahead process. The DMAC (302) starts a DMA transfer upon completion of the register setting by the master (301) and reads out data from the DMA transfer source region which has been read out in advance into the look-ahead process unit (303) so as to transfer the data to the DMA transfer destination region in the resource (304).

The invention provides a flash memory data protection method. The flash memory data protection method comprises the steps of allocating three discontinuous different pages of a flash memory to to-be-written data; writing the to-be-written data and the check value into three different pages in sequence; when the written data is read, sequentially reading the written data of the three different pages according to a writing sequence, verifying the written data of the current read page by using a verification value, and when the written data of the current read page is determined to be valid data,taking the written data of the current read page as final data for use; when it is determined that the written data of the current read page are invalid data, the written data of the next page are read and verified until the written data of all pages are read and verified; and when it is determined that the written data of the three different pages are all invalid data, performing data recovery and verification according to the written data of the three different pages. According to the invention, data loss or damage can be prevented, and the reliability and correctness of the read data are ensured.

The invention provides a method and a system for quickly testing assembly equipment in a production process. The method comprises the following steps: S1, inputting testing information into unassembled single board modules; s2, pasting an identification code on the assembled assembly equipment, wherein the identification code is associated with the testing information; s3, allowing an assembly testing station to obtain the testing information by scanning the identification code; and S4, according to the testing information, allowing the assembly equipment to establish connection with a testing gateway specified by the assembly testing station according to the testing information and enter a test. According to the scheme, information such as communication parameters and communication channels is input into the assembly equipment in advance, the testing gateway 7 determines the information of the to-be-tested assembly equipment, the assembly equipment clearly knows the information of the testing gateway and the channels, the assembly equipment directly joins in the corresponding channels of the corresponding gateways to communicate with the testing gateway after being powered on, channel scanning is not needed, and the testing efficiency is greatly improved.

The invention discloses a method for writing in a journal file. The method for writing in the journal file comprises the steps of recording operational incidents generated by a system executing operational instruction; writing the operational incidents in a backend database according to a preset rule, and forming the journal file in a disk. The invention further discloses a device for writing in the journal file. According to the method and device for writing in the journal file, the working efficiency that the system improves data recovery according to the journal file is improved.

The invention relates to a novel message controller and a communication method thereof, which can realize high-speed communication between multiple processors, includes one or more sets of message controller register files, the message controller register file is connected to the processor through a bus or a network, The message controller register file is connected with a memory through a bus ora network. The message controller register file is composed of a write pointer register, a read pointer register, an effective unit number register, an effective unit number register, a memory base address register and a memory capacity register. The message controller register file comprises a write pointer register, a read pointer register, a valid unit number register, a memory base address register and a memory capacity register. The advantages of this scheme are: high speed communication; There are no restrictions on the types of queues, including, but not limited to, first-in, first-outqueues and first-in, second-out queues; The types of queues can be selected according to the application scenario. Each processor can read and write to this message controller via an on-chip bus or network, and the message controller itself does not specify directionality.