163results about How to "Increase the oscillation frequency" patented technology

A switching power source comprises a current comparator 27 for comparing a voltage level of signals acquired by a current detector 9 with a reference voltage level VDT to produce detection signals VCP of first or second level L or H; an edge detector 28a for sensing an edge of drive signal VG supplied to a gate terminal of MOS-FET 3 during the period of transition from turning on to off of MOS-FET 3; and a decision means 28b for receiving a current detection signal VCP from current comparator 27 to produce an output signal VLD when edge detector 28a catches an edge of drive signal VG; wherein decision means 28b produces different output signals VLD of respectively first and second voltage levels L and H under the light and heavy load conditions to precisely and certainly detect on the primary side of transformer 2 the load condition on the secondary side of transformer 2 for improvement in conversion efficiency.

A ring oscillator that uses active negative capacitance at one or more stages of the ring oscillator to adjust the frequency of oscillation. By using a negative capacitance generator, negative capacitance may be placed in shunt with each stage of the ring, thereby reducing the effective input capacitance. Tuning of the ring oscillation frequency is accomplished without changing the bias point of each stage. The ring oscillation frequency may be increased, rather than reduced as in current approaches.

A phase lock loop utilizes a multiphase oscillator having a plurality of digital inputs. A plurality of DQ flip-flops, offset in time from each other generate a plurality of control signals to remove control phase information from the oscillator in digital form. A DQ flip-flop connected between any two digital inputs on the oscillator determines direction of the traveling wave. The direction and phase information address a look-up table to determine the current fractional phase of the oscillator. A divide by N circuit is used to reduce the oscillator frequency. A total phase indicator signal for the oscillator is determined using the current fractional phase. The total phase is compared to a reference phase to produce a control signal for making adjustments to the oscillator. In a feed-forward path, frequency dividers divide a high frequency signal from the oscillator to a lower desired frequency, thereby increasing phase resolution.

The present invention provides a spin torque oscillator that can realize stable oscillation and has high reliability. A laminated structure including a first magnetic layer 1 having a bcc crystal structure and having in-plane magnetic anisotropy and a second magnetic layer 2 having perpendicular magnetic anisotropy laminated on the first magnetic layer 1 and including a multilayer film of Co and Ni is used.

A biological sample can be subjected to measurement, description and ionization of ions is possible under atmospheric pressure without undergoing pretreatment. Imaging having a resolution on the nanometer order can be performed. An STM needle (probe) of an XYZ-axis-drive piezoelectric element is oscillated along the Z axis to contact the sample to a depth on the nanometer order and capture molecules at the needle tip. A pulsed high voltage is applied to the needle, achieving needle electrospray. The sample molecules are then desorbed and ionized, and mass spectrometry is carried out. The needle is swept in the XY directions, oscillation is repeated and an image obtained by molecular imaging of a nanometer area of the biological sample is measured. The probe may be brought into contact with a droplet produced at the tip of a capillary connected to the outlet port of a liquid chromatograph to capture a sample.

A voltage controlled oscillator (VCO) includes a voltage controlled current source (VCCS), a negative resistance circuit (NRC), a first transformer, a second transformer, a first transistor and a second transistor. A current terminal of the VCCS receives a control voltage. First terminals of first and second current paths in the NRC are coupled to a current terminal of the VCCS. Primary sides of the first and the second transformers are respectively coupled to second terminals of the first and the second current paths. Secondary sides of the first and the second transformers are first and second output terminals of the VCO, respectively. First terminals of the first and the second transistor are respectively coupled to the secondary sides of the first and the second transformers. Control terminals of the first and the second transformers are respectively coupled to the primary sides of the first and the second transformers.

An LED drive circuit of the present invention carries out, by use of a DC-to-DC converter (L202,Q202,D209A,C212), light control of an LED. The light control is carried out, in a region where a light control level is equal to or greater than a certain light control level, by a DC light control method for adjusting a pulse height of an LED drive current. The light control is carried out, in a region where a light control level is equal to or less than the certain light control level, by a PDM light control method for adjusting an off period of oscillation of the DC-to-DC converter.

In a crystal oscillator having a crystal blank, and an IC chip having integrated therein an oscillation circuit, the crystal blank has a first excitation electrode disposed on its first principal surface, and an extension electrode extended from the first excitation electrode to a peripheral region of the crystal blank, and folded back to the second principal surface. A first and a second crystal connection terminal are disposed on a first principal surface of the IC chip, and the second crystal connection terminal extends to a central region on the first principal surface of the IC chip to constitute a second excitation electrode. The extension electrode is secured to the first crystal connection terminal through a bump, such that the second principal surface of the crystal blank opposes the first principal surface of the IC chip, thereby holding the crystal blank in parallel with the first principal surface of the IC chip. The crystal blank is excited by the first and the second excitation electrodes.

The invention discloses a phase-locked acceleration circuit based on level width extraction and a phase-locked loop system. The phase-locked acceleration circuit comprises a level extraction control circuit and a current injection switch module. The control output end of the level extraction control circuit is connected with the current injection control end of the current injection switch module;meanwhile, a current stepping control end of the current injection switch module and a driving input end of the level extraction control circuit are connected to a preset control signal output end ofthe phase frequency detector, which is used for controlling the current injection switch module to inject charges according to the level width change condition of the output signal of the preset control signal output end until the phase of the reference clock signal input by the phase frequency detector is synchronous with the phase of the feedback clock signal. The low-pass filter receives charges injected by the current injection switch module under the control on-off action of the phase-locked accelerating circuit, the charges are rapidly injected into the low-pass filter until the chargesare close to be stable, meanwhile, oscillation can be avoided through stepping charge injection, and the phase-locked time is shortened.

A charging and discharging control circuit controls charging and discharging of a secondary battery by monitoring at least one of a voltage across, and an electric current through, the secondary battery and controlling a switching circuit in a charging and discharging pathway of the secondary battery. A charging and discharging switch control circuit controls the switching circuit. A driver circuit outputs a signal from the charging and discharging switch control circuit to the switching circuit through an output terminal. A logic circuit compares a voltage of the signal from the driver circuit with a voltage applied to the output terminal from an external portion. The charging and discharging control circuit is switched between a normal operating state and a testing state in accordance with a result of the comparison by the logic circuit.