35results about How to "Increase the maximum oscillation frequency" patented technology

A method, and a resulting device, for fabricating a heterojunction bipolar transistor (HBT). HBT devices have a high transconductance typical of bipolar devices and are additionally capable of high-power operation. To achieve the aforementioned characteristics, HBT devices are generally of the npn type, preferably with a thin, heavily doped base. The thin, heavily doped base maintains a low base-spreading resistance, leading to a high maximum oscillation frequency. In order to maintain a high doping concentration while minimizing outdiffusion of the dopant material, carbon is remotely doped into the base region. Details of the carbon dopant techniques and procedures are described with respect to fabrication of an exemplary HBT device.

The invention relates to a voltage controlled oscillator, which comprises four transistors, an integrated on-chip inductor and two symmetric variable capacitors, wherein, two transistors realize negative resistance through cross coupling, thereby providing energy to oscillate an LC circuit comprising the inductor and the variable capacitors; by changing the capacitance of the variable capacitors, different output frequencies of the oscillator are obtained. The invention also comprises two resistors with the same value and two capacitors with the same value; a grid terminal of one of the rest transistors is connected with a terminal of a resistor and a terminal of a capacitor at the same time, which jointly form an active inductor; a grid terminal of the last transistor is connected with a terminal of a resistor and a terminal of a capacitor at the same time, thus jointly forming another active inductor; the two active inductors provide bias current for the voltage controlled oscillator. The invention enlarges the tuning range of the voltage controlled oscillator and reduces the phase noise.

The present invention discloses a T-gate and N-surface GaN/AlGaN fin-type high electron mobility transistor. The problems are mainly solved that the maximum oscillating frequency of a current microwave power device is small, the ohmic contact resistor is large and the short channel effect is severe. The transistor comprises from down to up: a substrate (1), a GaN buffer layer (2), a ALGaN barrier layer (3), a GaN channel layer (4), a gate medium layer (5), a passivation layer (6), a source gate electrode and a drain gate electrode. The buffer layer and the channel layer employ N-surface GaN materials; the GaN channel layer and the ALGaN barrier layer form GaN/AlGaN heterojunction; the gate electrode employs T-type gate and is wrapped at two sides and the upper portion of the GaN/AlGaN heterojunction to form a three-dimensional gate structure. The T-gate and N-surface GaN/AlGaN fin-type high electron mobility transistor has good gate-control capability, small resistor and the maximum oscillating frequency, and is able to be a microwave power device with the small size.

The present invention relates to a high linearity GaN fin-type high electron mobility transistor and a manufacture method thereof. From bottom to top, the transistor sequentially comprises a substrate, a buffer layer, a barrier layer, and a passivation layer. A source electrode is arranged at one end above the barrier layer and a drain electrode is arranged at the other end. The passivation layer is arranged above the barrier layer between the source electrode and the drain electrode. A groove is arranged in the passivation layer. A T-shaped gate is arranged in the groove. The transistor is characterized in that GaN-based three-dimensional fins in periodical arrangement are etched only on the barrier layer and the buffer layer in an area below the groove, the length of the GaN-based three-dimensional fins is equal to the length of the groove, and an isolation groove that is etched is arranged between adjacent GaN-based three-dimensional fins. The transistor has high linearity and output current, strong gate control capability, good heat dissipation performance, and high frequency characteristic. The manufacture method is simple and reliable, and is applicable to high power, high linearity microwave power devices.

The invention discloses an ultralow ohmic contact resistance graphene transistor comprising a substrate, and a source and a drain which are located on the substrate. A channel region is formed between the source and the drain. The channel region comprises a graphene layer, a dielectric layer and a gate from down to up successively. The preparation method of the ultralow ohmic contact resistance graphene transistor comprises the following steps: (1) the graphene layer is formed; (2) the dielectric layer is deposited; (3) on the dielectric layer, the channel region is covered with a photoresist pattern; (4) the exposed dielectric layer is corroded; (5) the exposed graphene layer is etched; (6) a source-drain ohmic contact metal is evaporated to form an ohmic contact metal layer; (7) the required source and drain regions are covered with the photoresist pattern; (8) the source and the drain are formed; (9) and the gate is formed. According to the method of the invention, the one-dimensional linear contact between the source-drain ohmic contact metal and the graphene can be realized so as to greatly reduce the contact resistance between the graphene and the metal, so that the maximum oscillation frequencycan be increased, and the applications of the graphene field effect transistor can be facilitated.

The invention discloses a 4H-SiC metal semiconductor field effect transistor with a slope-shaped grid. The 4H-SiC metal semiconductor field effect transistor comprises a 4H-SiC semi-insulating substrate, a P-type buffer layer and an N-type channel layer from bottom to top, a source electrode cap layer and a drain electrode cap layer are arranged on the surface of the N-type channel layer, a source electrode and a drain electrode are arranged on the surface of the source electrode cap layer and the surface of the drain electrode cap layer respectively, a slope-shaped groove inclined towards one side of the source electrode cap layer is formed in the upper end face of the N-type channel layer, the slope-shaped grid is arranged is arranged in the slope-shaped groove, the lower end face of the slope-shaped grid is matched with the slope-shaped groove, the upper end face of the slope-shaped grid is parallel to the upper end face of the N-type channel layer, and the distance between the slope-shaped grid and the source electrode cap layer is smaller than that between the slope-shaped grid and the drain electrode cap layer. The field effect transistor has the advantages of being high in drain electrode output current and excellent in frequency property.

The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor component. The inventive method comprises the following steps: a first semiconductor area (32, 34) of a first conductivity type (p) is provided above a semiconductor substrate (1); a connecting area (40) of the first conductivity type (p<+>) is provided above the semiconductor area (32, 34); a first insulating area (35″) is provided above the connecting area (40); a window (F) is formed within the first insulating area (35″) and the connecting area (40) so as to at least partly expose the semiconductor area (32, 34); a sidewall spacer (80) is provided in the window (F) in order to insulate the connecting area (40); a second semiconductor area (60) of the second conductivity type (n+) is provided so as to cover the sidewall spacer (80) and a portion of the surrounding first insulating area (35″); the surrounding first insulating area (35″) and the sidewall spacer (80) are removed in order to form a gap (LS) between the connecting area (40) and the second semiconductor area (60); and the gap (LS) is sealed by means of a second insulating area (100) while a gaseous atmosphere or a vacuum atmosphere is provided inside the sealed gap (LS).

The invention discloses a method for improving the frequency characteristic of AlGaN/GaN HEMT, which comprises: wiring a millimeter-wave GaN HEMT device with a conventional structure, and then forming a metal protection pattern on the surface of the device by optical lithography; The wet etching process performs a medium corrosion on the device; peels and removes the glue on the etched device. The invention reduces parasitic capacitances of the gate source and the gate drain, and improves the cut-off frequency (ft) and the highest oscillation frequency (fmax) of the device.

A SiGe HBT is disclosed, which includes: a silicon substrate; shallow trench field oxides formed in the silicon substrate; a pseudo buried layer formed at bottom of each shallow trench field oxide; a collector region formed beneath the surface of the silicon substrate, the collector region being sandwiched between the shallow trench field oxides and between the pseudo buried layers; a polysilicon gate formed above each shallow trench field oxide having a thickness of greater than 150 nm; a base region on the polysilicon gates and the collector region; emitter region isolation oxides on the base region; and an emitter region on the emitter region isolation oxides and a part of the base region. The polysilicon gate is formed by gate polysilicon process of a MOSFET in a CMOS process. A method of manufacturing the SiGe HBT is also disclosed.

The invention discloses a 4H-SiC metal semiconductor field effect transistor having a partial sinking channel. The 4H-SiC metal semiconductor field effect transistor having a partial sinking channel, from the bottom to the top, comprises a 4H-SiC half insulation substrate, a P type buffer layer, and an N type channel layer; the N type channel layer surface is provided with a source electrode cap layer and a drain electrode cap layer; the surfaces of the source electrode cap layer and the drain electrode cap layer are provided with a source electrode and a drain electrode; a grating electrode is formed above the N type channel layer and close to one side of the source electrode cap layer; part of the grating electrode close to the source electrode cap layer concaves downwardly to form a concave grating structure; a concave grating drain drifting area is formed between the grating electrode and the drain electrode cap layer; a concave grating drain buffer layer is formed on the upper end surface of a P buffer layer and close to the portion between the drain electrode cap layer and the concave grating drain side; and the concave depth of the concave grating drain drifting area is identical to that of the concave grating drain buffer layer. The 4H-SIC metal semiconductor field effect transistor having a partial sinking channel has advantages that the drain electrode is big in output current, the breakdown voltage is high and frequency characteristic is good.

The semiconductor device comprises a collector layer 14; a base layer 16 of a carbon-doped Ga_xIn_1-xAs_ySb_1-y layer having one surface connected to the collector layer 14; an emitter layer 18 connected the other surface of the base layer 16; a base contact layer 30 of a carbon-doped GaAsSb layer electrically connected to the base layer 16; and a base electrode 32 formed on the base contact layer 30. The semiconductor device of such structure can have a much reduced base resistance R_B, whereby InP/GaInAsSb-based HBTs including InP/InGaAs-based HBTs can have higher maximum oscillation frequency f_max. Because of the carbon-doped semiconductor layer the semiconductor device can have higher reliability.

The invention discloses a silicon-germanium heterojunction bipolar transistor. A collector region consists of a global collector region and a local collector region, and is in contact with a pseudo buried layer. A base region is composed of a P-type silicon-germanium epitaxial layer formed on the surface of the collector region. An emitter region is composed of N-type polycrystalline silicon formed on the base region, and the N-type polycrystalline silicon consists of bottom polycrystalline silicon and top polycrystalline silicon. The local collector region and the emitter region window of thebottom polycrystalline silicon adopt the same photolithography definition to realize complete alignment of the local collector region and the bottom polycrystalline silicon. Before ion implantation in an outer base region, an emitter region window dielectric layer is removed. The ion implantation at a dip angle in the outer base region is self-aligned with the side of the bottom polycrystalline silicon, which increases the doping of an overlapping outer base region which is located outside the bottom polycrystalline silicon and covered by the top polycrystalline silicon and reduces the resistance of the base region. The invention further discloses a manufacturing method of the silicon-germanium heterojunction bipolar transistor. The characteristic frequency and the highest oscillation frequency of devices can be simultaneously improved. The silicon-germanium heterojunction bipolar transistor is applicable to the ultrahigh-frequency application requirement of devices, and is of low process cost.