20 results about "Heterojunction field effect transistor" patented technology

The present invention relates to an open-gate AlGaN / GaN heterojunction field-effect transistor with an auxiliary gate structure and its application, belonging to the field of microelectronic research technology. Compared with conventional open-gate AlGaN / GaN heterojunction field-effect transistors, the present invention introduces a non-open auxiliary gate structure, effectively improving the saturation characteristics of open-gate devices. The auxiliary gate is located between the drain of the device and the open main gate. Its purpose is to fix the surface potential of the region in which it is located, so that the current saturation of the open-gate device is freed from dependence on the surface virtual gate, thereby improving the saturation characteristics of the device and making it more stable and controllable. By applying different potentials to the main gate and the auxiliary gate, different device operating modes can be obtained, which makes the application of the present invention in circuits more flexible and more suitable for the increasingly complex field of integrated circuits.

The invention provides a P-channel heterojunction field effect transistor of groove gate structure 3C / 4H-SiC and a preparation method of the P-channel heterojunction field effect transistor, which can be applied to the technical field of semiconductors. The device comprises a substrate, wherein the material of the substrate comprises 4H-SiC; the epitaxial layer is formed on the upper surface of the substrate, and the material of the epitaxial layer comprises 3C-SiC; the source electrode and the drain electrode are formed on the upper surface of the epitaxial layer; the passivation layer covers the upper surface of the source electrode and the upper surface of the drain electrode; the top of the groove gate is formed on the upper surface of the passivation layer, the bottom of the groove gate is formed in the epitaxial layer, the bottom of the groove gate is electrically isolated from the epitaxial layer through a gate oxide dielectric layer, and the orthographic projection area of the top of the groove gate on the substrate covers the orthographic projection area of the bottom of the groove gate on the substrate.

The application belongs to the microelectronic field and particularly relates to a semiconductor heterojunction field effect transistor with a P-type doped structure. A P-type doped layer structure is introduced on a substrate, the material and type of the P-type doped layer structure are set, the electric field peak of a gate edge and a drain edge and the average electric field of a channel are modulated, and the distribution is more uniform; meanwhile, the saturation output current degradation and the on-resistance increase are avoided due to the shielding effect of the thick gallium nitride buffer layer, so that the breakdown voltage and the figure of merit of the device are improved. Finally, the application effectively solves the problem of insufficient voltage resistance of the existing GaN HFET device under the premise of ensuring the performance of the device.

The invention provides a diamond aluminum nitride heterojunction field effect transistor and a preparation method thereof, and relates to the technical field of diamond devices. The source electrode and the drain electrode which are in ohmic contact are prepared on the surface of the diamond substrate firstly, then the aluminum nitride layer and the protection layer are grown in sequence, so that the diamond aluminum nitride heterojunction is formed in the channel region between the source electrode and the drain electrode, and the protection layer covers and protects the aluminum nitride layer at the same time. In the subsequent preparation step, under the shielding protection of the protective layer, the aluminum nitride outside the gate groove between the source and the drain is prevented from being exposed when the gate groove is etched, and the aluminum nitride is also prevented from being exposed when the gate electrode is prepared. According to the embodiment of the invention, the aluminum nitride growth step is carried out later, the source and drain electrodes are prepared firstly, then the aluminum nitride is grown, and then the gate electrode is prepared on the aluminum nitride. Therefore, the interval steps of aluminum nitride growth and gate electrode preparation are reduced, the exposure time of aluminum nitride is shortened, the failure probability of the heterostructure is reduced, and the reliability is improved.

This invention provides a palladium diselenide / tungsten diselenide vertical heterojunction field-effect transistor, its fabrication method, and its application, belonging to the field of semiconductor device technology. The palladium diselenide / tungsten diselenide vertical heterojunction field-effect transistor comprises, from bottom to top, a substrate, a vertical heterojunction, and a metal electrode; the vertical heterojunction includes a tungsten diselenide layer covering the substrate and a palladium diselenide layer covering the tungsten diselenide layer. This invention first constructs a tungsten diselenide layer on the substrate using chemical vapor deposition (CVD), and then directly grows a palladium diselenide layer on the surface of the tungsten diselenide layer using CVD. This vertical heterojunction field-effect transistor exhibits excellent performance with high saturation current density, high carrier mobility, and a high current on / off ratio, solving the technical problem of low performance and incompatibility with two-dimensional n-type semiconductor field-effect transistors in current two-dimensional p-type semiconductor devices.

The invention discloses a heterojunction field-effect tube infrared sensor based on a surface plasmon resonance suspended gate and a preparation method thereof, the heterojunction field-effect tube infrared sensor at least comprises a source electrode, a drain electrode, a suspended gate and at least one heterojunction channel, and the source electrode and the drain electrode are electrically connected through the heterojunction channel. Wherein in the AlGaN / GaN heterostructure, the thickness of the AlGaN grid electrode position is extremely thin, and the AlGaN grid electrode position is of a groove grid structure. The surface plasmon resonance suspended gate structure can be a Pd porous nano film, a Pd nanosphere array or a Pd nanorod array and is located on the AlGaN layer. When infrared light enters, the Pd nanostructure excites the SPR effect, a local enhanced electromagnetic field is generated on a metal / semiconductor interface, and hot electrons are excited. The high-energy electrons can be injected into an under-gate AlGaN barrier layer to regulate and control the 2DEG concentration, so that the channel carrier density and the photoconductive effect are improved. And in combination with the high mobility of 2DEG, the infrared detection performance with high sensitivity and quick response is realized.

This application discloses a hybrid perovskite single crystal material, its preparation method, and its applications, belonging to the field of functional materials. The chemical formula of the hybrid perovskite single crystal material is (C 11 H 18 N)2(C2H8N)2Pb3I 10 Large-size hybrid perovskite single crystals were grown using a cooling method, exhibiting strong photosensitivity and optoelectronic properties. Further, through mechanical exfoliation and dry transfer, these crystals were precisely stacked layer-by-layer with the two-dimensional semiconductor molybdenum sulfide, enabling the construction of a field-effect transistor with a unique heterojunction structure. This heterojunction field-effect transistor demonstrates excellent electrical performance and stability, providing strong technical support for next-generation memory devices, sensors, and logic circuits. It also holds significant application prospects in emerging fields such as flexible electronics, intelligent electronics, and quantum computing.

This invention relates to a method for improving the transconductance and characteristic frequency of AlGaN / GaN heterojunction field-effect transistors based on device structure optimization, belonging to the field of transistor device research technology. Traditional methods for improving transconductance and characteristic frequency are complex in fabrication, require stringent experimental conditions, and have reached the physical limits of GaN materials. This invention, to a certain extent, only requires optimizing the device structure and fabricating the L… GS / L G and L GD / L G AlGaN / GaN HFETs with larger ratios, and the fabrication of L G Smaller AlGaN / GaN HFETs enhance polarized Coulomb field scattering, thereby improving the gate voltage's ability to modulate electron velocity, or fabricate L... GS and L G Smaller AlGaN / GaN HFETs enhance the electron velocity in the channel, thus achieving the same effect of increasing the transconductance and characteristic frequency of AlGaN / GaN HFETs. They are simple, direct, and highly operable.

The application provides an ultra-low on-resistance fin-type heterojunction field effect transistor, comprising: a first conductive type substrate; a drain metal layer; a first conductive type drift layer; a first conductive type first conductive layer; the side of the first conductive type first conductive layer, which is away from the first conductive type drift layer, comprises at least one protrusion; a second conductive type first semiconductor layer; a second conductive type second semiconductor layer; a gate metal layer; a first conductive type second conductive layer; a passivation layer; and a source metal layer. The application utilizes the heterojunction interface electron accumulation effect, and on the basis of the super-junction structure, the on-resistance of the device is further reduced, and the power figure of merit is obviously improved.

The embodiment of the invention provides a diamond / 3C-SiC heterojunction field effect transistor and a preparation method thereof. The method comprises the following steps: epitaxially growing a 3C-SiC buffer layer and an n-type drift layer on the upper surface of a 3C-SiC substrate; etching a preset number of parallel grooves on the upper surface of the n-type drift layer; depositing high (111) orientation quasi-single crystal diamond in the groove by using pulsed bias enhanced MPCVD equipment to obtain a P-type well region; growing a dielectric layer on a non-diamond array region in the upper surface of the n-type drift layer, depositing an ohmic contact layer on a diamond array region, and depositing a back metal contact layer on the lower surface of the 3C-SiC substrate; and depositing a gate on the upper surface of the dielectric layer. And the P-type well region is manufactured through deposition operation, so that high-temperature annealing treatment is avoided. In addition, the high forbidden bandwidth (5.50 eV) of the high (111) orientation quasi-single crystal diamond also improves the stability of the field effect transistor in a turn-off state.

The invention discloses a field effect transistor device with a double-plane body heterojunction structure and capable of improving the current switching ratio and a preparation method, and belongs to the field of organic field effect transistors. The field effect transistor device structure sequentially comprises an N-type heavily-doped silicon grid (6), a SiO2 dielectric layer (5), a P-type organic material (4), an N-type organic material and P-type organic material blending layer (3), an N-type organic material (2) and an electrode (1) made of copper. The preparation method comprises the steps of cleaning a silicon wafer, evaporating the pentacene active layer, evaporating the pentacene / hexadecafluorophthalocyanine copper blending layer, evaporating the hexadecafluorophthalocyanine copper active layer, preparing the source / drain electrode and the like. Compared with the conventional heterojunction technology, the field effect transistor with the double-heterojunction structure is formed by adding the blending layer formed by mixing and growing two materials, the performance of the field effect transistor is greatly broken through, the advantage of lower leakage current is shown, the current switching ratio is greatly increased, and meanwhile, the mobility is increased.

This invention relates to a two-dimensional heterojunction field-effect transistor, its fabrication method, and its application, belonging to the field of transistor technology. The transistor includes a conductive substrate, an insulating dielectric layer disposed on the conductive substrate, a gate electrode disposed on the insulating dielectric layer, a first two-dimensional material layer disposed on the gate electrode, a second two-dimensional material layer disposed on the first two-dimensional material layer, and source and drain electrodes respectively disposed at both ends of the second two-dimensional material layer, with a channel region between the source and drain electrodes. The first and second two-dimensional material layers are made of different materials; the first two-dimensional material layer is a ferroelectric material. The second two-dimensional material layer can form ohmic contacts with the source and drain electrodes. The two-dimensional heterojunction field-effect transistor provided by this invention has a high strength of up to 10. 6 The on / off ratio is close to the theoretical limit of the subthreshold swing.

A switching circuit forming a bidirectional switch between a first node and a second node and resting on a substrate includes a first branch with a first diode in series with a first heterojunction field-effect transistor, and a second branch with a second heterojunction field-effect transistor in series with a second diode, the first branch and the second branch being mounted in parallel to one another and so that the first diode and the second diode are arranged in antiparallel or in anti-series with respect to one another. The first transistor and the second transistor are each provided with a control gate facing a heterojunction band forming an active zone in which an electron gas is capable of being formed. The first diode is a Schottky diode with a metal electrode in contact with the heterojunction band, and the second diode is a Schottky diode with a metal electrode in contact with the heterojunction band. The first diode, the first transistor, the second diode, and the second transistor share the same active zone.

The invention relates to the technical field of semiconductors, in particular to a heterojunction field effect transistor-based biosensor and a preparation method thereof, the biosensor comprises a substrate, a graphene / molybdenum disulfide heterojunction, a liquid metal electrode and a microfluidic module; a central liquid flow channel, a grid electrode pore channel and two groups of electrode channels are formed in the micro-fluidic module; each group of electrode channels comprises two electrode hole channels of which the bottoms are communicated, and the inlet end of one electrode hole channel is used for inserting a wire of external connecting equipment; and the inlet end of the other electrode hole channel is used for infusing liquid gallium-indium alloy to form a liquid metal electrode so as to connect the heterojunction with a wire. According to the invention, by introducing a modular heterojunction film construction method, the assembled preparation of each functional component of the biosensor is realized, the overall manufacturing complexity and time cost are remarkably reduced, the experimental repeatability and the feasibility of large-scale preparation are improved, and the high sensitivity and high specificity of extremely low concentration biomolecule detection are realized.

The present invention relates to the field of microelectronics technology. Specifically, it relates to an enhanced gallium nitride heterojunction field effect transistor. A connection unit is provided between the gate and the barrier layer. The connection unit includes a first gallium nitride layer, a second gallium nitride layer, a third gallium nitride layer, and a fourth gallium nitride layer. The first gallium nitride layer to the fourth gallium nitride layer are arranged in sequence from top to bottom. The first gallium nitride layer is connected to the gate, and the fourth gallium nitride layer is connected to the barrier layer. When the device has a positive gate breakdown voltage, the n-i-p diode formed by the first gallium nitride layer, the second gallium nitride layer, and the third gallium nitride layer is reverse-biased. At this time, the peak value of the electric field is distributed in the second gallium nitride layer. Since the breakdown voltage of the p-i-n diode formed by the third gallium nitride layer, the fourth gallium nitride layer, and the barrier layer is also higher than that of the PN junction diode, the device structure simultaneously has a higher reverse gate breakdown voltage.

The invention discloses an organic-inorganic Van der Waals heterojunction field effect transistor and a preparation method thereof.The organic-inorganic Van der Waals heterojunction field effect transistor comprises a substrate, a dielectric layer, an active layer, a source electrode and a drain electrode, and the substrate, the dielectric layer and the active layer are arranged in parallel and connected in the vertical direction from bottom to top; the source electrode and the drain electrode are arranged in parallel and are connected to the upper surface of the active layer, the active layer is a two-dimensional ultrathin Van der Waals heterojunction, and the two-dimensional ultrathin Van der Waals heterojunction comprises an n-type semiconductor two-dimensional single crystal layer and a p-type semiconductor two-dimensional single crystal layer placed on the n-type semiconductor two-dimensional single crystal layer. According to the organic-inorganic Van der Waals heterojunction field effect transistor, the electron mobility is up to 118.42 cm < 2 > V <-1 > s <-1 >, the hole mobility is 2.3 cm < 2 > V <-1 > s <-1 >, and the switch ratio is up to 107. In the aspect of photoelectric detection performance, the responsivity reaches 68312.78 A / W, the response speed is 33 / 27ms, and the specific detection rate reaches 1.05 * 10 < 14 > Jones.

The invention discloses a gallium oxide heterojunction MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device and a manufacturing method thereof, and mainly solves the problem of high on-resistance of the existing similar devices. The invention discloses a Ga2O3 heterojunction field effect transistor which comprises a drain electrode (1), a Ga2O3 substrate (2), a Ga2O3 epitaxial layer (3), a Ga2O3 layer (4) injected with acceptor ions, a grid electrode (8) and a source electrode (9), and an unintentionally doped Ga2O3 layer (5) and an AlGaO layer (6) are sequentially arranged on the Ga2O3 layer (4) injected with the acceptor ions to form a heterojunction; a groove is formed in the middle of the AlGaO layer (6), and an insulated gate dielectric layer (7) is arranged on the inner wall of the groove; a grid electrode (8) is positioned at the upper part of the insulated gate dielectric layer; and the source electrodes (9) are positioned at the two ends of the AlGaO layer (6). According to the invention, two-dimensional electron gas 2DEG is generated through the introduced heterojunction, the mobility of carriers is improved, the on-resistance is reduced, the on-current is improved, and the device can be used as a power and high-voltage switching device.

The present application relates to a kind of with auxiliary gate structure's side gate AlGaN / GaN heterojunction field effect transistor and working method and application, belong to microelectronic research technical field, relative to with auxiliary gate structure's open gate AlGaN / GaN heterojunction field effect transistor, the present application introduces by a pair of not with channel contact, symmetrically distributed in the two sides of channel and the shape same metal electrode composition side gate, the two-dimensional electron gas under side gate does not participate in conduction, only drain-source channel conduction, so that the present application is used as low-power class A voltage amplifier, input voltage signal can be from 0V start to negative bias variation. By applying different bias to side gate and auxiliary gate, different device operating modes can be obtained, making the application of the present application in the circuit more flexible and more suitable for the increasingly complex integrated circuit field.

The present application provides a dual-gate controlled low on-resistance heterojunction field effect transistor and a manufacturing method thereof, comprising: a substrate, a superjunction structure, a gate structure, a channel structure, a first electrode and a second electrode. The superjunction structure includes a drift layer, and the drift layer is N-type doped. The gate structure includes a barrier layer, a gate cap layer, a first gate and a second gate. The barrier layer and the drift layer are in contact to form a two-dimensional electron gas conductive channel. When forward-conducting, the two-dimensional electron gas conductive channel can reduce the forward on-resistance, increase the forward on-current, and improve the device performance. The gate cap layer is P-type doped. When the transistor is in the off state, the gate cap layer is used to deplete the electrons in the two-dimensional electron gas conductive channel to achieve high withstand voltage performance. The second gate is located on the side surface of the gate cap layer away from the substrate, so that the first gate and the second gate can respectively control the switching state of the transistor, improve the gate reliability, and then improve the device performance.

The invention discloses a gallium nitride enhanced vertical transistor with a high-k insulation CBL and a preparation method thereof, and mainly solves the problems of difficult p-type ion implantation process, serious current leakage phenomenon and insufficient voltage endurance capability of the existing gallium nitride-based power device. The GaN / GaN heterojunction field effect transistor comprises a bottom drain electrode (1), a heavily-doped N-type GaN substrate (2), a lightly-doped N-type GaN drift region (3), a gallium nitride current aperture (4), a current blocking layer (5), an N-type GaN channel layer (6), an AlGaN barrier layer (7), a SiN passivation layer (8), a grid electrode (9) and a source electrode (10) from bottom to top, wherein the grid electrode (9) and the source electrode (10) are parallel to each other at the top. The current blocking layer adopts a high-k insulating medium, and the top gate adopts a groove structure to extend into the AlGaN barrier layer so as to exhaust two-dimensional electron gas. According to the invention, p-type ion implantation is avoided, and the device has good performances of small leakage current and high voltage resistance in a turn-off state, and can be used in the fields of power management power devices, aerospace, charging piles and the like.