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1479 results about "Metal deposition" patented technology

Semiconductor device and manufacturing process therefor

To provide a very-low-cost and short-TAT connection structure superior in connection reliability in accordance with a method for three-dimensionally connecting a plurality of semiconductor chips at a shortest wiring length by using a through-hole electrode in order to realize a compact, high-density, and high-function semiconductor system. The back of a semiconductor chip is decreased in thickness up to a predetermined thickness through back-grinding, a hole reaching a surface-layer electrode is formed at a back position corresponding to a device-side external electrode portion through dry etching, a metallic deposit is applied to the sidewall of the hole and the circumference of the back of the hole, a metallic bump (protruded electrode) of another semiconductor chip laminated on the upper side is deformation-injected into the through-hole by compression bonding, and the metallic bump is geometrically caulked and electrically connected to the inside of a through-hole formed in an LSI chip. It is possible to realize a unique connection structure having a high reliability in accordance with the caulking action using the plastic flow of a metallic bump in a very-low-cost short-TAT process and provide a three-dimensional inter-chip connection structure having a high practicability.
Owner:RENESAS TECH CORP

Apparatus for producing metal coated polymers

A method of improving the breakdown strength of polymer multi-layer (PML) capacitors is provided and of providing a window in food packaging is provided. The method comprises patterning the aluminum coating, either by selective removal of deposited aluminum or by preventing deposition of the aluminum on selected areas of the underlying polymer film. Apparatus is also provided for patterning metal deposition on polymer films comprising masking for defining regions in which metal is deposited. The apparatus comprises: (a) a rotating drum; (b) a monomer evaporator for depositing a monomer film on the rotating drum; (c) a radiation curing element for curing the monomer film to form a cross-linked polymer film; and (d) a resistive evaporator for depositing a metal film on the cross-linked polymer film. The foregoing elements are enclosed in a vacuum chamber. The masking comprising one of the following: (e1) a web mask provided with openings for depositing the metal film therethrough, the web mask including a portion adapted for positioning between the resistive evaporator for depositing the metal film on the cross-linked polymer film and the rotating drum; or (e2) a rotating element for transferring liquid from a source to the rotating drum, the rotating element adapted to transfer the liquid to the rotating drum after the monomer evaporator for depositing the polymer film and before the resistive evaporator for depositing the metal film.
Owner:SIGMA LAB OF ARIZONE

Interconnect structure with gas dielectric compatible with unlanded vias

A multilevel interconnect structure is formed which uses air as a dielectric between wiring lines and which is compatible with the presence of unlanded vias in the interconnect structure. A layer of carbon is deposited over an insulating surface and then a pattern for trenches is formed in the surface of the layer of carbon. Metal is deposited in the trenches and over the layer of carbon and then a chemical mechanical polishing process is used to define wiring lines. An ashing or etch back process is performed on the carbon layer to recess its surface below the surfaces of the wiring lines. An oxide capping layer is provided over the recessed surface of the carbon and the wiring lines, for example using HSQ and curing, and then the carbon layer is consumed through the capping layer using an oxidation process. Air replaces the sacrificial carbon layer during the consumption reaction. Next, a silicon nitride etch stop layer is provided over the surface of the capping layer and then an intermetal dielectric layer is provided. A via is formed by etching through the intermetal dielectric, stopping on the etch stop layer, and then etching through the etch stop layer and the capping layer in distinct processes. The via is filled with a metal plug and then second level wiring lines are formed.
Owner:UNITED MICROELECTRONICS CORP
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