Semiconductor device and method for fabricating the same

a semiconductor device and bipolar transistor technology, applied in the direction of semiconductor devices, transistors, electrical equipment, etc., can solve the problems of not having a sufficient maximum oscillation frequency fsub>max/sub>, the actual doping technique using carbon as a base dopant has not been sufficiently established, and the ingaas-based hbts have very high maximum cut-off frequencies. achieve the effect of low base resistan

a semiconductor device and bipolar transistor technology, applied in the direction of semiconductor devices, transistors, electrical equipment, etc., can solve the problems of not having a sufficient maximum oscillation frequency fsub>max/sub>, the actual doping technique using carbon as a base dopant has not been sufficiently established, and the ingaas-based hbts have very high maximum cut-off frequencies. achieve the effect of low base resistan

US20060284213A1Inactive Publication Date: 2006-12-21FUJITSU LTD

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  • Semiconductor device and method for fabricating the same
  • Semiconductor device and method for fabricating the same
  • Semiconductor device and method for fabricating the same

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Experimental program
Comparison scheme
Effect test

first embodiment

A First Embodiment

[0038] A semiconductor device and the method for fabricating the same according to a first embodiment of the present invention will be explained with reference to FIGS. 1, 2A-2C and 3A-3C.

[0039]FIG. 1 is a diagrammatic sectional view of the semiconductor device according to the present embodiment, which shows a structure thereof, and FIGS. 2A-2C and 3A-3C are sectional views of the semiconductor device according to the present embodiment in the steps of the method for fabricating the semiconductor device according to the present embodiment.

[0040] First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG. 1.

[0041] A collector contact layer 12 of an n+-InGaAs layer is formed on a semi-insulating InP substrate 10. A collector layer 14 of an i-InGaAs layer is formed on the collector contact layer 12. A base layer 16 of a p+-InGaAs layer is formed on the collector layer 14. An emitter layer 18 of an n...

second embodiment

A Second Embodiment

[0067] The semiconductor device and a method for fabricating the same according to a second embodiment of the present invention will be explained with reference to FIGS. 4, 5A-5B and 6A-6C. The same members of the second embodiment as those of the semiconductor device and the method for fabricating the same according to the first embodiment are represented by the same reference numbers not to repeat or to simplify their explanation.

[0068]FIG. 4 is a diagrammatic sectional view of the semiconductor device according to the present embodiment, which shows a structure thereof. FIGS. 5A-5B and 6A-6B are sectional views of the semiconductor device in the steps of the method for fabricating the semiconductor device, which show the method.

[0069] In the present embodiment another semiconductor device having a decreased base resistance RB and the method for fabricating the same will be explained.

[0070] First, the structure of the semiconductor device according to the pre...

third embodiment

A Third Embodiment

[0080] A semiconductor device and a method for fabricating the same according to a third embodiment of the present invention will be explained with reference to FIGS. 7, 8A-8B and 9A-9B.

[0081]FIG. 7 is a diagrammatic sectional view of the semiconductor device according to the present embodiment, which shows a structure thereof. FIGS. 8A-8B and 9A-9B are sectional views of the semiconductor device according to the present embodiment in the steps of the method for fabricating the same, which show the method.

[0082] First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG. 7.

[0083] The basic structure of the semiconductor device according to the present embodiment is the same as that of the semiconductor device according to the first embodiment shown in FIG. 1 but is characterized in that a surface passivation layer 38 of InP layer is formed on the base contact layer 30.

[0084] The surface passivati...

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Abstract

The semiconductor device comprises a collector layer 14; a base layer 16 of a carbon-doped GaxIn1-xAsySb1-y layer having one surface connected to the collector layer 14; an emitter layer 18 connected the other surface of the base layer 16; a base contact layer 30 of a carbon-doped GaAsSb layer electrically connected to the base layer 16; and a base electrode 32 formed on the base contact layer 30. The semiconductor device of such structure can have a much reduced base resistance RB, whereby InP / GaInAsSb-based HBTs including InP / InGaAs-based HBTs can have higher maximum oscillation frequency fmax. Because of the carbon-doped semiconductor layer the semiconductor device can have higher reliability.

Description

[0001] This application is a divisional of application Ser. No. 10 / 092,526, filed Mar. 8, 2002, which is a divisional of application Ser. No. 09 / 191,543, filed Nov. 13, 1998, U.S. Pat. No. 6,399,971.BACKGROUND OF THE INVENTION [0002] The present invention relates to a semiconductor device of a hetero-junction bipolar transistor structure, and a method for fabricating the same. [0003] Recently optical communications systems and mobile communication systems which have high efficiency are required. To make these systems highly efficient semiconductor devices are essential. Hetero-junction bipolar transistors (hereinafter called “HBTs”), which are known as high-speed devices, are one of such devices whose efficiency improvement is prospective. [0004] A structure of a conventional HBT will be explained with reference to FIG. 11. [0005] A collector contact layer 102 formed of an n+-InGaAs layer is formed on a semi-insulating InP substrate 100. A collector layer 104 of an i-InGaAs layer is...

Claims

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Application Information

Patent Timeline
21 Dec 2006
Publication
US20060284213A1
IPC
H01L31/00; H01L29/739; H01L21/331; H01L29/73; H01L29/10; H01L29/201; H01L29/205; H01L29/207; H01L29/737; H01L31/0304; H01L31/0328
CPC
H01L29/1004; H01L29/201; H01L29/205; H01L31/03046; H01L29/42304; H01L29/66318; H01L29/7371; H01L29/207
Inventors
SHIGEMATSU, HISAO; IMANISHI, KENJI