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326 results about "Silicon heterojunction" patented technology

Structure design of tunnel junction in Perovskite/silicon heterojunction lamination solar battery

The invention provides a structure design of tunnel junction in Perovskite / silicon heterojunction lamination solar battery, which relates to the field of solar batteries. A tunneling composite layer TRL with narrow band gap and high doping concentration is added at the junction of the top and bottom part of a lamination battery, and the quite small energy level difference between the conduction band and the valence band can effectively strengthen the carrier recombination at the tunneling junction. The gradient band order at the bottom battery p layer and the tunneling junction can effectivelyenhance the cavity draw-off of the bottom battery and the tunneling junction, and thereby a large amount of charge accumulation among the tunneling junction interfaces can be prevented. After the adding of the TRL having high doping concentration, the defect density of states at the tunneling junction is increased. The electronic cavity assists tunneling through defects, and the probability of recombination and tunneling can be increased. With the adoption of the heterojunction, the spectrum response of the bottom battery can be effectively enhanced, and the opening and pressing loss can be reduced. The preparation method is simple and easy to carry out.
Owner:NANKAI UNIV +1

Silicon quantum dot/graphene/silicon heterostructure-based photoelectric sensor

The invention discloses a silicon quantum dot / graphene / silicon heterostructure-based photoelectric sensor. The photoelectric sensor is sequentially provided with a bottom electrode, an n-type silicon substrate and a silicon dioxide isolation layer from bottom to top, wherein a window is formed in the silicon dioxide isolation layer; the n-type silicon substrate in the window is exposed; the silicon dioxide isolation layer is provided with a top electrode; a single graphene layer and a silicon quantum dot film layer overlay the top electrode; and the single graphene layer is in contact with the n-type silicon substrate in the window to form a graphene / silicon schottky junction. The photoelectric sensor disclosed by the invention is optimization and improvement on the basis of the schottky structure, has the advantages of the schottky junction, utilizes silicon quantum dots as a response increase layer, can effectively improve the responsivity of a device in the whole band, especially the responsivity of ultraviolet and visible parts, and solves the problem that a traditional silicon-based PIN junction is low in response to ultraviolet light detection. The sensor can work at an extremely low reverse bias voltage, and is a low-energy device with a considerable application prospect.
Owner:ZHEJIANG UNIV

A gradient doped silicon-based heterojunction solar cell and its preparation method

The invention discloses a gradient doped silicon-based heterojunction solar cell and a preparation method thereof. A plurality of layers of amorphous silicon membranes of which the doped concentration is increased sequentially are deposited on the surface of crystalline silicon serving as a substrate, and a transparent conductive film with a certain thickness is deposited and an electrode is prepared to prepare the gradient doped silicon-based heterojunction solar cell, wherein the amorphous silicon membranes contact the crystalline silicon to achieve a good passivating effect and obtain highopen-circuit voltage; a plurality of gradient doped amorphous silicon layers can form a strong inner electric field to reduce the composite loss of photo-induced carriers, improve the collection rateof minority carriers and increase short-circuit current; and the doped concentration of the doped amorphous silicon layers contacting the electrode is high, the resistivity is low, and contact resistance between the doped amorphous silicon layers and the electrode can be reduced to improve filling factors of the solar cell. Therefore compared with the conventional silicon-based heterojunction solar cell, the gradient doped silicon-based heterojunction solar cell has high photoelectric conversion efficiency.
Owner:SHANGHAI NORMAL UNIVERSITY

Germanium-silicon heterojunction transistor single event effect test method based on heavy ion microbeam irradiation

The present invention provides a germanium-silicon heterojunction transistor single event effect test method based on heavy ion microbeam irradiation. The problems are mainly solved that a damaging mechanism cannot be directly represented and a sensitive region cannot be accurately located in the prior art. The implementation scheme of the method comprises the steps of: selecting a germanium-silicon heterojunction transistor sample to test electrical properties of the germanium-silicon heterojunction transistor sample; making and testing a PCB test board for irradiation, and performing de-encapsulation processing of a germanium-silicon heterojunction transistor device prior to test; assembling an irradiation platform; setting a test condition of a heavy ion microbeam irradiation test; performing beam ejecting position location of a heavy ion microbeam irradiation device; setting the type and the weight of incident heavy ions; developing the heavy ion microbeam irradiation test; and recoding and processing all the test data, and obtaining a single event effect sensitive region. The method provided by the invention can accurately locate the germanium-silicon heterojunction transistorsingle event effect sensitive region, can improve the experiment precision, can reduce the test cost and can be used for assessment of the astronavigation anti-radiation capacity for microelectronicdevices.
Owner:XIDIAN UNIV

Enhanced graphene-silicon heterojunction photoelectric detection chip and preparation method thereof

The invention discloses a graphene-silicon heterojunction photoelectric detection chip and a preparation method thereof. The detection chip includes a silicon substrate, a frame-shaped SiO2 insulatinglayer on the boundary around the silicon substrate, an interface passivation layer on the silicon substrate, a graphene layer on the interface passivation layer, and a metal nanostructure layer on the graphene layer. By introducing the metal nanostructure to the chip structure, on one hand, the light absorption efficiency of the graphene-silicon heterojunction can be significantly improved and the light responsivity and linear light response range of devices can be improved through the localized surface plasmon resonance characteristic of the metal nanostructure. On the other hand, through the ultrafast photoelectric conversion process of the metal nanostructure under light excitation, the spectral response rate and frequency characteristic of the chip can be significantly improved. In addition, by making use of different spectrum resonance characteristics of metal nanoparticles of different materials and sizes, the specific spectrum enhancement characteristic of the detection chip can be significantly improved.
Owner:XIAMEN UNIV

Method for preparing silicon heterojunction solar cell containing composite emission layer

The invention provides a method for preparing a silicon heterojunction solar cell containing a composite emission layer. The method includes the steps that an amorphous silicon back field N is deposited on one face of a substrate C on which a double-faced intrinsic amorphous silicon passivation layer I is deposited, an amorphous silicon layer P2 with the uniform structure is prepared on the face opposite to the amorphous silicon back field N under the conditions that doping concentration, hydrogen dilution and power density are low, a nanocrystalline silicon layer P1 with the uniform structure is prepared under the conditions that the doping concentration, the hydrogen dilution and the power density are improved, and an amorphous silicon / nanocrystalline silicon composite structure formed by the two silicon films serves as the emission layer of the silicon heterojunction solar cell. Materials have the advantages of being high in transmittance and conductivity through the structure, on the basis, the passivation effect of the surface of crystalline silicon can be improved, short wave response and output characteristics of the cell are improved, and the method for preparing the silicon heterojunction solar cell is simple and easy to carry out.
Owner:捷造科技(宁波)有限公司

Silicon heterojunction solar cell with electroplating electrode and manufacturing method thereof

The embodiment of the invention discloses a silicon heterojunction solar cell with an electroplating electrode and a manufacturing method thereof. The method comprises the steps that a metal seed layer is formed on the surface, where a grid needs to be manufactured, of a cell substrate; a silk-screen printing ink process is used for forming an ink grid line groove pattern on the surface of the metal seed layer; after a preset time interval, the ink grid line groove pattern is cured; the ink grid line groove pattern is used as a mask film, an electroplating process is used for depositing a composite metal layer; the ink grid line groove pattern and the part, which is not in contact with the composite metal layer, of the metal seed layer is removed. The implementation mode for forming the ink grid line groove pattern by the silk-screen printing ink process is simple and controllable, moreover, ink can be removed easily, and the manufacturing technology is simple. In the curing process, the ink can be evenly expanded and deformed, the width of an opening of the obtained ink grid line groove pattern is small, the depth-width ratio of a formed metal grid line is large, the light shading area is small, and the efficiency of the silicon heterojunction solar cell with the electroplating electrode is improved.
Owner:ENN SOLAR ENERGY

Transverse structure germanium/silicon heterojunction avalanche photoelectric detector and preparation method thereof

The invention discloses a transverse structure germanium / silicon heterojunction avalanche photoelectric detector which is prepared on an SOI (Silicon-on-Insulator) substrate and has a double-tabletop structure. The transverse structure germanium / silicon heterojunction avalanche photoelectric detector comprises a substrate, a buried silicon oxide layer, a silicon tabletop area, silicon space areas, silicon contact areas, electrodes and a germanium epitaxial layer. The buried silicon oxide layer is formed on the silicon substrate. The silicon tabletop area is formed on the buried silicon oxide layer. The silicon space areas are formed on the buried silicon oxide layer at two sides of the silicon tabletop area. The silicon contact areas are formed on the buried silicon oxide layer outside the silicon space areas. The germanium epitaxial layer is formed on the silicon tabletop area. The electrodes are in ohmic contact with the silicon contact areas. The two electrodes are manufactured on a silicon layer. A germanium light absorbing layer is arranged above the silicon layer. A bias voltage which is applied to the two electrodes realize electric fields with different strengths in the light absorbing layer and the silicon layer. Light absorption is realized in the germanium and an avalanche multiplication process is realized in the silicon layer.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI +1

CNT (carbon nano tube)-silicon heterojunction solar cell and manufacturing method thereof

The invention discloses a CNT (carbon nano tube)-silicon heterojunction solar cell and a manufacturing method thereof. The solar cell comprises a lower electrode, a silicon wafer arranged on the lower electrode, an annular insulating layer deposited on the silicon wafer, cuprous iodide particles deposited on the silicon wafer and arranged in an annular cavity of the annular insulating layer, a CNT film paved on the insulating layer, the silicon wafer and the cuprous iodide particles, and an annular upper electrode on the CNT. The manufacturing method of the solar cell comprises the following steps of: placing a silicon wafer of which the upper and lower surfaces are provided with the lower electrode and the annular insulating layer in a mixed water solution of Cu (NO3)2 and HF (hydrogen fluoride) to carry out etching so as to obtain a silicon wafer of which the surface is provided with copper particles; placing the silicon wafer with the copper particles in an iodic ethanol solution to carry out halogenation so as to obtain a silicon wafer of which the surface is provided with the cuprous iodide particles; paving the CNT film on the silicon wafer with the cuprous iodide particles; and depositing the upper electrode on the CNT film to obtain the solar cell.
Owner:TSINGHUA UNIV

Self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor and preparation method thereof

The invention discloses a self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor which is designed for solving the defects that the existing product base resistance RB is large and the like. The self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor mainly comprises a Si collector region, a local medium region, a base region, a base region low-resistance metal silicide layer, a heavy doping polycrystalline silicon lifting outer base region, an outer base region low-resistance metal silicide layer, a heavy doping polycrystalline silicon emission region, an emission region low-resistance metal silicide layer, an emission region-base region isolation medium region and a heavy doping single-crystal emission region. The base region low-resistance metal silicide layer extends at the outer side of the emission region-base region isolation medium region. The invention discloses a preparation method for the self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor and used for preparing the bipolar transistor. The self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor and the preparation method of the self-alignment lifting outer base region germanium silicon heterojunction bipolar transistor can effectively reduce the base resistance RB, and are simple in process steps and low in cost.
Owner:TSINGHUA UNIV

Graphene/palladium diselenide/silicon heterojunction self-driven photoelectric detector

The invention discloses a graphene/palladium diselenide/silicon heterojunction self-driven photoelectric detector, which is applied to the technical field of photoelectric detection. In view of the problem that the existing photoelectric detector is limited by weak light absorption performance of graphene and low in responsivity, a technical scheme as follows is adopted: firstly, an n-type siliconwindow is exposed on an n-type silicon dioxide/silicon substrate through dry etching; a gold/indium electrode is plated near the silicon window, a palladium diselenide microchip is prepared by adopting mechanical stripping, and palladium diselenide is transferred to the silicon window by utilizing a positioning dry method; and finally, graphene is transferred in a wet transfer mode and covers thesurfaces of palladium diselenide and the electrode, palladium diselenide serves as an interface modification layer between graphene and silicon, and a graphene/palladium diselenide/silicon heterojunction is formed by the graphene layer, the palladium diselenide layer and the n-type silicon substrate corresponding to the single silicon window. The device provided by the invention is simple in preparation process, has self-driving performance, and has excellent performances such as relatively high responsivity in a visible-near-infrared light band.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Light trapping structure based on nano-zinc oxide silicon heterojunction battery, and preparation method of the light trapping structure

The invention discloses a light trapping structure based on nano-zinc oxide silicon heterojunction battery. The light trapping structure comprises a silicon substrate which has a pyramid appearance and is prepared by wet etching, a ZnO seed layer, and a zinc oxide nano rod or nano cone growing based on the seed layer, wherein the length of the nano rod or nano cone ranges from 200nm to 1,500nm, and the diameter of the nano rod or nano cone is 20-200nm; the preparation method of the light trapping structure comprises the steps of preparing the pyramid appearance by the wet etching, preparing the seed layer by a solution dipping method, and growing the zinc oxide nano rod or nano cone by a hydrothermal method. The light trapping structure has the advantages that when the light trapping structure is used on a Si substrate solar battery, in a range of 400-1,100nm, the average integral reflectivity of the novel light trapping structure on which the zinc oxide nano rod grows is 5.1%, and the average integral reflectivity of the light trapping structure on which the zinc oxide nano cone grows is only 2.5% in comparison with the average integral reflectivity being 10.9% of the conventional light trapping structure with pyramid appearance, so that the integral reflectivity of the novel light trapping structure is lowered obviously.
Owner:NANKAI UNIV
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