203results about How to "Reduced series resistance" patented technology

Three-dimensional transistor structures such as FinFETS and tri-gate transistors may be formed on the basis of an enhanced masking regime, thereby enabling the formation of drain and source areas, the fins and isolation structures in a self-aligned manner within a bulk semiconductor material. After defining the basic fin structures, highly efficient manufacturing techniques of planar transistor configurations may be used, thereby even further enhancing overall performance of the three-dimensional transistor configurations.

A relatively small ESD protection diode is formed on the same chip as a light emitting diode. In one embodiment, the ESD diode is a mesa-type diode isolated from the light emitting diode by a trench. To reduce the series resistance of the ESD diode, the PN junction and metal contact to the semiconductor material is made long and expands virtually the width of the chip. Various configurations of the PN junction and the N and P metal contacts for the ESD diode are described for increasing the breakdown voltage and for improved testing.

A field effect transistor includes: a first nitride semiconductor layer having a plane perpendicular to a (0001) plane or a plane tilted with respect to the (0001) plane as a main surface; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider bandgap than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and a source electrode and a drain electrode formed so as to contact at least a part of the second nitride semiconductor layer or the third nitride semiconductor layer. A recess that exposes a part of the second nitride semiconductor layer is formed between the source electrode and the drain electrode in the third nitride semiconductor layer. A gate electrode is formed in the recess and an insulating film is formed between the third nitride semiconductor layer and the gate electrode.

The invention provides a silver conductive paste used for positive electrode of solar battery and a preparation technique thereof. The paste comprises silver powder, glass powder, an organic carrier and an additive, wherein the silver powder accounts for 65 to 85 percent of the total weight of the paste and consists of two types of silver powder with different particle sizes; the first type of silver powder has the particle size range of 3 to 15 micrometers and is spherical; the second type of silver powder has the particle size range of 0.1 to 3 micrometers and is spherical; the first type of silver powder accounts for 20 to 50 percent of the total silver powder; the glass powder is of Pb-B-Si-Zn-Ti-Al-O series and accounts for 1 to 10 percent of the total weight of the paste; the organic carrier accounts for 10 to 20 percent of the total weight of the paste; and the additive accounts for 0.1 to 3 percent of the total weight of the paste, and consists of BaO powder and CaO powder. The silver powder with different particle size ranges is mutually filled, thus greatly improving the electrical property of the electrode and improving the photoelectric conversion efficiency of the battery. In addition, the invention can ensure good ohmic contact between the paste and a substrate.

The invention relates to composition and a preparation method of silicon solar battery electrode slurry. The silicon solar battery electrode slurry comprises silicon solar battery sunny slope grid electrode silver slurry, back surface field silver-aluminium slurry and back surface field aluminium slurry which are used for preparing an ohm contact layer containing silicon alloy powder. In the invention, silver powder, aluminium powder, a simple substance element and the silicon alloy powder are used as raw materials, and an organic bond and an inorganic bond are used as accessories, and after the raw materials and the accessories are evenly mixed, a three-roller rolling mill is utilized to roll the mixture into the silicon solar battery electrode slurry of which the fineness is 20.0-25.0mum and the viscosity is 20000-40000mpa.s.

Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.

The invention relates to an electro-optic modulator structure containing an additional set of bias electrodes buried within the device for applying bias to set the operating point. Thus the RF electrodes used to modulate incoming optical signals can be operated with zero DC bias, reducing electrode corrosion by galvanic and other effects that can be present in non-hermetic packages. The buried bias electrodes are also advantageous in controlling charge build-up with consequent improvement in drift characteristics. The bias electrode material is useful for routing bias signals inside the device, in particular to external terminals, as well as forming encapsulating layers to permit operation in non-hermetic environments, thereby lowering manufacturing costs. Embodiments using both X-cut and Z-cut lithium niobate (LiNbO₃) are presented. For the latter, the bias electrodes can be split along their axis to avoid optical losses

The invention discloses a process for manufacturing a solar cell by twice screen printing and grooving, which is used for manufacturing the solar cell by twice electrode printing and comprises a grooving process and a twice printing process, wherein the grooving process comprises the step of performing grooving on an electrode grid line area on the surface of a silicon wafer so as to form an etched groove in the electrode grid line area; and the twice printing process comprises the following steps of: a, primary electrode printing, namely, filling printing electrode paste into the etched groove and performing drying to form a first layer of electrode in the etched groove; and b, secondary electrode printing, namely, printing the electrode on the outer surface of the first layer of electrode so as to form a second layer of electrode in the electrode grid line area on the surface of the silicon wafer. The solar cell manufactured by the method has relatively lower series resistance, a selective emitter and relatively higher conversion efficiency, and can reduce shading loss; and the electrode paste is difficult to spread in a sintering process.

The present invention relates to a functional device in which it is possible to improve durability by inhibiting corrosion due to an electrolyte solution, and it is possible to reduce series resistance, and also relates to a method for producing the same.

A functional device includes a transparent photoelectrode including a photoelectric substrate 11 and a photoelectrode layer 12a, a counter electrode substrate 18a composed of a metal, an electrolyte solution 15 filled in a space between the two substrates, a corrosion-resistant conductive layer 17a which is disposed on the counter electrode substrate and has corrosion resistance to the electrolyte solution, and a conductive catalyst layer 16. The counter electrode substrate is composed of any of Al, Cu, Ag, Au, and SUS; the corrosion-resistant conductive layer is composed of any of Ti, Cr, Ni, Nb, Mo, Ru, Rh, Ta, W, In, Pt, and Hastelloy; and the conductive catalyst layer is composed of any of carbon, Tu, Rh, Pd, Os, Ir, Pt, and conductive polymers.

The invention discloses a high-conductivity lead-free silver paste used for a crystalline silicon solar cell and a preparation method thereof. The high-conductivity lead-free silver paste is prepared by compounding nano silver powder and micro silver powder, wherein a silver electrode formed by performing optimized grading and sintering on the micro silver powder has extremely high conductivity. The nano-modified high-conductivity lead-free silver paste comprises the following components in percentage by weight: 8 to 9 percent of micro silver powder with the grain diameter of 2 to 4.5 mu m, 56 to 62 percent of micro silver powder with the grain diameter of 5 to 10 mu m, 5 to 10 percent of nano silver powder, 3 to 5 percent of glass cement, 3 to 5 percent of inorganic additive, and 15 to 20 percent of organic carrier, wherein the grain diameter of the nano silver powder is 20 to 70 nm; the glass cement is a bismuth-silicon-boracium mixed glass system; and the organic carrier consists of an organic solvent and an organic additive. The high-conductivity lead-free silver paste has a simple preparation process, is simple and easy to produce in large scale, and has practical significance of improving the photoelectric conversion efficiency of the crystalline silicon solar cell.

The invention discloses a polarization doping-based GaN Schottky diode, and belongs to the field of semiconductor devices. The diode comprises a semi-insulated substrate layer used for supporting the overall GaN Schottky diode, a highly doped N+ type GaN layer grown on the substrate layer, and an N- type AlxGa1-xN (x is greater than 0 and less than or equal to 1) layer which is grown in the N+ type GaN layer by adopting polarization doping; and the component Al of the N- type Al[x]Ga[1-x]N (x is greater than 0 and less than equal to 1) layer is distributed non-uniformly from the interface of the N+ type GaN layer. An ohmic contact electrode and a Schottky contact electrode are also arranged on the diode. According to the polarization doping-based GaN Schottky diode, the N- type AlxGa1-xN (x is greater than 0 and less than or equal to 1) layer is grown on the N+ type GaN layer in a polarization doping mode, so that the mobility of a GaN material is improved, the serial resistance of the Schottky diode is reduced, and the working frequency of the Schottky diode is improved; therefore, the working frequency and the output power of a frequency multiplier circuit in the range of millimeter wave and terahertz are improved. In the polarization doping mode, the capacitance variation ratio of the Schottky diode can be controlled effectively and the Q value of a device can be improved.

The present invention provides an electrically conductive paste for a front electrode of a solar cell and a preparation method thereof. The electrically conductive paste is composed of a corrosion binder, a metallic powder and an organic carrier. The corrosion binder is one or more glass-free Pb—Te based crystalline compounds having a fixed melting temperature in a range of 440° C. to 760° C. During a sintering process of the electrically conductive paste for forming an electrode, the corrosion binder is converted into a liquid for easily corroding and penetrating an antireflective insulating layer on a front side of the solar cell, so that a good ohmic contact is formed. At the same time, the electrically conductive metallic powder is wetted, and the combination of the metallic powder is promoted. As a result, a high-conductivity front electrode of a crystalline silicon solar cell is formed.

The invention discloses an electrode structure for improving a crystal silicon solar battery photoelectric transformation efficiency characterized by arranging parallely set gate lines on a light interception face of the crystal silicon solar battery substrate, and arranging at least two solder joints between each gate line and the crystal solar battery substrate light interception face, wherein the gate lines are conductive gate lines. The invention cancels split-gate lines in a background technique, uses the solder points between the metal gate lines and the crystal solar battery substrate to gather light currents of the crystal silicon solar battery light interception face and guides the currents gathered by the solder points by using the metal gate lines. Because said structure, the invention not only reduces a lightproof area of the light interception face gate line of the crystal silicon solar battery, but also reduces a series resistance of the crystal silicon solar battery, thereby improving the conversion efficiency of the crystal silicon solar battery and facilitating the interconnect of multi-block single batteries.

The invention belongs to the technical field of polymer solar cells and particularly relates to a reciprocal form electrode polymer solar cell using TiO2 as an electronic transmission layer, CuPc as a cavity transmission layer and a preparation method thereof. The method includes the steps of: using sol-gel technology to grow a layer of uniform and compact nanocrystal titanium dioxide (TiO2) film on an ITO glass substrate, then spin-coating a layer of P3HT:PCBM solution dissolved by dichlorobenzene, after annealing, using thermal evaporation to grow a layer of CuPc with certain thickness and finally evaporating Au electrode. The polymer solar cell prepared by utilizing the method solves two problems of the traditional polymer solar cell, namely that the mixed solution of 3, 4-EDOT and polystyrolsulfon acid corrode the surface of ITO glass, and the excessive thinness of cathode buffer layer LiF causes the operating process to be difficult to be controlled accurately.

The invention discloses a method for manufacturing a silicon solar cell. In the process of manufacturing a PN junction on a silicon wafer, a selective diffusion technology method is adopted, i,e. laser is utilized to heat a position, on which a positive electrode intends to be manufactured, on the surface of the silicon wafer; and under the action of heating, phosphorus in a phosphorus source uniformly adhered on the surface diffuses towards the inner of the silicon wafer, thus a heavy doping zone with smaller sheet resistance is formed at the position on which the positive electrode intends to be manufactured to effectively reduce the sheet resistance of the silicon solar cell, thereby not only being beneficial for increasing the open-circuit voltage of the silicon solar cell; the increase of the open-circuit voltage effectively improves the conversion efficiency of the silicon solar cell, reduces ohmic contact of a metal electrode and the silicon solar cell, thereby reducing the series resistance of the silicon solar cell, and being capable of meeting the purpose of industrialized production better.

A crystalline silicon solar cell capable of realizing double-side light entrance and a preparation method therefor are disclosed. The crystalline silicon solar cell comprises a metal grid line I, a transparent conductive oxide antireflection conductive layer, a doped silicon based thin film emitting electrode layer, an intrinsic silicon based thin film passivating layer, a crystal silicon wafer, a doped crystalline silicon thin film back surface field layer, a passivating antireflection layer and a metal grid line II. The preparation method comprises the steps of cleaning and texturing firstly, then preparing the doped crystalline silicon thin film back surface field layer, the passivating antireflection layer and the metal grid line II in sequence; then cleaning the surface, of the crystal silicon wafer, where the emitting electrode is positioned, then preparing the intrinsic silicon based thin film passivating layer, the doped silicon based thin film emitting electrode layer, the transparent conductive oxide antireflection conductive layer and the metal grid line I in sequence. The crystalline silicon solar cell has the advantages of capability of realizing double-side light entrance, high open-circuit voltage and good low light effect; the series resistance of the solar cell is further reduced, the consumption of valuable raw materials is reduced, and the cost is reduced; and in addition, the preparation method is suitable for large-scale production, capable of reducing the cost of the production equipment, and is expected to improve the stability and the yield of the products.

The present invention is directed to a semiconductor substrate having an electrode formed thereon, the electrode including at least silver and glass frit, the electrode including: a multi-layered structure constituted of a first electrode layer joined directly to the semiconductor substrate, and an upper electrode layer formed of at least one layer and disposed on the first electrode layer; wherein the upper electrode layer is formed by firing a conductive paste having a total silver content of 75 wt % or more and 95 wt % or less, the content of silver particles having an average particle diameter of 4 μm or greater and 8 μm or smaller with respect to the total silver content in the upper electrode layer being higher than that in the first electrode layer. As a consequence, it is possible to form the electrode, which has the high aspect ratio and hardly suffers an inconvenience such as a break, on the semiconductor substrate by a simple method.

The invention provides a conductive paste and a preparation method thereof. The conductive paste comprises aluminum powder, an inorganic binding agent, an organic carrier and metal-glass composite powder, wherein the metal-glass composite powder is of nano-particles and a core-shell structure, glass is used as a core material, and metal is used as a shell material. The conductive paste disclosed by the invention is good in storage stability and less prone to sedimentation and agglomeration, and the conductive paste is less prone to leakage from a screen during screen printing; after sintering, an aluminum film is smooth in surface and grey white, and has no aluminum vesicles or aluminum beads; and furthermore, the part in contact and superimposition with a back silver electrode, of the aluminum film is wiped by a non-dust cloth, and wiping traces and powder dropping can be avoided. The series resistance of the produced solar cell is reduced obviously, a filling factor is increased obviously, and the average photoelectric conversion efficiency of a monocrystalline silicon cell piece can be above 18.20%. Simultaneously, the conductive paste disclosed by the invention is good in construction performance, a film layer formed after sintering is compact, the sintering thickness is uniform, the bending of a silicon chip is small, the sheet resistance is small and the open circuit voltage (Voc) of the formed cell is high.

A plane nuclear magnetic resonance micro coil micro detector is disclosed that consists of plane nuclear magnetic resonance micro coil [1] and micro flow channel structure [2]. It adopts the integral design; the plane nuclear magnetic resonance micro coil [1] is processed on the surface of the polyimides substrate [3], the micro flow channel structure [2] is rectangle structure and processed on the other surface of the polyimides substrate [3], it is embedded in the inner of the polyimides substrate [3] which is under the plane nuclear magnetic resonance micro coil [1] by the polyimides slice [4]. When it is working, the plane nuclear magnetic resonance micro coil works as the radio-frequency exciter and the signal receiver at the same time, and actuates the sample to be measured to generate the NMR signal and obtain the NMR wave spectrum. The invention can fulfill the detecting requirements of lossless and real-time, the molecular structure and information of images-structure of detecting sample can be supplied. It can be used in fields of analysis detection of tiny sample, real-time dynamic monitoring of chemical reaction, and biological texture and growth status of cell.

The invention discloses an inversed organic thin-film solar cell and a manufacturing method of the inversed organic thin-film solar cell. The inversed organic thin-film solar cell structurally and sequentially comprises a substrate, a transparent electric conduction cathode ITO, a cathode buffer layer, an optical activity layer, an anode buffer layer and a metallic cathode from bottom top top. Transparent electric conduction nano-particles are added in the anode buffer layer. The manufacturing method includes the steps of forming a substrate body through the substrate and the transparent electric conduction cathode ITO, washing and drying the base plate, manufacturing the cathode buffer layer on the surface of the transparent electric conduction cathode ITO, manufacturing and baking the optical activity layer on the surface of the cathode buffer layer, manufacturing the anode buffer layer on the surface of the optical activity layer, conducting annealing on the substrate body, and plating the anode buffer layer with the metallic cathode in an evaporation mode. High conductivity and high reflectivity of the transparent electric conduction nano-particles are used, the electron transmission rate and the light reflection rate of a traditional anode buffer layer are strengthened, the absorptivity of the optical activity layer to sunlight is improved, the light current density and the carrier transmission efficiency of the organic thin-film solar cell are accordingly improved, the series resistance of the cell is reduced, and the photoelectric conversion efficiency of a device is improved.

The invention discloses a preparation method of a double-side power generation heterojunction solar cell. The method comprises that a) two sides of an N type silicon chip are textured to form pyramid suede; b) a first intrinsic amorphous silicon thin film layer and an N type amorphous silicon thin film layer are deposited at one side of the textured N type silicon chip, and a second intrinsic amorphous silicon thin film layer and a P type amorphous silicon thin film layer are deposited at the other side; c) transparent conductive thin film layers are deposited on the N type amorphous silicon thin film layer and the P type amorphous silicon thin film layer respectively; d) metal layers are deposited on the transparent conductive thin film layers at the two sides of the N type silicon chip; e) metal grid-line electrodes are formed on the metal layers at the two sides of the N type silicon chip; and f) metal layers beyond a metal-grid line electrode area are removed. According to the method, low-temperature metal makes good contact with transparent conductive films, high-molecular shielding layers in the edges of metal grid lines can be removed, the serial connection resistance of the cell can be reduced, effective absorption light of the solar cell is increased, and further, the conversion efficiency is improved.

An asymmetry thin-film transistor includes a substrate, a semiconductor layer and a gate positioned on the substrate. The semiconductor layer includes a first lightly doped region and a first heavily doped region adjacent to a first gate side, and a second lightly doped region together with a second heavily doped region adjacent to a second gate side. A first junction is between the first lightly doped region and the first heavily doped region. A second junction is between the second lightly doped region and the second heavily doped region. A distance between the first junction and the first gate side is unequal to a distance between the second junction and the second gate side.

A Lamb wave resonator includes a piezoelectric layer, and a first electrode against a first face of the piezoelectric layer. The first electrode includes fingers and a contact arm, with each finger including a first side in contact with the contact arm and two other sides parallel to one another. Portions of the piezoelectric layer are at least partially etched between the two fingers to form a recess. The fingers are spaced apart from one another by a distance W calculated according to the following equation:

where,

va_lateral is an acoustic propagation speed of Lamb waves,

• • n is an order of a resonance mode of the Lamb waves,
  • f is a resonance frequency of the Lamb wave resonator.

The invention discloses a back-contact back-junction solar battery three-dimension electrode and a manufacturing method thereof. The back-contact back-junction solar battery three-dimension electrode comprises a plurality of negative electrode grid lines printed and sintered on n+areas on the back face of a battery, a plurality of positive electrode grid lines which are printed and sintered on p+areas on the back face of the battery and are arrayed with the negative electrode grid lines in a cross finger shape and in a staggered mode, insulating printing ink printed and dried on the positive electrode grid lines and the negative electrode grid lines, and positive main grid electrodes and negative main grid electrodes printed and dried on positive electrode grid lines with insulating printing ink and the negative electrode gird lines with insulating printing ink. The positive main grid electrodes are isolated with the negative electrode grid lines through the insulating printing ink, and the negative main gride electrodes are isolated with the positive electrode grid lines through the insulating printing ink. The back-contact back-junction solar battery three-dimension electrode and the manufacturing method thereof reduce the distance of current carriers transmitted from thin grid electrodes to main grid electrodes, reduce the series resistance of the battery, and reduce electrode sedimenting difficulty and the composite speed rate in positions of the main gride electrodes.

The invention discloses a super capacitor device containing a millet-husk-based porous active carbon material. The millet-husk-based porous active carbon material is prepared by uniformly mixing dried millet husks and an activator, performing carbonization and activation with a microwave device in the protection of an inert gas, adding distilled water to obtained black powder for suction filtration washing till the pH value is 6.4-7, and performing drying to obtain black powder. The black powder is the prepared millet-husk-based porous active carbon material. The millet-husk-based porous active carbon material (an active substance) prepared through the microwave method is mixed with a binder according to a certain mass ratio, distilled water is added for mixing to prepare a thick liquid, and the thick liquid is repeatedly rolled to obtain a sheet electrode material. The electrode material is put on a current collector with the corresponding size, cold pressing is carried out at 1-40 Mpa for 10-200 s, and drying is performed at 120 DEG C to obtain an electrode plate of the super capacitor device. The electrode material in the electrode plate is more than 14 mg per square centimeter. An electrode plate, a membrane, and an electrode plate are assembled into a sandwich structure, then different electrolytes are dropwise added, so that the super capacitor device is assembled.

The invention relates to a device for manufacturing a solar cell electrode, which comprises a vision alignment mechanical hand and a rotatable positioning device, wherein the rotatable positioning device comprises a tray, an on-line printing device, a wiring device, an infrared welding device, a cooling device, a bus bar welding device and a wire shearing device; the vision alignment mechanical hand is used for putting a basic solar cell on the tray or taking the basic solar cell down from the tray; and the rotatable positioning device is used for delivering the basic solar cell on the tray to the on-line printing device, the wiring device, the infrared welding device, the cooling device, the bus bar welding device and the wire shearing device. The invention also relates to a method for manufacturing the solar cell electrode. The invention has the advantages that: due to the adoption of a method for welding a conductive grid line and a bus bar on the solar cell, the series resistance is effectively reduced under the condition that the shading area is not increased, and the photoelectric conversion efficiency of the cell is improved.

A germanium-containing layer is provided between a p-doped silicon-containing layer and a transparent conductive material layer of a photovoltaic device. The germanium-containing layer can be a p-doped silicon-germanium alloy layer or a germanium layer. The germanium-containing layer has a greater atomic concentration of germanium than the p-doped silicon-containing layer. The presence of the germanium-containing layer has the effect of reducing the series resistance and increasing the shunt resistance of the photovoltaic device, thereby increasing the fill factor and the efficiency of the photovoltaic device. In case a silicon-germanium alloy layer is employed, the closed circuit current density also increases.

The invention discloses a method for preparing a Ge photoelectric detector with a transverse p-i-n structure, and relates to the germanium photoelectric detector. The method comprises the steps of (1) carrying out epitaxial growth of a monocrystalline germanium layer on a substrate, growing a SiO2 covering layer on the monocrystalline germanium layer, (2) using a micro-electronics photolithography to etch an active area platform surface of a long and thin strip shape on the epitaxial monocrystalline germanium layer, (3) using the SiO2 covering layer on the monocrystalline germanium layer for masking, forming a doped p area and a doped n area on the two sides of the platform surface respectively through sidewise large-declination ion implantation, (4) carrying out thermal annealing after deposition of a metal Ni layer, forming NiGe contact electrodes and NiSi contact electrodes on the two sides of the platform surface and the bottom of the etched area through a self-alignment technology used in the forming process of NiGe and NiSi, and (5) leading out the device electrodes, and protecting a passivating layer. Therefore, the Ge photoelectric detector with the transverse p-i-n structure is obtained. The technology is simple, operability is high, and high application value is achieved.

The present invention generally relates to a circuit structure and a method of manufacturing a circuit, and more specifically to an electrostatic discharge (ESD) circuit with a through wafer via structure and a method of manufacture. An ESD structure includes an ESD active device and at least one through wafer via structure providing a low series resistance path for the ESD active device to a substrate. An apparatus includes an input, at least one power rail and an ESD circuit electrically connected between the input and the at least one power rail, wherein the ESD circuit comprises at least one through wafer via structure providing a low series resistance path to a substrate. A method, includes forming an ESD active device on a substrate, forming a ground plane on a backside of the substrate and forming at least one through wafer via electrically connected to a negative power supply of the ESD active device and the ground plane to provide a low series resistance path to the substrate.

This invention intends to develop a technique for forming an interlayer with excellent optical characteristics and to provide a photoelectric conversion device having high conversion efficiency. To realize this purpose, a series connection through an intermediate layer is formed in the thin-film photoelectric conversion device of the invention, and the interlayer is a transparent oxide layer in its front surface and n pairs of layers stacked therebehind (n is an integer of 1 or more), wherein each of the pair of layers is a carbon layer and a transparent oxide layer stacked in this order. Film thicknesses of each layer are optimized to improve wavelength selectivity and stress resistance while keeping the series resistance.

An embodiment of the photoelectric conversion device is characterized in that; a transparent insulating substrate is located on the light incidence side, and a transparent conductive layer, at least one photoelectric conversion unit, a transparent electrode layer having electrical conductivity as typified by zinc oxide, a hard carbon layer having electrical conductivity as typified by diamond-like carbon, and a high reflecting electrode layer are stacked in this order on an opposite surface from a light incidence side of the transparent insulating substrate.