40results about How to "Increase drift speed" patented technology

The invention discloses an inter-satellite terahertz communication system architecture which comprises a transmitter and a receiver which are arranged on a satellite platform. When a terahertz frequency range is a low frequency band smaller than 10THz, the transmitter adopts a huge-amount terahertz antenna array; when the terahertz frequency range is a high frequency band of 10THz to 30THz, the transmitter is a terahertz laser; when the terahertz frequency range is the low frequency band or the high frequency band, the receiver is a huge-amount terahertz antenna array; the huge-amount terahertz antenna array comprises 104 to 107 magnitude orders of antenna array elements; the huge-amount terahertz antenna array is made by a semiconductor process, and a plurality of antenna array elements working at different wavelengths are achieved by utilizing the same process, thereby achieving a multi-frequency MIMO (Multiple Input Multiple Output) system; and after the receiver receives a terahertz wave, information is extracted by a detection quantum device, and the same detection quantum device is driven by adopting a plurality of antenna array elements. The system architecture disclosed by the invention fuses the advantages of infrared laser communication and millimeter wave communication.

A plasma accelerating apparatus and a plasma processing system, which efficiently elevate a drift velocity of a plasma beam and are simple to manufacture and simple in construction. A channel includes an outlet port opening at an end of the channel. A gas supply portion supplies a gas in the channel. A plasma generator provides ionization energy to the gas in the channel to generate a plasma beam. A plasma accelerating portion includes a plurality of grids transversely arranged spaced apart from each other by a predetermined distance in the channel for accelerating the plasma beam generated by the plasma generator to the outlet port of the channel with an electric field. The plasma accelerating apparatus and the plasma processing system elevate a drift velocity of the plasma beam more efficiently than conventional accelerating apparatuses that use an electromagnetic force induced by a magnetic field and a secondary current.

The invention discloses a boron film cathode of a neutron detector and a preparing method of the boron film cathode of the neutron detector. The boron film cathode of the neutron detector is detector cathode with good electrical properties and neutron sensitive performance. Conductive metal Al matrix is adopted for the cathode, and the surface of the cathode is coated with a neutron sensitive film. The neutron sensitive film comprises, by mass, 100 parts of boron powder, 15 parts to 25 parts of substance (the molecular formula of the substance is described in the instruction), 7 parts to 12 parts of curing agents and 30 parts to 40 parts of organic solvent. The boron film cathode of the neutron detector is simple in preparation, low in cost, high in adhesive force and good in uniformity, and the obtained detector is high in detection efficiency.

The invention relates to a gallium nitride based high electron mobility transistor with a composite metal gate. The gallium nitride based high electron mobility transistor comprises a substrate, a gallium nitride buffer layer, an aluminum nitride inserting layer, an aluminum-indium-gallium-nitrogen barrier layer, and a source electrode, a drain electrode and a grid electrode on the aluminum-indium-gallium-nitrogen barrier layer, wherein the source electrode and the drain electrode form ohmic contact with the aluminum-indium-gallium-nitrogen barrier layer; the grid electrode and the aluminum-indium-gallium-nitrogen barrier layer form Schottky contact; the grid electrode on the aluminum-indium-gallium-nitrogen barrier layer is formed by connecting more than two metals with different work functions. Through the utilization of the influence of a step barrier shielding drain potential formed between the grid metals with different work functions on device channels, the Drain Induced Barrier Lowering (DIBL) effect is inhibited, and the SCEs (Short Channel Effects) of deep submicron gallium nitride based high electron mobility transistor are improved, thus the current gain cut-off frequency fT is improved.

The present invention discloses a crystalline silicon solar cell having a doped silicon carbide layer and a manufacturing method thereof. The solar cell comprises: a semiconductor substrate having a roughened first surface; a doped silicon carbide layer arranged at the first surface and comprising a doping element; an anti-reflecting layer; a plurality of front electrodes arranged on the anti-reflecting layer and penetrating the anti-reflecting layer; and a back electrode layer arranged at a second surface of the semiconductor substrate. As the doped silicon carbide layer has doping reversed to the doping type of the semiconductor substrate and a silicon carbide element, the doped silicon carbide layer has the characteristics of low resistance and wide energy gap, so that the doped silicon carbide layer can be used as an emitter of the solar cell, in addition, the doped silicon carbide layer has low absorption for sunlight, so that quantity of light entering the semiconductor substrate can be increased, thereby improving photoelectric conversion rate of the solar cell.

A child drift car comprises a car frame, a wheel assembly, a seat, a driving mechanism and a direction control mechanism; the wheel assembly comprises a driving wheel assembly, and the driving wheel assembly comprises driving wheels, and an axle fixedly connected to the driving wheels; the driving mechanism comprises a driver and a transmission device; the direction control mechanism comprises a steering column, a steering wheel fixedly connected to the steering column, and a steering device separately connected to the steering column and the driving wheel assembly; the driving mechanism further comprises a main shaft rotatably disposed on the car frame along its own axis and driven by the transmission device to rotate, and the main shaft is connected to the axle through a universal joint. When the driving wheels turn, the speed of the driving wheels is not affected, and a higher drifting speed can be achieved.

The invention provides an MOSFET device and a preparation method thereof. The MOSFET device comprises a substrate; a first n-type semiconductor layer, a p-type semiconductor layer and a second n-typesemiconductor layer are sequentially stacked on the substrate; the p-type semiconductor layer comprises a first p-type doped region and a second p-type doped region; the first p-type doped region is located on the two sides of the second p-type doped region, and the doping concentration of the second p-type doped region is higher than that of the first p-type doped region; the MOSFET device further comprises a source electrode which is arranged on the side, deviating from the p-type semiconductor layer, of the second n-type semiconductor layer and makes contact with the second n-type semiconductor layer and the second p-type doped region, a gate insulating layer and a gate; the gate insulating layer and the gate are sequentially stacked on the exposed surfaces of the second n-type semiconductor layer, the p-type semiconductor layer and the first n-type semiconductor layer; the MOSFET device further comprises a drain electrode which is arranged on one side, deviating from the first n-type semiconductor layer, of the substrate. A step-doped p region is formed on the p-type semiconductor layer, so that the breakdown voltage of the device is improved. The process is simple, and preparation is convenient.

The invention discloses an indium nitride channel layer gallium nitride-based high-electron-mobility transistor structure. The structure comprises a substrate, a nucleating layer, a buffer layer, an indium nitride channel layer, an aluminum nitride channel layer, an aluminum nitride insertion layer, a barrier layer and a gallium nitride cap layer, wherein the nucleating layer is manufactured on the substrate; the thickness of the nucleating layer is 0.01-0.60 mum; the buffer layer is manufactured on the nucleating layer; the indium nitride channel layer is manufactured on the buffer layer and has the thickness of 0.6-5 nm; the aluminum nitride insertion layer is manufactured on the indium nitride channel layer and has the thickness of 0.7-5 nm; the barrier layer is manufactured on the aluminum nitride insertion layer; the gallium nitride cap layer is manufactured on the barrier layer and has the thickness of 1-5 nm. By introducing the indium nitride channel layer, a back barrier for limiting channel electrons is formed, so the two-dimensional electron gas limiting capacity is improved, the grid control capacity is improved, the electric leakage of the buffer layer is reduced, and a short channel effect of the device is inhibited.

The invention discloses an amorphous silicon film solar cell film system, which comprises a double-junction layer p-i-n/p-i-n formed by superposing a first amorphous p-i-n junction and a second amorphous p-i-n junction, wherein a p-type amorphous silicon layer of the second amorphous p-i-n junction is arranged on an n-type amorphous silicon layer of the first amorphous p-i-n junction, a p-type amorphous silicon layer of the first amorphous p-i-n junction is provided with a heavily-doped P+layer, an n-type amorphous silicon layer of the second amorphous p-i-n junction is provided with a heavily-doped N+layer, and the film structure has a structure of P+/p-i-n/p-i-n/N+. The heavily-doped P+layer and N+layer have the effect of reducing compounding and retaining properties of charged body, and simultaneously increase shift velocity of electric holes and electrons in semiconductor due to the reduction of twisting degree of an electric field in an i layer. The amorphous silicon film solar cell film system according to the invention has high photoelectric conversion rate and low cost, and the film solar cell manufactured according to the invention has the photoelectric conversion rate up to 7.5%.

The invention discloses a transverse-structure IMPATT diode and a preparation method of the IMPATT diode. The IMPATT diode includes: a substrate layer, an epitaxial layer, a drift layer, an n-AlGaN barrier layer, an n+-GaN barrier layer, a left ohmic contact layer, a right ohmic contact layer, a left ohmic contact electrode, a right ohmic contact electrode, a passivation layer and a Schottky contact electrode. When the transverse-structure IMPATT diode is electrified, the current direction is along the transverse direction of the epitaxial layer; the drift layer is a two-dimensional electrongas thin layer formed on the top of the epitaxial layer, and the transition process is limited in the drift layer rather than in a body material. The IMPATT provided by the invention improves the oscillation frequency, the transverse circuit compatibility and the frequency flexibility compared with a traditional vertical-structure IMPATT by utilizing a transverse structure under the same material.

The invention provides an extra-high-voltage silicon carbide converter valve cooling system. The extra-high-voltage silicon carbide converter valve comprises a silicon carbide double valve formed by asilicon carbide converter valve; the cooling system comprises a primary cooling system and a secondary cooling system; the primary cooling system comprises a condenser and a heat exchanger assembly provided by the condenser; and the secondary cooling system comprises a secondary cooling medium outlet pipe, a secondary cooling apparatus, and a heat exchanger and a circulating pump which are provided by the secondary cooling apparatus, and a secondary cooling medium return pipe. The cooling system provided by the invention is high in voltage resistance, simple in structure, high in operationalreliability, low in cost, high in cooling efficiency, high in environment adaptivity, safe in equipment operation, convenient to maintain and high in economic efficiency; the phase changing cooling medium circulation power is provided by heat loss of components, such as a silicon carbide transistor, a damping resistor and the like, so that external power is not needed; and the whole system forms an independent self circulation system and is convenient to maintain.

An apparatus and method for measuring low or trace concentrations of compounds and mixture of gases. A method and apparatus of the invention permits separating ions of different mobilities by passing them through an abrupt change or step in electric field magnitude. By using the separation method, the compounds of interest may be measured with less interference from other compounds of the gas mixture, which reduces or eliminates the need for prior separation of the components of the gas mixture. Several embodiments of the invention are described including the use of current amplifiers on one, or more, parts of the apparatus. While a single screen can provide a chamber which is divided into two regions of different electric fields, it is within the scope of the invention to include multiple screens to provide several steps in the electric field permitting it to be possible to trap and measure ions with successively higher mobilities. The gases used include halogenated compounds, including fluorocarbons, and most preferable SF₆.

A hetero junction bipolar transistor (HBT) has a (In)(Al)GaAsSb/InGaAs base-collector structure. A discontinuous base-collector conduction band forms a built-in electric field to infuse electrons into a collector structure effectively, while a discontinuous base-collector valence band prevents holes from spreading into the collector structure at the same time. Thus, a current density is increased. In addition, the small offset voltage of the base-emitter and base-collector junctions reduce a power consumption.

The invention discloses a semiconductor field effect transistor and a preparation method thereof. The semiconductor field effect transistor comprises a substrate, a drain electrode, n<+> type SiC, n<-> type SiC, P<-> type SiC and n<+> type SiC, wherein the n<+> type SiC, the n<-> type SiC, the P<-> type SiC and the n<+> type SiC are sequentially and vertically arranged on the substrate in a direction far away from the substrate direction; the transistor is provided with an inverted trapezoidal groove deposited with a Si<x>N<y>-SiO2 double-layer structure; a grid electrode and a source electrode contact electrode are also arranged on the transistor. The transistor is prepared from semiconductor materials SiC; compared with the existing Si and GaAs conductor materials, the semiconductor material SiC has the characteristics of low conduction resistance, high breakdown field strength and high aturation electron drift velocity; the prepared semiconductor field effect transistor has the characteristics of low switching loss, great breakdown voltage and high electron drift velocity; meanwhile, the transistor changes a traditional transverse device structure and uses a vertical device structure; the problem of poor heat radiation of a traditional semiconductor field effect transistor is avoided.

This invention provides a nanofiber, including: a core, which extends along the axis of the nanofiber, and its main component includes Ag(NH₃)₂⁺ or AgNO₃; a shell, which extends along the nanofiber and coats the core of the nanofiber, and its main component of the shell structure includes: PVP, TBAP, SDS, grapheme, PMAA or PFBT nanoparticle. Moreover, the invention also provides a photovoltaic device which comprises the patterned nanofibers.

The invention provides a double-doped resonant cavity uni-traveling carrier photodiode. A device is simultaneously processed in an absorption layer and a collection layer. Linear gradient doping is carried out on the absorption layer, so that the forbidden band width of the absorption layer is linearly changed; or stepped distribution is realized on doped material components of the absorption layer, so that the forbidden band width of the absorption layer is gradiently changed, the built-in electric field intensity of the absorption layer is improved, the electron drift time is shortened, andthe device responsivity is improved. An oxidation process is adopted in the collection layer to obtain a partial oxide insulating layer structure of the collection layer, and due to the low refractiveindex characteristic, the parasitic capacitance of the device is reduced, and the response speed of the device is improved. Besides, a first reflector and a second reflector are introduced to the exterior of the integrated device to form a resonant cavity structure, so that the amplitude of incident signal light in a high-Q-value resonant cavity inner field is enhanced, and the quantum efficiencyof the device is improved.

The present invention relates to a method and device for interconnecting radio frequency power SiC field effect transistors. To improve the parasitic source inductance advantage is taken of the small size of the transistors, wherein the bonding pads are placed on both sides of the die in such a way that most of the source bonding wires (6) go perpendicularly to the gate and drain bonding wires (7, 8). Multiple bonding wires can be connected to the source bonding pads, reducing the source inductance. An additional advantage comes from such arrangement by reducing the mutual inductance between source/gate and between source/drain due to the orthogonal wire placement.