7 results about "Indium nitride" patented technology

An electronic device includes an one of aluminum gallium nitride, aluminum nitride, indium aluminum nitride, or indium aluminum gallium nitride back barrier layer over a buffer structure, a gallium nitride layer over the back barrier layer, a hetero-epitaxy structure over the gallium nitride layer, first and second transistors over the hetero-epitaxy structure, and a hole injector having a doped gallium nitride structure over the hetero-epitaxy structure and a conductive structure partially over the doped gallium nitride structure to inject holes to form a hole layer proximate an interface of the back barrier layer and the buffer structure to mitigate vertical electric field back gating effects for the first transistor.

The present invention provides a semiconductor structure comprising: a silicon substrate in [100] orientation; a scandium oxide layer over the substrate, in [111] orientation; and a scandium-rare earth-oxide layer over the scandium oxide layer. The scandium-rare earth-oxide layer can have a graded composition to transition lattice constant to match to a subsequent layer, such as an indium nitride layer having very high electron drift velocity. InN over Si (100) offers transistors, photonics and passive electronics that operate in the terahertz frequency range.

To provide a gallium nitride (GaN) high electron mobility transistor with improved component current and output power.SOLUTION: The high electron mobility transistor 100 includes a substrate 1, a barrier layer 2, a semiconductor layer 3, an insertion layer 4, a passivation layer 5, a drain electrode 61, a source electrode 62, and a gate electrode 63. The barrier layer 2 is disposed on the substrate 1 and includes aluminum gallium indium nitride. The semiconductor layer 3 is disposed between the substrate 1 and the barrier layer 2. The insertion layer 4 is disposed between the semiconductor layer 3 and the barrier layer 2 and contains aluminum gallium nitride. The thickness of the barrier layer may range from 3nm to 40nm. The passivation layer 5 is arranged on the barrier layer 2 and comprises silicon nitride. The drain electrode 61 and the source electrode 62 are disposed on the barrier layer 2, and the gate electrode 63 is disposed on the passivation layer 5.SELECTED DRAWING: Figure 1

The semiconductor structure (1) comprises a substrate (100) and an epitaxial III-N semiconductor layer stack (200) overlying the substrate (100). The epitaxial III-N semiconductor layer stack (200) comprises a first active III-N layer (201), a spacer layer (202) overlying the first active III-N layer (201), a diffusion barrier layer (203) overlying the spacer layer (202), and a second active III-N layer (204) overlying the diffusion barrier layer (203) and comprising indium aluminum nitride. A two-dimensional electron gas (20) is located between the first active III-N layer (201) and the second active III-N layer (204). The diffusion barrier layer (203) comprises gallium nitride, and the thickness of the diffusion barrier layer (203) is less than 1 nm.

On the basis of a self-supporting substrate for epitaxial crystal growth containing a Group 13 element nitride crystal selected from gallium nitride, aluminum nitride, indium nitride, or a mixed crystal thereof, cracking of the self-supporting substrate or the epitaxial crystal in a process of growing the epitaxial crystal is prevented. A self-supporting substrate for epitaxial crystal growth (21) containing a Group 13 element nitride crystal selected from gallium nitride, aluminum nitride, indium nitride, or a mixed crystal thereof has a nitrogen-polarity face (21a) and a Group 13 element-polarity face (21b). The nitrogen-polarity face (21a) is convexly curved, and a chamfered portion (21c) is provided at an outer peripheral portion (22) of the nitrogen-polarity face (21a).

A high electron mobility transistor includes a substrate, a barrier layer, a semiconductor layer and an insertion layer. The barrier layer is disposed on the substrate and includes aluminum gallium indium nitride. The semiconductor layer is disposed between the substrate and the barrier layer. The insertion layer is disposed between the semiconductor layer and the barrier layer, and includes aluminum gallium nitride.

A free-standing substrate, for growing epitaxial crystal composed of a group 13 nitride crystal selected from gallium nitride, aluminum nitride, indium nitride or a mixed crystal thereof, includes a nitrogen polar surface and group 13 element polar surface. The nitrogen polar surface is warped in a convex shape, and a chamfer part is provided in an outer peripheral part of the nitrogen polar surface.