140results about How to "Lower on-state resistance" patented technology

It is an object of the present invention to make it possible to decrease the on-state resistance of a selection transistor of a memory cell without increasing the whole area of a memory cell array and accelerate and stabilize the reading operation of data stored in the memory cell. Therefore, a plurality of variable resistive elements capable of storing information in accordance with a change of electrical resistances is included, one ends of the variable resistive elements are connected each other, and an electrode of a selection element constituted by a MOSFET or diode element for selecting the variable resistive elements in common is connected with one end of each of the variable resistive elements to constitute a memory cell.

An MOS device includes a semiconductor layer of a first conductivity type and first and second source / drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer. The first and second source / drain regions are spaced apart relative to one another. A gate is formed above and electrically isolated from the semiconductor layer, at least partially between the first and second source / drain regions. At least a given one of the first and second source / drain regions is configured having an effective width that is substantially greater than a width of a junction between the semiconductor layer and the given source / drain region.

A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate layer disposed on a surface of the first semiconductor layer; a first channel layer adjacent to the first gate layer on the substrate; a first source layer connecting to the first channel layer electrically; a second gate layer adjacent to the first channel layer to sandwich the first channel layer; a second channel layer adjacent to the second gate layer to sandwich the second gate layer; a third gate layer adjacent to the second channel layer to sandwich the second channel layer; and a second source layer connecting to the second channel layer electrically.

The present invention provides a semiconductor device capable of reducing on-resistance of an MOSFET and suppressing leakage current of a Schottky barrier diode. The semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type, provided on the first semiconductor layer; a third semiconductor layer of the first conductivity type, provided on the second semiconductor layer; an embedded electrode provided in a first trench via a first insulating film; a control electrode provided above the embedded electrode via a second insulating film in the first trench; a fourth semiconductor layer of the second conductivity type, selectively provided in the first semiconductor layer and connected to a lower end of a second trench; a first main electrode electrically connected to the first semiconductor layer; and a second main electrode provided in the second trench and connected to the second semiconductor layer, the third semiconductor layer and the fourth semiconductor layer. The embedded electrode is electrically connected to one of the second main electrode and the control electrode. A Schottky junction formed of the second main electrode and the first semiconductor layer is formed at a sidewall of the second trench.

Provided is an MRAM memory cell structure capable of preventing generation of parasitic transistors. Diodes are adopted as switching elements of an MRAM memory cell. An n-type semiconductor layer and a p-type semiconductor layer, which collectively constitute a diode, are formed on a surface semiconductor layer of an SOI substrate. The n-type semiconductor layer and the p-type semiconductor layer are disposed in a lateral direction and isolated by an isolation region, whereby the diode is isolated electrically from other elements and from the substrate.