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291 results about "Sapphire substrate" patented technology

Sapphire substrate automatic defect detection and classification method based on visual detection

The invention discloses a sapphire substrate automatic defect detection and classification method based on visual inspection, and relates to the technical field of visual inspection and image processing, and the method comprises the steps: carrying out the adaptive threshold segmentation and phase consistency detection of a multi-modal image data set, and carrying out the fusion, and obtaining a joint defect probability graph; extracting defect candidate areas from the joint defect probability graph, and generating unified feature representation; inputting the unified feature representation into a double-branch neural network, performing fusion and classification through a cross attention mechanism, outputting a defect classification result, performing reconstruction by using a NeRF algorithm, outputting a defect three-dimensional shape, and generating a three-dimensional shape map; and generating a defect thermodynamic diagram based on the three-dimensional morphology map, performing space-time correlation analysis in combination with equipment process parameters, and outputting a sapphire substrate defect process analysis report. According to the method, the image contrast and the defect characterization capability are improved, so that the comprehensiveness and the sensitivity of detection are remarkably enhanced.
Owner:QINGDAO JIAXING HIGH-TECH DEVELOPMENT CO LTD

Micro LED transfer method and naked eye 3D display panel

The invention relates to a micro LED transfer method and a naked eye 3D display panel, and relates to the technical field of semiconductor display. According to the transfer method of the micro LED, a first magnetic region is formed in a sapphire substrate of each micro LED unit, and a second magnetic region is formed at the bottom of each groove, so that the micro LED units can be adsorbed in a transfer substrate; the first electrode comprises a first metal layer, a second magnetic metal layer and a third metal layer, and a third magnetic metal layer is arranged below each pixel electrode, so that when the micro LED units on the transfer substrate are transferred to the driving substrate, the first electrode and the third magnetic metal layers have a magnetic attraction effect, and the micro LED units on the transfer substrate can be transferred to the driving substrate; therefore, the transfer accuracy of the micro LED unit is greatly improved, and the transfer yield of the micro LED unit is greatly improved.
Owner:LOHUA CHIP-DISPLAY TECHNOLOGY DEVELOPMENT (JIANGSU) CO LTD

Deep ultraviolet LED epitaxial structure, deep ultraviolet LED device comprising same and preparation method of deep ultraviolet LED epitaxial structure

The invention discloses a deep ultraviolet LED epitaxial structure, a deep ultraviolet LED device comprising the same and a preparation method, and the epitaxial structure sequentially comprises a sapphire substrate, an AlN nanowire array layer, an AlN intrinsic layer and an AlGaN light-emitting structure layer from bottom to top. The AlGaN light-emitting structure layer further comprises an n-type AlGaN electron injection layer, a quantum well active layer, a p-type AlGaN electron blocking layer and other device structures. According to the invention, the vertically arranged AlN nanowire array is introduced to replace a traditional AlN buffer layer, so that lattice mismatching stress caused by a substrate is significantly released, and the dislocation density of an epitaxial layer is effectively reduced; meanwhile, the introduction of the AlN intrinsic layer further flattens the epitaxial interface and optimizes the lattice quality, thereby providing a high-quality template for the growth of a high-performance AlGaN material. The epitaxial structure is suitable for an LED device in a deep ultraviolet band, and the crystal quality, the electrical property and the luminous efficiency of the device can be improved.
Owner:WUHAN TEXTILE UNIV

Adjustable machining grinding equipment

The invention discloses adjustable machining grinding equipment, and relates to the technical field of machining. According to the equipment, a multi-dimensional adjusting mechanism is innovatively integrated, a sliding block is driven through a rotatable double-thread lead screw, stepless adjustment of the grinding radius is achieved, and the equipment is suitable for machining of the inner diameters of workpieces of different sizes; and in combination with a dynamic balance weight system, vibration in high-speed grinding is effectively inhibited, and the stability is improved. Meanwhile, a pneumatic-servo cooperative control system is adopted, stepless switching of the grinding pressure in the four stages of light pressure, medium pressure, heavy pressure and fine grinding is supported, the revolution-rotation speed ratio of the grinding disc to the workpiece is synchronously regulated and controlled, and the uniformity of the grinding track is optimized. In addition, the equipment is provided with a PLC program control module and a touch screen interface, 30 sets of technological parameters can be preset and stored, one-key calling is achieved, and the machining efficiency and consistency of complex parts are remarkably improved. According to the design, the adaptability of the equipment to sapphire substrates, gears and hard alloy special-shaped high-hardness workpieces is greatly expanded.
Owner:NINGBO UNIV

Batch preparation method and application of single crystal boron nitride wafer based on copper-nickel single crystal film

The invention discloses a single crystal boron nitride wafer batch preparation method based on a copper-nickel single crystal film and application, and belongs to the technical field of two-dimensional material preparation and nano electronic device manufacturing. The method comprises the following steps: forming a Cu80Ni20 (111) single crystal film on a c-plane sapphire substrate through magnetron sputtering and high-temperature annealing to serve as a growth substrate; carrying out thermal conversion treatment on the ammonia borane precursor to form a supply source system capable of stably releasing a borazine gas phase precursor; a porous structure quartz sleeve is adopted to regulate and control the release behavior of a precursor, and multi-wafer airflow homogenization control is realized in a CVD system through a quartz staggered wafer carrier; and carrying out epitaxial growth, and synchronously preparing more than 10 single crystal boron nitride wafers which are consistent in crystal orientation, smooth in surface and free of crystal boundaries in a single batch. According to the method, efficient, uniform and repeatable batch preparation of the high-quality monocrystal h-BN is realized, and the obtained wafer has atomic-scale flatness and excellent insulating property and is suitable for high-performance two-dimensional electronic devices, deep ultraviolet photoelectric devices and quantum device platforms.
Owner:PEKING UNIV

Method for preparing high-crystal-quality beta-Ga2O3 heteroepitaxial film on sapphire substrate

The invention provides a method for preparing a beta-Ga2O3 heteroepitaxial thin film with high crystal quality on a sapphire substrate, which comprises the following steps of: selecting a sapphire single crystal wafer as a substrate, cleaning the sapphire single crystal wafer, and putting the cleaned sapphire single crystal wafer into metal organic chemical vapor deposition equipment; with trimethyl gallium or triethyl gallium as a gallium source and oxygen as an oxygen source, growing a beta-Ga2O3 thin layer with the thickness of less than 10 nm; hydrogen is introduced, and the defect bond of the beta-Ga2O3 thin film is etched; the temperature of the substrate is increased to 1000 DEG C or above, oxygen is introduced, annealing is carried out, the defects are further bridged, and oxygen vacancies are reduced; and reducing the temperature of the substrate to the growth temperature, repeating the steps 2-4, and gradually accumulating the thickness to reach an expected value. According to the method, layer-by-layer growth and in-situ defect repair are combined, and the ultra-wide forbidden band beta-Ga2O3 heteroepitaxial crystal film with extremely low defect density and ultra-high quality is successfully prepared.
Owner:DALIAN UNIV OF TECH

Multistage junction termination structure of vertical GaN diode

The utility model belongs to the field of semiconductors, and discloses a multistage junction termination structure of a vertical GaN diode. The multistage junction termination structure comprises a sapphire substrate on which a GaN nodule layer grows; a silicon-doped n +-GaN layer is grown on the GaN nodule layer, a silicon-doped n-GaN layer is grown on the n +-GaN layer, a magnesium-doped p-GaN layer is grown on the n-GaN layer, and a magnesium-doped p +-GaN layer is grown on the p-GaN layer; etching from the p < + >-GaN layer to the n < + >-GaN layer, and preparing a negative electrode on the surface of the n < + >-GaN layer; etching from the p +-GaN layer to the p-GaN layer to form a continuous multi-stage step, and preparing a positive electrode on the surface of the p +-GaN layer; according to the utility model, after the multi-stage step junction termination structure is introduced, the electric field aggregation phenomenon is obviously relieved, which indicates that the junction termination structure effectively reduces the internal electric field peak value.
Owner:SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY

Method for preferentially growing epsilon-phase gallium oxide epitaxial film through oxygen flow regulation and control

The invention belongs to the field of semiconductor materials, and discloses a method for preferentially growing an epsilon-phase gallium oxide epitaxial film through oxygen flow regulation and control. The preparation method comprises the following steps: cleaning a sapphire substrate, and putting the sapphire substrate into a cavity of a metal organic chemical vapor deposition system; setting air pressure in the reaction cavity, introducing carrier gas, raising the temperature to a first preset temperature, introducing first preset high-flow oxygen, and entering a substrate high-oxygen preheating stage; raising the temperature to a second preset temperature, opening the gallium source, introducing second preset low-flow oxygen, and entering an epitaxial low-oxygen growth stage; closing the gallium source, introducing third preset high-flow oxygen, and entering an in-situ high-oxygen annealing stage; and after annealing is finished, recovering normal pressure, cooling to room temperature, and taking out to obtain the epsilon-phase gallium oxide epitaxial film. The pure phase property and the crystal quality of the epsilon-phase gallium oxide epitaxial film are improved in an oxygen flow regulation and control mode, and a way is laid for subsequent preparation of electronic and power devices.
Owner:NANJING UNIV OF POSTS & TELECOMM

Full-color Nano-LED array

The invention provides a full-color Nano-LED (Light Emitting Diode) array. The full-color Nano-LED array comprises a sapphire substrate; sequentially superposing an N-type gallium nitride layer and a dielectric layer on the sapphire substrate; nanowires, wherein each nanowire is grown on a nanometer circular hole reserved in the dielectric layer; the transparent electric insulation layer is filled among the plurality of nanowires; p electrodes, wherein each P electrode is correspondingly arranged on each nanowire; the first scanning lines are arranged on the multiple P electrodes in the first direction, the number of the first scanning lines is multiple, and the multiple first scanning lines are arranged in parallel in the second direction; the N electrodes are arranged on the lower surface of the sapphire substrate, and the position of each N electrode corresponds to the position of each nanowire; the second scanning lines are arranged on the lower surfaces of the N electrodes in the second direction, the number of the second scanning lines is multiple, and the second scanning lines are arranged in parallel in the first direction. According to the array, an alternating current driving mode is adopted, and accurate regulation and control of submicron pixels are achieved.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Method for epitaxially growing Ga2O3 single crystal film on sapphire substrate and epitaxial structure

The invention provides a method for epitaxial growth of a Ga2O3 single crystal film on a sapphire substrate and an epitaxial structure. The method for epitaxial growth of the Ga2O3 single crystal film on the sapphire substrate comprises the following steps: S1, carrying out Al ion implantation treatment on the surface of the sapphire substrate; s2, performing temperature gradient in-situ oxidation treatment on the surface of the sapphire substrate to form an Al2O3 composite buffer layer; s3, carrying out etching treatment on the surface of the Al2O3 composite buffer layer by adopting etching gas; and S4, epitaxially growing a Ga2O3 single crystal film on the etched surface of the Al2O3 composite buffer layer to obtain an epitaxial structure. According to the invention, the quality of the epitaxial Ga2O3 single crystal film can be effectively improved, and the growth of a large-area continuous film can be realized.
Owner:HUBEI JIUFENGSHAN LAB

Silicon carbide semiconductor structure and manufacturing method therefor, and manufacturing method for semiconductor working device using silicon carbide semiconductor structure

PCT designated stageWO2025248349A1Semiconductor structureSingle crystal
A silicon carbide semiconductor structure. A III-V base layer and a support substrate can be used as a basic growth interface for a silicon carbide epitaxial layer or a doped silicon carbide epitaxial layer growing into a perfect single crystal. The support substrate may be, for example, a sapphire substrate, an aluminum nitride substrate, or a silicon carbide substrate. If the support substrate is an aluminum nitride substrate, the silicon carbide epitaxial layer or the doped silicon carbide epitaxial layer may directly grow. The III-V base layer is made of one of an aluminum nitride (AlN) material, a gallium nitride (GaN) material, and an AlN / GaN mixed material. The silicon carbide epitaxial layer or the doped silicon carbide epitaxial layer is formed on the III-V base layer by means of an epitaxial process. The III-V base layer is formed on the support substrate. After a semi-finished semiconductor working device is formed using the silicon carbide semiconductor structure, the support substrate and the III-V base layer can be stripped by means of various scientific processes.
Owner:RAYNEXT SEMICON CO LTD

Patterned composite substrate and LED chip

ActiveCN223943112UComposite substratePhysics
The utility model discloses a patterned composite substrate and an LED chip. The patterned composite substrate comprises a patterned base layer and a composite layer arranged on the patterned base layer. The graphical base layer comprises a sapphire substrate and a plurality of sunken structures arranged on the surface of the sapphire substrate, and the sunken structures are in a non-penetrating state on the sapphire substrate; the composite layer comprises a first SiO2 layer and a second SiO2 layer, the first SiO2 layer and the second SiO2 layer are periodically and alternately arranged, the first SiO2 layer is arranged on the surface of the sapphire substrate, the concave structure is filled with the second SiO2 layer, and the first SiO2 layer is connected with the second SiO2 layer. By implementing the LED epitaxial wafer, the reflection of light can be increased, the luminous efficiency of the LED epitaxial wafer can be improved, the working temperature of the chip can be reduced, and the reliability and the stability of the device can be improved.
Owner:JIANGXI ZHAOCHI INTEGRATED TECHNOLOGY CO LTD +1

A feedback control method for material removal rate in polishing of sapphire substrate

PendingCN122323038AMaterial removalPolishing
This application discloses a feedback control method for the material removal rate during sapphire substrate polishing, relating to the field of precision machining control technology. The method pre-establishes a tool head wear compensation model and a mapping model between the material removal rate and process parameters, generating a priority list of adjustment variables based on the sensitivity coefficients of each process parameter. During polishing, the measured material removal rate is obtained after detecting spacing changes using a non-contact displacement sensor array and compensating for tool head wear. The deviation between this rate and the target value is calculated cyclically according to the sampling period. Parameter adjustments are implemented using an incremental control law based on the priority list of adjustment variables. When the adjustment variable reaches its range boundary, the process automatically switches to the next level of process parameters. Simultaneously, the thickness of the removed material is accumulated, and polishing stops when the target value is reached. This application overcomes rate drift caused by polishing slurry degradation, tool head wear, and environmental disturbances, significantly improving the batch-to-batch thickness consistency and removal accuracy of sapphire substrates.
Owner:嘉兴南湖学院

Large-area hexagonal boron nitride heteroepitaxial film on sapphire substrate and preparation method thereof

The application belongs to the technical field of semiconductor material science and technology, and particularly relates to a large-area hexagonal boron nitride heteroepitaxial film on a sapphire substrate and a preparation method thereof. The technical scheme provides a large-area hexagonal boron nitride epitaxial film directly grown on a sapphire substrate. The preparation method adopts an ion beam assisted sputtering method. In the growth process, the main and auxiliary ion sources give high-energy ion sputtering respectively, so that high-energy B / N atoms cross the energy barrier of the preferred orientation between the B / N atoms and the substrate surface, form covalent bonding with the substrate surface, induce the hexagonal grid plane of the hexagonal boron nitride to extend vertically to the substrate surface, and thus obtain a large-area vertically-oriented hexagonal boron nitride epitaxial film. Compared with the common Van der Waals epitaxial growth method, the epitaxial method can effectively release stress, so that the bonding force between the hexagonal boron nitride film and the substrate surface is stronger, and the stability is better, and the hexagonal boron nitride film is suitable for being used as a template, a transition layer, a heat dissipation layer and the like of optoelectronic devices and electronic devices.
Owner:JILIN UNIVERSITY

Sapphire substrate grinding device

The utility model discloses a sapphire substrate grinding device in the technical field of grinding devices, which comprises a grinding device main body, a fixed column is fixed on the side surface of the grinding device main body, a movable rod is connected in the fixed column in a sliding manner, and one end of the movable rod far away from the fixed column is connected with a connecting sleeve rod in a sliding manner; a fixed column is fixed to one side of a grinding device body, one end of a movable rod is slidably connected into the fixed column, then the fixed column and the movable rod are fixed through a fixing bolt, meanwhile, a connecting sleeve rod is arranged at the other end of the movable rod, and the angle of a clamping frame is controlled through the connecting sleeve rod; and meanwhile, a first fixing rod and a second fixing rod which are arranged in a connecting sleeve rod are used for clamping a plurality of sapphires, and the problems that in the background technology, existing sapphire substrates are manually ground one by one, and when the number of the sapphires is large, time is wasted due to the fact that the sapphires are independently ground one by one are solved.
Owner:LI LI IND INTELLIGENT TECH (SUZHOU) CO LTD

Gallium oxide thin film double-array device group for flame detection and identification and preparation method and application thereof

The invention discloses a gallium oxide film double-array device group for flame detection and identification and a preparation method and application thereof, and belongs to the technical field of semiconductor photoelectric devices and flame monitoring. The device group comprises two arrays which are complementary in function and independent in structure: a Ga2O3 ultraviolet detector array which is grown based on a high-temperature annealing sapphire substrate and is consistent in orientation and is used for performing high-signal-to-noise-ratio rapid detection on flame solar-blind ultraviolet radiation; and the non-oriented Ga2O3 photoelectric synapse array is deposited on the unannealed substrate, and learning and classification identification of flame spatio-temporal characteristics are realized by utilizing plasticity caused by defect capture of the non-oriented Ga2O3 photoelectric synapse array. In the preparation process, the orientation-controlled Ga2O3 active layer and the non-orientation Ga2O3 active layer are respectively obtained by controlling whether the sapphire substrate is subjected to high-temperature annealing treatment or not. The two arrays can form a solution integrating detection and identification. The scheme is simple in structure, low in power consumption, easy to expand and suitable for industrial security and protection, combustion monitoring, forest fire early warning and other scenes.
Owner:XIDIAN UNIV

Deep ultraviolet Micro-LED chip and preparation method thereof

PendingCN120769627AElectron holeOhmic contact
The invention discloses a deep ultraviolet Micro-LED chip and a preparation method thereof, the deep ultraviolet Micro-LED chip comprises a substrate, and the substrate comprises a first area and a second area arranged around the first area; a sapphire substrate, an off-location sputtering AlN nucleating layer, an AlN buffer layer template, a superlattice stress release buffer layer, an n-AlyGa1-yN transition layer and an n-AlzGa1-zN electron emission layer are sequentially arranged in the first area and the second area in a stacked mode, wherein AlN sublayers and AlxGa1-xN sublayers are alternately arranged on the superlattice stress release buffer layer. The first region further comprises a multi-quantum well active layer, a p-Al < n > Ga < 1-n > N electron barrier layer, a p-Al < k > Ga < 1-k > N hole emission layer and a Mg-doped p-GaN ohmic contact layer, wherein the multi-quantum well active layer, the p-Al < n > Ga < 1-n > N electron barrier layer, the p-Al < k > Ga < 1-k > N hole emission layer and the Mg-doped p-GaN ohmic contact layer are located on the side, away from the n-Al < y > Ga < 1-y > N transition layer, of the n-Al < z > Ga < 1-z > N electron emission layer and are arranged in a stacked mode; the deep ultraviolet Micro-LED chip further comprises an n-type electrode, a p-type electrode, a p-type electrode reflector, a passivation layer, a p-type metal bonding pad and an n-type metal bonding pad. Therefore, the deep ultraviolet Micro-LED chip has relatively low contact resistance and relatively high reflectivity, and the light extraction efficiency of the deep ultraviolet Micro-LED can be improved to a great extent.
Owner:WUHAN UNIV

A deep ultraviolet LED device with an inverted structure and a method for preparing the same

The present invention belongs to the technical field of deep ultraviolet LED devices, and specifically relates to a flip-chip deep ultraviolet LED device and a preparation method thereof, the preparation method comprising: preparing an AlN template layer; preparing an HfO2-MgF2 periodic structure layer; growing a GaN buffer layer; growing an LED epitaxial structure, and cleaning the surface of the LED epitaxial structure; preparing a MESA table; preparing an n-contact electrode and a p-contact electrode, and preparing a passivation layer on the n-contact electrode, the p-contact electrode, and the surface of the LED epitaxial structure; preparing a through hole on the passivation layer above the n-contact electrode and the p-contact electrode, and preparing a pad electrode on the through hole; and thinning a sapphire substrate using a chemical mechanical polishing process. The present invention forms a deep ultraviolet anti-reflection optical film by depositing multiple layers of dielectric materials with different refractive indices on the AlN template, thereby improving the efficiency of direct emission of photons generated by the quantum well, thereby improving the luminous efficiency of the epitaxial structure AlN template. The method of the present invention can not only improve the light extraction efficiency, but also reduce light loss, thereby improving the performance of the device.
Owner:ADVANCED ULTRAVIOLET OPTOELECTRONICS CO LTD

Red light nitride epitaxial wafer, preparation method thereof and Micro-LED

PendingCN121772428AImprove luminous efficiencyImprove luminous brightnessMaterial nanotechnologyNanopillarNitride
The invention provides a red-light nitride epitaxial wafer, a preparation method thereof and a Micro-LED. The red-light nitride epitaxial wafer comprises a sapphire substrate, an insertion structure, an n-type nitride pattern structure layer, a light-emitting layer and a p-type metal nitride layer, the insertion structure penetrates through the n-type nitride pattern structure layer, the light-emitting layer and part of the p-type metal nitride layer and comprises a composite Si nano-column and a composite regulation and control layer, and the composite Si nano-column comprises a Si nano-column and a semi-ellipsoid structure; the composite regulation and control layer comprises a protection layer and a buffer layer, the protection layer is arranged on the outer wall of the Si nano-column, and the buffer layer is arranged on the area between the adjacent composite Si nano-columns; and an n-type nitride pattern structure layer, a light-emitting layer and a p-type metal nitride layer are laminated on the buffer layer between the adjacent composite Si nano columns. The In component merging and uniformity can be improved, the light-emitting efficiency and brightness of the Micro-LED are improved, the half-peak width of the light-emitting wavelength is reduced, and the color purity of display application is improved.
Owner:JIANGSU INST OF ADVANCED SEMICON CO LTD

Micro-led chip with double-sided microstructure sapphire substrate and preparation method and application thereof

The application discloses a Micro-LED chip with a double-sided microstructure sapphire substrate and a preparation method and application thereof, and relates to the technical field of optoelectronic devices. The Micro-LED chip comprises a sapphire substrate and a flip GaN-based light-emitting unit arranged on one side of the sapphire substrate. The sapphire substrate has oppositely arranged first and second surfaces, the first surface faces the flip GaN-based light-emitting unit, and the second surface is a light-emitting upper surface. The first surface is formed with a microlens structure between the sapphire substrate and an n-type GaN layer, and the second surface is formed with a hexagonal pyramid microstructure array, which comprises a plurality of periodically arranged hexagonal pyramid structure units. The application can improve the surface light-emitting efficiency and the proportion of effective forward light emission while maintaining a high light extraction efficiency, and reduce the crosstalk influence of light emission in the sidewall direction on adjacent light-emitting pixels.
Owner:SUZHOU UNIV

A GaN LED structure and a manufacturing method thereof

The application discloses a GaN LED structure and a manufacturing method thereof. Before growing a GaN layer on a SiO2 patterned sapphire substrate, a SiNx layer is grown, and the SiNx layer and the SiO2 form a SiO2-SiNx double layer to improve a reflection film, so that total reflection of light emitted by the LED in an epitaxial layer is reduced, and then the external quantum efficiency of the LED epitaxy is improved. x In y Ga (1‑x‑y) N buffer layer multilayer design, on the one hand, provides the same orientation high-density nucleation center with the SiO2 patterned sapphire substrate, and on the other hand, promotes lateral growth by reducing the interface free energy between the epitaxial layer and the SiO2 patterned sapphire substrate, so that the defect density can be effectively reduced, and the lattice is over-extended, the LED crystal quality is improved, and then the internal quantum efficiency of the LED is improved; the MgO passivation layer is arranged behind the three-dimensional U-shaped GaN layer, and when the patterned tip of the SiO2 patterned sapphire substrate is not covered, the MgO passivation layer is used for passivating the patterned tip, reducing the upward extension of the threading dislocation, and then improving the leakage performance of the LED epitaxial layer.
Owner:JIANGXI CHANGELIGHT CO LTD

Sapphire substrate wafer thickness detection device

The utility model provides a sapphire substrate wafer thickness detection device, which relates to the technical field of wafer thickness detection and comprises a bottom plate, an adjusting plate, a movable plate and a detection piece. The whole bottom plate is of a rectangular structure; the adjusting plate is arranged in the bottom plate and is of an L-shaped structure. The movable plate is arranged in the bottom plate; and the detection piece is arranged above the bottom plate. The sapphire substrate wafer detection device solves the problems that after an existing sapphire substrate wafer is produced, the edge is generally detected, the middle position cannot be detected, manual observation is needed, errors are easily caused, and the sapphire substrate wafer detection device is inconvenient to use.
Owner:QINGDAO JIAXING HIGH-TECH DEVELOPMENT CO LTD

Preparation methods of epitaxial wafers and epitaxial wafers

This application relates to a method for preparing an epitaxial wafer and the epitaxial wafer itself. The preparation method includes: providing a sapphire substrate; performing an epitaxial growth process to epitaxially grow a GaN epitaxial layer on the sapphire substrate under heating conditions to obtain an epitaxial wafer; wherein the heating temperature of the heating conditions fluctuates, first increasing and then decreasing, depending on the epitaxial growth time or the epitaxial growth thickness, to reduce the temperature change of the epitaxial surface during the epitaxial growth process. This improves the quality of the epitaxial wafer.
Owner:ETTERMAN SEMICON TECH CO LTD +2

Monoclinic crystal (310) crystal face gallium oxide single crystal film and preparation method thereof

The invention relates to a monoclinic crystal (310) crystal face gallium oxide single crystal film and a preparation method thereof, a Ga2O3 single crystal film is an epitaxial single crystal film with a monoclinic structure, and the growth crystal face is Ga2O3 (310). The selected substrate is a sapphire substrate, a hexagonal gallium nitride substrate, a hexagonal silicon carbide substrate and the like which are high in heat conductivity and low in cost and are of a trigonal structure. The out-of-plane epitaxial relationship and the in-plane epitaxial relationship between the thin film and the substrate are AND respectively. The pulse laser deposition adopts a crystal solid-state laser, the laser wavelength is 266nm, and the growth temperature is lower than 600 DEG C. A transmission spectrum of the Ga2O3 single crystal film in a visible region shows that the transmittance in a range of 300-700nm is about 80%, the optical band gap of the film is about 4.6 eV, the surface square root roughness is less than 0.5 nm, and the Ga2O3 single crystal film is an excellent gallium oxide semiconductor candidate material crystal face.
Owner:SHANDONG UNIV

A proportionally optimized rare earth ion co-doped two-dimensional semiconductor material, a preparation method therefor, and applications thereof

This invention discloses a rare-earth ion co-doped two-dimensional semiconductor material with optimized ratio, its preparation method, and its application, belonging to the field of two-dimensional materials technology. The material is a transition metal chalcogenide WS2 doped with Er. 3+ and Yb 3+ By adjusting the mass ratio of ErCl3 to YbCl3 in the precursor, the Er:Yb doping molar ratio was optimized to 1:4 while maintaining a constant total doping concentration. This invention employs salt-assisted chemical vapor deposition to grow centimeter-scale, uniformly thick WS2 (Er-Yb) monolayer films on sapphire substrates, achieving an overall rare earth doping concentration as high as 10.7 at%. Experiments confirm that when the Er:Yb doping ratio is optimized to 1:4, the Yb... 3+ As a sensitizer, it can effectively absorb photon energy and efficiently transfer it to Er. 3+ The activator significantly enhances energy transfer efficiency and inhibits concentration quenching, enabling the material to exhibit the best photoelectric properties under 635nm illumination.
Owner:RUISHI (SHENZHEN) DISPLAY TECHNOLOGY CO LTD

Flip LED chip and preparation method thereof

The invention relates to the technical field of photoelectron manufacturing, and particularly discloses a flip LED chip and a preparation method thereof. The flip LED chip comprises a sapphire substrate, and an epitaxial layer, a current blocking layer and a first reflecting layer which are arranged on the front surface of the sapphire substrate; a light-emitting structure is formed on the epitaxial layer; the orthographic projection of the light-emitting structure on the sapphire substrate is provided with a first outer edge and a secondary outer edge, the orthographic projection of the first reflecting layer on the sapphire substrate is provided with a second outer edge, the second outer edge is located on the outer side of the first outer edge, and the distance between the first outer edge and the second outer edge is larger than or equal to 3 micrometers; a reflection structure is arranged on the back surface of the sapphire substrate; the orthographic projection of the reflection structure on the sapphire substrate is provided with a third outer edge close to the light-emitting surface and a fourth outer edge far away from the light-emitting surface, and the secondary outer edge is located on the outer side of the third outer edge; the fourth outer edge is located on the outer side of the second outer edge, and the distance between the fourth outer edge and the second outer edge is larger than or equal to 2 micrometers. By implementing the invention, the light-emitting brightness can be improved.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

Fixing device for LED sapphire substrate processing

The utility model discloses a fixing device for LED sapphire substrate processing, which relates to the technical field of LED sapphire substrate fixing and comprises a bottom block, a processing piece is arranged above the bottom block, the processing piece is placed at the top end of a supporting block, a driving motor is controlled to drive a driving gear to clockwise rotate on the inner wall of a cover plate, the driving gear drives a driven gear to transmit, and the driving gear drives the driven gear to rotate. According to the LED sapphire substrate clamping device, the situation that a worker manually takes and machines a machined part, and dislocation and deviation of the machined part are easily caused by human factors is avoided, so that the effect that the LED sapphire substrate is better limited and clamped by the device is effectively improved, a cover plate is installed on the outer wall of a driving gear and the outer wall of a driven gear, and one side of the cover plate makes contact with the outer wall of a bottom block; the cover plate is arranged on one side of the bottom block, so that the cover plate is stably installed on one side of the bottom block, the outer walls of the driving gear and the driven gear can be better protected, the situation that the driving gear and the driven gear are blocked due to external force interference is avoided, and the LED sapphire substrate can be better fixed and installed by the device during machining.
Owner:QINGDAO HUAXIN JINGYUAN SEMICONDUCTOR TECHNOLOGY CO LTD

Algan film with reduced dislocation density and method for preparing the same

The application discloses an AlGaN film with reduced dislocation density and a preparation method thereof, which comprises a sapphire substrate, an AlN nucleation layer, an AlN film layer, a dislocation filtering layer and an AlGaN film layer which are sequentially stacked, wherein the dislocation filtering layer is an AlGaN layer doped with Mg, and the AlGaN film has reduced dislocation density and improved crystal quality, which is beneficial to improving the light-emitting efficiency of a deep ultraviolet LED device.
Owner:SUZHOU UVCANTEK CO LTD

Batch preparation method of ultra-flat copper-nickel alloy single crystal wafer

The invention discloses a batch preparation method of ultra-flat copper-nickel alloy single crystal wafers, and belongs to the field of preparation of single crystal alloy materials. According to the method disclosed by the invention, the batch preparation (more than 10 pieces) of 4-inch-level copper-nickel single crystal wafers is realized on the sapphire substrate on the basis of double-layer magnetron sputtering based on nickel first and copper second in cooperation with a batch preparation process of a slot type multi-piece annealing carrier, and the method has the remarkable advantages that the alloy proportion can be regulated and controlled, the crystal orientation is consistent, the surface roughness is lower than 1 nm and the like. According to the method disclosed by the invention, not only can the interface orientation and diffusion behavior be accurately regulated and controlled, but also the urgent requirements of multiple fields such as electronic interconnection, catalytic electrochemistry and two-dimensional material epitaxy on the high-performance Cu-Ni single crystal wafer can be met.
Owner:PEKING UNIV

Wafer level room temperature monolayer magnetic semiconductor thin film and method of making the same

The application provides a wafer-level room-temperature monolayer magnetic semiconductor thin film and a preparation method thereof, and relates to the technical field of two-dimensional magnetic semiconductor material preparation.The present application is based on a three-temperature-zone low-pressure chemical vapor deposition system, and the wafer-level controllable preparation of a single-cell thickness spinel structure Fe2GaO4 thin film is realized through the following steps: the partitioned treatment of Te powder, metal precursors and sapphire substrates in three temperature zones, and the preparation method of sequentially blowing and replacing by inert carrier gas and hydrogen-argon mixed gas, segmented preheating and temperature rising, oxygen regulation and control and in-situ heat preservation annealing.Meanwhile, the prepared Fe2GaO4 thin film has a thickness of only 0.53 nm, a Curie temperature of more than 300 K, intrinsic ferromagnetism at room temperature, clear optical band gap and semiconductor characteristics, and can be widely applied to various new-type spin electronic devices.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI