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517 results about "Sapphire substrate" patented technology

Intelligent control system and method for sapphire substrate polishing

The invention relates to the technical field of machining, in particular to an intelligent control system and method for sapphire substrate polishing, and the method comprises the following steps: S1, surface topography data acquisition: collecting surface roughness data and a three-dimensional topography distribution diagram of a sapphire substrate in real time; s2, generating characteristic parameters: extracting the surface waviness, the local recess depth, the bulge density, the lattice distortion index and the residual stress distribution gradient as the characteristic parameters; s3, dynamic parameter adjustment: generating a dynamic adjustment instruction of the polishing pressure, the rotating speed of the polishing disk and the supply rate of the polishing solution; s4, distribution optimization of the polishing solution: realizing uniform coverage of the polishing solution on the surface of the substrate; s5, stress real-time monitoring: generating a stress abnormity early warning signal; s6, outputting a closed-loop control instruction: feeding back a stress abnormity early warning signal to the adaptive control model, and iteratively correcting the dynamic adjustment instruction; according to the method, the risks of stress concentration and fatigue damage can be reflected in real time, and the safety and high efficiency of the polishing process are ensured.
Owner:嘉兴南湖学院

Sapphire substrate automatic defect detection and classification method based on visual detection

The invention discloses a sapphire substrate automatic defect detection and classification method based on visual inspection, and relates to the technical field of visual inspection and image processing, and the method comprises the steps: carrying out the adaptive threshold segmentation and phase consistency detection of a multi-modal image data set, and carrying out the fusion, and obtaining a joint defect probability graph; extracting defect candidate areas from the joint defect probability graph, and generating unified feature representation; inputting the unified feature representation into a double-branch neural network, performing fusion and classification through a cross attention mechanism, outputting a defect classification result, performing reconstruction by using a NeRF algorithm, outputting a defect three-dimensional shape, and generating a three-dimensional shape map; and generating a defect thermodynamic diagram based on the three-dimensional morphology map, performing space-time correlation analysis in combination with equipment process parameters, and outputting a sapphire substrate defect process analysis report. According to the method, the image contrast and the defect characterization capability are improved, so that the comprehensiveness and the sensitivity of detection are remarkably enhanced.
Owner:QINGDAO JIAXING HIGH-TECH DEVELOPMENT CO LTD

Method for monitoring and controlling operation state of sapphire annealing furnace

The invention relates to the technical field of on-line monitoring and control, in particular to a sapphire annealing furnace operation state monitoring and controlling method, which specifically comprises the following steps: performing feature matching processing on power supply ripple data to obtain a clock offset compensation value, and performing timestamp synchronization on the power supply ripple data and temperature controller data through the clock offset compensation value; calculating to obtain residual clock offset of the distributed temperature controller, establishing a first-round monitoring model, and performing first-round evaluation on the operation state of the annealing furnace; carrying out reconstruction treatment on the sapphire substrate contact stress field, and carrying out secondary evaluation on the operation state of the annealing furnace; and dynamically adjusting control parameters of the annealing furnace according to the first-round evaluation result and the second-round evaluation result. The problems of power supply fluctuation, clock drift and thermal stress monitoring failure caused by aging of the annealing furnace in the prior art are solved.
Owner:QINGDAO HUAXIN JINGDIAN TECH CO LTD +1

Sapphire substrate through hole, superconducting quantum chip manufacturing method and superconducting quantum chip

The invention discloses a sapphire substrate through hole, a superconducting quantum chip manufacturing method and a superconducting quantum chip. The sapphire substrate through hole manufacturing method comprises the following steps: cleaning and drying a sapphire substrate; the cleaned and dried sapphire substrate is fixed to a three-dimensional positioning platform, and the three-dimensional positioning platform is used for moving the sapphire substrate according to a preset machining position so as to achieve relative machining Bessel beam nanoscale displacement; a femtosecond laser light source system emits a Bessel beam according to preset laser process parameters, the Bessel beam is focused to at least one position of a to-be-machined through hole of a sapphire substrate according to a preset laser scanning path, and through hole machining is conducted on the at least one position. According to the invention, the problem that the through hole is difficult to be formed in the sapphire substrate is solved, the high-quality requirement of the through hole in the sapphire substrate in the superconducting quantum chip is met, and a solution is provided for the realization of large-scale expansion of superconducting quantum bits in the future.
Owner:SHENZHEN SPINQ TECHNOLOGY CO LTD +1

Gallium oxide heteroepitaxial substrate and preparation method thereof

The invention relates to the technical field of semiconductors, in particular to a gallium oxide heteroepitaxial substrate and a preparation method thereof. The gallium oxide heteroepitaxial substrate comprises: a sapphire substrate; the sapphire substrate is provided with a beveled surface; a periodic pattern structure is arranged on the beveled surface of the sapphire substrate; the depth of a repetitive unit of the periodic pattern structure is 200 nm to 20 [mu] m, the maximum envelope size is 100 nm to 50 [mu] m, and the period interval is 200 nm to 100 [mu] m. The sapphire substrate is subjected to beveling processing and patterning processing, lattice mismatch is remarkably relieved, stress is released, accordingly, dislocation density is reduced, defects in the gallium oxide thin film are reduced, the gallium oxide single crystal thin film with better crystal quality is obtained, and the method has important application value in the field of gallium oxide thin film semiconductor material preparation.
Owner:GALLIUM TECHNOLOGY (CHANGZHOU) CO LTD

Micro LED transfer method and naked eye 3D display panel

The invention relates to a micro LED transfer method and a naked eye 3D display panel, and relates to the technical field of semiconductor display. According to the transfer method of the micro LED, a first magnetic region is formed in a sapphire substrate of each micro LED unit, and a second magnetic region is formed at the bottom of each groove, so that the micro LED units can be adsorbed in a transfer substrate; the first electrode comprises a first metal layer, a second magnetic metal layer and a third metal layer, and a third magnetic metal layer is arranged below each pixel electrode, so that when the micro LED units on the transfer substrate are transferred to the driving substrate, the first electrode and the third magnetic metal layers have a magnetic attraction effect, and the micro LED units on the transfer substrate can be transferred to the driving substrate; therefore, the transfer accuracy of the micro LED unit is greatly improved, and the transfer yield of the micro LED unit is greatly improved.
Owner:LOHUA CHIP-DISPLAY TECHNOLOGY DEVELOPMENT (JIANGSU) CO LTD

Method for depositing gold electrode on surface of BSCCO single crystal

The invention discloses a method for depositing a gold electrode on the surface of a BSCCO single crystal, and belongs to the technical field of superconducting device preparation, and the method comprises the following steps: S1, cleaning a sapphire substrate; s2, placing the sapphire substrate in a vacuum pipeline, fixing the PDMS film adhered with the BSCCO single crystal on the sapphire substrate, and cleaving the BSCCO single crystal in the vacuum pipeline; s3, depositing a layer of gold film on the surface of the BSCCO single crystal fixed on the sapphire substrate by magnetron sputtering; s4, photoetching and transferring a gold electrode pattern on the surface of the BSCCO single crystal; s5, carrying out ion beam etching to remove the gold film outside the photoetching pattern; s6, evaporating a silicon oxide film as a protective layer; and S7, removing the photoresist by using an organic solvent. According to the method disclosed by the invention, the necessary steps of depositing the gold electrode on the BSCCO single crystal are completed in a vacuum environment, so that the influence of an organic reagent, water and air on the structure of the BSCCO single crystal is effectively reduced.
Owner:NANJING UNIV

Deep ultraviolet LED epitaxial structure, deep ultraviolet LED device comprising same and preparation method of deep ultraviolet LED epitaxial structure

The invention discloses a deep ultraviolet LED epitaxial structure, a deep ultraviolet LED device comprising the same and a preparation method, and the epitaxial structure sequentially comprises a sapphire substrate, an AlN nanowire array layer, an AlN intrinsic layer and an AlGaN light-emitting structure layer from bottom to top. The AlGaN light-emitting structure layer further comprises an n-type AlGaN electron injection layer, a quantum well active layer, a p-type AlGaN electron blocking layer and other device structures. According to the invention, the vertically arranged AlN nanowire array is introduced to replace a traditional AlN buffer layer, so that lattice mismatching stress caused by a substrate is significantly released, and the dislocation density of an epitaxial layer is effectively reduced; meanwhile, the introduction of the AlN intrinsic layer further flattens the epitaxial interface and optimizes the lattice quality, thereby providing a high-quality template for the growth of a high-performance AlGaN material. The epitaxial structure is suitable for an LED device in a deep ultraviolet band, and the crystal quality, the electrical property and the luminous efficiency of the device can be improved.
Owner:WUHAN TEXTILE UNIV

Wafer-level single-layer MoS2 continuous film and APCVD film forming method and application thereof

The invention discloses a wafer-level single-layer MoS2 continuous film and an APCVD film forming method and application thereof.The wafer-level single-layer MoS2 continuous film is obtained by adopting a pipe-in-pipe APCVD tubular furnace, and conducting in-situ annealing on a C-A face sapphire substrate in the mixed atmosphere of oxygen and argon before the MoS2 continuous film grows; then the sulfur powder and the C-A surface sapphire substrate are heated at the same time in the mixed atmosphere of argon and hydrogen, the molybdenum trioxide powder is heated at the same time in the argon atmosphere, the wafer-level MoS2 continuous thin film of a single-layer structure is successfully prepared, and the technical problem that in the prior art, the wafer-level single-layer MoS2 thin film prepared through an APCVD method is discontinuous is solved. The wafer-level single-layer MoS2 continuous film prepared by the method has the characteristics of high quality and good uniformity, and is beneficial to large-scale integration and application of two-dimensional electronic devices.
Owner:XIDIAN UNIV

Flexible multi-junction solar cell and manufacturing method thereof

The invention relates to the technical field of solar cell structures, in particular to a flexible multi-junction solar cell and a manufacturing method thereof. The flexible multi-junction solar cell comprises a PI film, a bonding metal layer, a back metal layer, an ohmic contact metal layer, a DBR reflecting layer, an epitaxial layer structure, an antireflection film and an N electrode. According to the flexible multi-junction solar cell, the GaAs substrate is firstly used, the sapphire substrate is used in the middle, the PI film is finally used as the final substrate, the mode of overturning the epitaxial wafer twice is adopted, the process is simple, and the problems that the consumption of precious metal is large due to multiple times of metal bonding, and the performance of the epitaxial wafer is affected due to high temperature of the evaporation and thermal stripping film process can be solved; germanium materials are saved, and cost is low; the PI film is used as the cell substrate, the weight is light, the mechanical strength is high, the cell substrate can be bent, and the design requirement of a solar cell array on a spacecraft can be met.
Owner:NANCHANG KINGJET SEMICON TECH CO LTD

Elastic wave device, filter or multiplexer

The invention discloses an elastic wave device, a filter or a multiplexer, and belongs to the technical field of elastic waves, the elastic wave device comprises a piezoelectric layer, a nitride, a sapphire substrate and a conductive material film pattern; in the third direction, the nitride is arranged on the sapphire substrate, the piezoelectric layer is arranged on the nitride, and the conductive material film pattern is arranged on the piezoelectric layer; the conductive material film pattern comprises interdigital transducer electrodes and reflector electrodes, and the reflector electrodes are located on the two sides of the interdigital transducer electrodes in the first direction. The elastic wave device is good in impedance characteristic and free of any obvious clutter response, can be widely applied to the application fields with high requirements such as communication, radars and wireless sensors, and meets the requirements of a modern communication system for high-frequency and high-performance filters and multiplexers.
Owner:SHOULDER ELECTRONICS CO LTD

Negative-electrode-free lithium ion battery current collector, preparation method thereof and negative-electrode-free lithium ion battery

The invention provides a preparation method and application of a single crystal copper foil current collector for a negative-electrode-free lithium ion battery, and aims to improve the cycling stability and electrochemical performance of the battery. The preparation method comprises the following steps: (1) carrying out ultrasonic cleaning on the commercial copper foil by using hydrochloric acid, absolute ethyl alcohol and deionized water in sequence to remove surface pollutants; (2) a phosphoric acid and absolute ethyl alcohol mixed electrolyte is used for electrochemical polishing, and the surface smoothness and uniformity are improved; (3) performing high-temperature heat treatment on the sapphire substrate in high-purity argon to induce abnormal growth of crystal grains; (4) annealing in a reducing atmosphere of 1000-1100 DEG C to enhance the crystal orientation and crystallinity of Cu (111); and (5) rapidly cooling to room temperature, stabilizing the structure and preventing oxidation. When the obtained single crystal copper foil is used for the negative-electrode-free lithium battery, the single crystal copper foil is used as a negative electrode current collector to electrochemically deposit lithium metal and then is reassembled into the negative-electrode-free battery. The current collector is high in conductivity and stable in structure, lithium deposition uniformity can be remarkably improved, dendritic crystal growth is inhibited, the cycle life is prolonged, and safety is improved.
Owner:CENT SOUTH UNIV

Adjustable machining grinding equipment

The invention discloses adjustable machining grinding equipment, and relates to the technical field of machining. According to the equipment, a multi-dimensional adjusting mechanism is innovatively integrated, a sliding block is driven through a rotatable double-thread lead screw, stepless adjustment of the grinding radius is achieved, and the equipment is suitable for machining of the inner diameters of workpieces of different sizes; and in combination with a dynamic balance weight system, vibration in high-speed grinding is effectively inhibited, and the stability is improved. Meanwhile, a pneumatic-servo cooperative control system is adopted, stepless switching of the grinding pressure in the four stages of light pressure, medium pressure, heavy pressure and fine grinding is supported, the revolution-rotation speed ratio of the grinding disc to the workpiece is synchronously regulated and controlled, and the uniformity of the grinding track is optimized. In addition, the equipment is provided with a PLC program control module and a touch screen interface, 30 sets of technological parameters can be preset and stored, one-key calling is achieved, and the machining efficiency and consistency of complex parts are remarkably improved. According to the design, the adaptability of the equipment to sapphire substrates, gears and hard alloy special-shaped high-hardness workpieces is greatly expanded.
Owner:NINGBO UNIV

Preparation method of SERS (Surface Enhanced Raman Scattering) substrate for multi-component residue detection

The invention belongs to the technical field of preparation of SERS (Surface Enhanced Raman Scattering) substrates, and particularly relates to a preparation method of an SERS substrate for multi-component residue detection, which comprises the following steps: selecting a patterned sapphire substrate with a micro-nano structure surface; designing a plurality of arrangement modes, and establishing a laminated body physical model in which longitudinal layers of the multi-element SERS effect material are deposited and distributed layer by layer; according to a physical vapor deposition method and a chemical vapor deposition method, obtaining a laminated body substrate with a multi-layer deposition structure; using a mechanical cutting method to obtain a flat surface with transverse distribution of the multi-element material; a mechanical scribing method is used for scribing the ordered array structure, and the processing step of the SERS substrate with the multi-element materials distributed in the transverse direction and the longitudinal direction is completed; and soaking the processed SERS substrate in the solution, drying, and evaluating the SERS activity through a Raman spectrum to complete the preparation. By constructing transverse and longitudinal distribution of multi-component materials on the surface of the SERS substrate, the detection sensitivity of multi-component residues can be improved.
Owner:SHANDONG UNIV OF TECH

Zinc gallate film prepared by two-step method, and preparation method and application thereof

The invention discloses a zinc gallate film prepared by a two-step method, and a preparation method and application thereof, and belongs to the technical field of semiconductor materials. The invention provides a method for preparing a zinc gallate film through a two-step method. The method comprises the following steps that a C-face sapphire substrate is pretreated, surface impurities and water are removed, and a pretreated sapphire substrate is obtained; mixing the gallium acetylacetonate solution and the zinc acetylacetonate solution, adding hydrochloric acid, stirring until the mixture is completely dissolved, and standing to obtain supernatant liquid; under the normal pressure condition, inert gas is used as current-carrying gas, the supernatant liquid is subjected to ultrasonic atomization treatment and then conveyed to the surface of the pretreated sapphire substrate, a nucleating layer is formed through deposition at the temperature of 500-550 DEG C, then the temperature is increased to 600-650 DEG C, an epitaxial film is formed through deposition, and the single crystal spinel zinc gallate thin film is obtained. The zinc gallate thin film with higher quality is prepared through a two-step method.
Owner:SHANDONG UNIV

Acoustic wave filter based on AlN / AlGaN superlattice structure and preparation method thereof

The invention discloses an acoustic wave filter based on an AlN / AlGaN superlattice structure and a preparation method of the acoustic wave filter, and relates to the technical field of filters, the acoustic wave filter comprises a superlattice main body, and is characterized in that the superlattice main body comprises a substrate and a piezoelectric superlattice layer located on one side of the substrate; wherein the substrate is a Si substrate, a sapphire substrate or a SiC substrate; the piezoelectric superlattice layer is a composite alternating layer of an AIN layer and an Al < x > Ga < 1-x > N layer, and x is a constant greater than 0. The invention has the effects of reducing strain, improving compatibility and reliability, being suitable for high-frequency operation and remarkably improving electromechanical coupling performance.
Owner:FUJIAN SUNWISE SEMICON TECH CO LTD

Batch preparation method and application of single crystal boron nitride wafer based on copper-nickel single crystal film

The invention discloses a single crystal boron nitride wafer batch preparation method based on a copper-nickel single crystal film and application, and belongs to the technical field of two-dimensional material preparation and nano electronic device manufacturing. The method comprises the following steps: forming a Cu80Ni20 (111) single crystal film on a c-plane sapphire substrate through magnetron sputtering and high-temperature annealing to serve as a growth substrate; carrying out thermal conversion treatment on the ammonia borane precursor to form a supply source system capable of stably releasing a borazine gas phase precursor; a porous structure quartz sleeve is adopted to regulate and control the release behavior of a precursor, and multi-wafer airflow homogenization control is realized in a CVD system through a quartz staggered wafer carrier; and carrying out epitaxial growth, and synchronously preparing more than 10 single crystal boron nitride wafers which are consistent in crystal orientation, smooth in surface and free of crystal boundaries in a single batch. According to the method, efficient, uniform and repeatable batch preparation of the high-quality monocrystal h-BN is realized, and the obtained wafer has atomic-scale flatness and excellent insulating property and is suitable for high-performance two-dimensional electronic devices, deep ultraviolet photoelectric devices and quantum device platforms.
Owner:PEKING UNIV

Method for growing (310) oriented beta-Ga2O3 single crystal thick film on sapphire substrate

The invention provides a method for growing a (310) oriented beta-Ga2O3 single crystal thick film on a sapphire substrate. The method comprises the following steps: cleaning the sapphire substrate and then carrying out annealing treatment; and with hydrogen chloride gas, gallium metal and oxygen as reaction sources, epitaxially growing a (310) oriented beta-Ga2O3 single crystal thick film on the treated sapphire substrate by using a hydride vapor phase epitaxy method. According to the method for growing the (310) oriented beta-Ga2O3 single crystal thick film on the sapphire substrate, the process is simple, operation is easy, controllability is high, the obtained (310) oriented beta-Ga2O3 single crystal thick film is smooth in surface, compact and uniform in thickness, the crystallinity of the single crystal film layer is high, and the growth requirement of a single crystal epitaxial film layer of tens of micrometers can be met; in addition, the method provided by the invention can realize large-batch and large-scale production of the (310) oriented beta-Ga2O3 single crystal thick film, and meets the device preparation requirements.
Owner:BEIJING MING GALLIUM SEMICON CO LTD

Preparation method of high-quality gallium nitride film based on porous silicon nitride insertion layer

The invention provides a preparation method of a high-quality gallium nitride film based on a porous silicon nitride insertion layer. The preparation method comprises the following steps: firstly, sequentially depositing a GaN low-temperature buffer layer and a u-GaN layer subjected to compression strain on a patterned sapphire substrate; a porous SiNx insertion layer is deposited on the u-GaN layer in situ, a nanoscale hole structure penetrating in the thickness direction is formed in the porous SiNx insertion layer, and the u-GaN layer is exposed at holes; then GaN nanorods vertically grow at the holes, finally, growth conditions are regulated and controlled to enable the GaN nanorods to transversely grow and combine to form a flat high-quality GaN thin film, and a gap is formed between the porous SiNx insertion layer and the GaN thin film. According to the method, the internal stress of the GaN film can be effectively reduced, the dislocation density is reduced, the film quality is improved, the process is simple, and the method is suitable for large-scale and low-cost industrial production of the GaN film.
Owner:HEFEI UNIV OF TECH

Sapphire gallium nitride-based red light epitaxial wafer structure and preparation method thereof

The invention discloses a sapphire gallium nitride-based red light epitaxial wafer structure and a preparation method thereof, and belongs to the technical field of semiconductors, and the sapphire gallium nitride-based red light epitaxial wafer structure comprises a patterned sapphire substrate, a GaN substrate, n-type AlGaN, an InGaN quantum well, an AlGaN electron barrier layer, p-type GaN, ITO and a first electrode which are sequentially laminated; a second electrode is arranged on the n-type AlGaN; the InGaN quantum well, the AlGaN electron barrier layer, the p-type GaN and the ITO form a red light enhancement structure; a plurality of circular through holes determined based on a light scattering theory and a quantum confinement stark effect are formed in the vertical direction of the red light enhancement structure between the first electrode and the second electrode in a penetrating manner; under the condition that voltage is applied to the first electrode and the second electrode, generated electrons and holes are compounded in the InGaN quantum well to generate red light, and the quality of the red light epitaxial wafer is effectively improved.
Owner:ZHONGKE (SHENZHEN) WIRELESS SEMICON CO LTD

High electron mobility transistor epitaxial structure and manufacturing method thereof

The invention provides a high electron mobility transistor epitaxial structure and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a sapphire substrate; growing a boron-doped first buffer layer on the sapphire substrate: during growth, gradually reducing a boron component in a reaction material from a first preset value to 0 in a first preset duration, and continuously growing for a second preset duration after the boron component is reduced to 0, so that x in the first buffer layer is gradually reduced, and the boron component is gradually reduced to 0 from bottom to top; a boron-free GaN second buffer layer is grown on the first buffer layer, the growth rate of the second buffer layer is lower than that of the first buffer layer, and the thickness of the second buffer layer is larger than that of the first buffer layer; and sequentially growing a GaN high-resistance layer and a GaN epitaxial layer on the second buffer layer. Compared with the prior art, the defect density of the device can be effectively improved, electric leakage is reduced, and the stability and consistency of the device are improved.
Owner:SINO NITRIDE SEMICON

Method for preparing high-crystal-quality beta-Ga2O3 heteroepitaxial film on sapphire substrate

The invention provides a method for preparing a beta-Ga2O3 heteroepitaxial thin film with high crystal quality on a sapphire substrate, which comprises the following steps of: selecting a sapphire single crystal wafer as a substrate, cleaning the sapphire single crystal wafer, and putting the cleaned sapphire single crystal wafer into metal organic chemical vapor deposition equipment; with trimethyl gallium or triethyl gallium as a gallium source and oxygen as an oxygen source, growing a beta-Ga2O3 thin layer with the thickness of less than 10 nm; hydrogen is introduced, and the defect bond of the beta-Ga2O3 thin film is etched; the temperature of the substrate is increased to 1000 DEG C or above, oxygen is introduced, annealing is carried out, the defects are further bridged, and oxygen vacancies are reduced; and reducing the temperature of the substrate to the growth temperature, repeating the steps 2-4, and gradually accumulating the thickness to reach an expected value. According to the method, layer-by-layer growth and in-situ defect repair are combined, and the ultra-wide forbidden band beta-Ga2O3 heteroepitaxial crystal film with extremely low defect density and ultra-high quality is successfully prepared.
Owner:DALIAN UNIV OF TECH

A Micro-LED chip carrier substrate and a manufacturing method thereof

ActiveCN113506843BChip carrierPhysics
The present invention discloses a Micro-LED chip carrier substrate and a manufacturing method thereof. The Micro-LED chip carrier substrate includes a substrate, a connection layer connected to the front surface of the substrate on the back surface, and a plurality of microstructures disposed on the front surface of the connection layer. The microstructures have elasticity, and each microstructure is arranged in an array on the front surface of the connection layer. The Micro-LED chip carrier substrate of the present invention is used for temporarily bonding with a Micro-LED chip. When the Micro-LED chip is peeled off from a sapphire substrate by using a laser lift-off technology (LLO), the Micro-LED chip carrier substrate can effectively prevent the Micro-LED chip from cracking and / or shifting in position.
Owner:FUJIAN QIANGLI PHOTOELECTRICITY

Gallium oxide composite copper diamond ceramic material substrate and preparation method and application thereof

The invention provides a gallium oxide composite copper diamond ceramic material substrate and a preparation method and application thereof. The method comprises the steps that (1) a GaN superlattice buffer layer is formed on a sapphire substrate through low-temperature sputtering; (2) epitaxially growing a gallium oxide single crystal on the superlattice buffer layer to obtain a gallium oxide wafer; (3) bonding the gallium oxide wafer to a copper diamond ceramic material substrate; (4) decomposing the superlattice buffer layer by adopting a laser lift-off technology to obtain a gallium oxide wafer composite substrate; and (5) performing chemical mechanical polishing on the gallium oxide wafer surface of the gallium oxide wafer composite substrate to obtain the gallium oxide composite copper diamond ceramic material substrate. The gallium oxide composite copper diamond ceramic material substrate provided by the invention can be used as a substrate of a gallium oxide-based power device, the matching range is wide, the quality of a gallium oxide wafer is high, not only is the performance of the device improved, but also the heat dissipation problem of the device is effectively solved, and the method is simple in process and low in cost.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

Preparation method of high-conductivity AlN / GaN heterojunction

PendingCN120529622AHeterojunctionSputtering
The invention discloses a high-conductivity AlN / GaN heterojunction which sequentially comprises a sapphire substrate, an AlN buffer layer, a GaN channel layer and an AlN barrier layer from bottom to top. The total polarization intensity in an AlN material of the GaN channel layer is far greater than the total polarization intensity in a GaN material of the AlN barrier layer, net positive charges appear at an interface, the positive charges attract free electrons, a triangular potential well is formed on one side of GaN near the interface, the electrons are limited in the potential well by quantum, and high-density two-dimensional electron gas is formed. Polycrystal AlN is converted into single crystal AlN through magnetron sputtering in combination with a thermal annealing technology, so that the characteristic of small stress of the single crystal AlN is reserved, and two-dimensional electron gas can be formed at the interface of the AlN / GaN heterojunction.
Owner:XIDIAN UNIV

Stacked display unit and display

The invention discloses a stacked display unit and a display. The unit comprises a sapphire substrate, a light-emitting chip arrangement layer and a unit driving chip, wherein the light-emitting chip arrangement layer and the unit driving chip are vertically stacked on the sapphire substrate. The light-emitting chip arrangement layer comprises Micro-LED chips generating red light, green light and blue light, first insulation packaging layers are filled among the chips, and signal pads and common pads are arranged for electrode connection. The unit driving chip is arranged on the first insulation packaging layer, and a driving pin of the unit driving chip is electrically connected with the signal pad and the common pad. The second insulating packaging layer covers the signal pads and the common pads, but exposes the unit driving chips, and is provided with contact pads which are connected with data and power supply pins of the driving chips. According to the design, the occupation of the horizontal space of the display unit is reduced, the resolution ratio is improved, active driving is realized, and the loss of the luminous efficiency of the Micro-LED chip is avoided. Wherein the unit driving chip can be a silicon substrate, and due to the fact that the carrier mobility of the unit driving chip is higher, large-current driving is supported, and the display performance of the Micro-LED can be better exerted.
Owner:苏州易芯半导体有限公司

Multistage junction termination structure of vertical GaN diode

The utility model belongs to the field of semiconductors, and discloses a multistage junction termination structure of a vertical GaN diode. The multistage junction termination structure comprises a sapphire substrate on which a GaN nodule layer grows; a silicon-doped n +-GaN layer is grown on the GaN nodule layer, a silicon-doped n-GaN layer is grown on the n +-GaN layer, a magnesium-doped p-GaN layer is grown on the n-GaN layer, and a magnesium-doped p +-GaN layer is grown on the p-GaN layer; etching from the p < + >-GaN layer to the n < + >-GaN layer, and preparing a negative electrode on the surface of the n < + >-GaN layer; etching from the p +-GaN layer to the p-GaN layer to form a continuous multi-stage step, and preparing a positive electrode on the surface of the p +-GaN layer; according to the utility model, after the multi-stage step junction termination structure is introduced, the electric field aggregation phenomenon is obviously relieved, which indicates that the junction termination structure effectively reduces the internal electric field peak value.
Owner:SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY

Method for manufacturing and cleaning LED mounting substrate

To provide a method for manufacturing an LED mounting substrate by selectively removing metal Ga adhered to LED chips transferred from a sapphire substrate to a receptor substrate by laser lift-off without dissolving or denaturing other metals.SOLUTION: In the process for cleaning LED chips with alkaline cleaning solution in a method for manufacturing an LED mounting substrate, it is preferable to clean LED chips 5 transferred on a receptor substrate 2 by immersing the entire receptor substrate 2 in the alkaline cleaning solution 6. A gallium 4 can be selectively removed more easily, reliably, and stably. More specifically, the receptor substrate 2 on which LED chips 5 are transferred is immersed in a cleaning container filled with the alkaline cleaning solution 6, followed by appropriate number of washes with pure water, etc., and then dried.SELECTED DRAWING: Figure 1
Owner:SHIN ETSU CHEMICAL CO LTD

Efficient micro-ring acousto-optic modulator

The invention provides a high-efficiency micro-ring acousto-optic modulator, which combines high sensitivity and sound wave regulation and control capability of a micro-ring resonator, adopts two pairs of optical waveguides and acoustic waveguides with grating couplers, realizes flexible control of sound wave and light wave propagation directions, can be configured to perform common or reverse propagation, and can be used for acoustic wave and light wave propagation. The method is suitable for exploring the time reversal symmetry and the optical nonreciprocity of the system. The device adopts the sapphire substrate, by virtue of high mechanical strength, high sound velocity and low acoustic loss, the sound wave mode quality and transmission stability are improved, and meanwhile, high-quality integration with silicon dioxide and lithium niobate films is ensured; the silicon substrate has remarkable advantages in the aspects of micro-nano processing, heat conductivity and electro-optical system compatibility, and large-scale manufacturing and system integration are facilitated. In addition, a chalcogenide waveguide with low optical loss is introduced into the device, so that the light field constraint and locality are enhanced, the overlapping and coupling strength of an acousto-optic mode is improved, and meanwhile, the interface scattering loss is reduced.
Owner:NINGXIA UNIVERSITY

Electric control terahertz double-frequency phase modulator

The invention relates to an electric control terahertz double-frequency phase modulator which comprises a sapphire substrate and a metasurface structure resonance array located on the surface of the sapphire substrate. Each resonance unit comprises a T-shaped metal resonator, an inverted T-shaped metal resonator and a square split ring resonator. The middle electric control phase change patch is embedded in a gap between the T-shaped resonator and the inverted T-shaped metal resonator, and the right electric control phase change patch is embedded in an opening of the split ring resonator. The two sides of the metasurface structure resonance array are each fixedly provided with an electrode which is connected with the positive electrode and the negative electrode of the direct-current power source. The phase modulator provided by the invention can realize dual-band, large-bandwidth and more than 100-degree phase modulation through power-on, and the adjustable maximum phase exceeds 140 degrees. The terahertz dual-frequency phase modulator has a wide application prospect in the fields of terahertz phased array radar, terahertz communication, terahertz imaging and the like.
Owner:GUILIN UNIV OF ELECTRONIC TECH