3201 results about "Sapphire substrate" patented technology

A semiconductor light emitting element of nitride compound semiconductors excellent in cleavability, heat radiation and resistance to leakage is made by epitaxially grow a nitride compound semiconductor layers on a substrate of sapphire, for example, and thereafter separating the substrate. For separating the substrate, there are a technique using a abruption mechanism susceptible to a stress such as a "lift-off layer" and a recesses on a substrate. A technique using laser light to cause a local dense heat stress at the abruption mechanism is effective. A nitride compound semiconductor obtained by separating the substrate may be used as a new substrate to epitaxially grow high-quality nitride compound semiconductors thereon.

A semiconductor light emitting device with improved luminous efficiency is provided. An underlying n-type GaN layer is grown on a sapphire substrate, and a growth mask made from SiO₂ film or the like is formed on the underlying n-type GaN layer. An n-type GaN layer having a hexagonal pyramid shape is selectively grown on a portion, exposed from an opening of the growth mask, of the underlying n-type GaN layer. The growth mask is removed by etching, and then an active layer and a p-type GaN layer are sequentially grown on the entire substrate so as to cover the hexagonal pyramid shaped n-type GaN layer, to form a light emitting device. An n-side electrode and a p-side electrode are then formed.

A semiconductor manufacturing apparatus A semiconductor manufacturing apparatus comprises a hot plate which heats a sapphire substrate; a support table having a support plate disposed with being spaced away from the hot plate by a predetermined interval, and support portions which respectively support the sapphire substrate with being spaced by a predetermined interval between the hot plate and the support plate and support the sapphire substrate in such a manner that back surfaces of the hot plate and the sapphire substrate are opposite to each other; an elevating device which moves the support table up and down; and a shielding cover which externally blocks off spacing defined between the hot plate and the sapphire substrate and spacing defined between the sapphire substrate and the support plate.

A sapphire substrate includes a generally planar surface having a crystallographic orientation selected from the group consisting of a-plane, r-plane, m-plane, and c-plane orientations, and having a nTTV of not greater than about 0.037 μm/cm², wherein nTTV is total thickness variation normalized for surface area of the generally planar surface, the substrate having a diameter not less than about 9.0 cm.

A method for growing planar, semi-polar nitride film on a miscut spinel substrate, in which a large area of the planar, semi-polar nitride film is parallel to the substrate's surface. The planar films and substrates are: (1) {10{overscore (1)}1} gallium nitride (GaN) grown on a {100} spinel substrate miscut in specific directions, (2) {10{overscore (1)}3} gallium nitride (GaN) grown on a {110} spinel substrate, (3) {11{overscore (2)}2} gallium nitride (GaN) grown on a {1{overscore (1)}00} sapphire substrate, and (4) {11{overscore (1)}3} gallium nitride (GaN) grown on a {1{overscore (1)}00} sapphire substrate

A single crystalline a-plane nitride semiconductor wafer having no voids, bending or cracks can be rapidly and effectively prepared by hydride vapor phase epitaxy (HVPE) growth of the a-plane nitride semiconductor film on a single crystalline r-plane sapphire substrate at a temperature ranging from 950 to 1,100° C. and at a rate ranging from 30 to 300 μm/hr.

In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

An AlN layer having a surface of a texture structure is formed on a sapphire substrate. Then, a growth suppressing material layer is formed on the AlN layer so that the AlN layer is partially exposed to the outside. Then, group III nitride compound semiconductor layers are grown on the AlN layer and on the growth suppressing material layer by execution of an epitaxial lateral overgrowth method. Thus, a group III nitride compound semiconductor device is produced. An undercoat layer having convex portions each shaped like a truncated hexagonal pyramid is formed on a substrate. Group III nitride compound semiconductor layers having a device function are laminated successively on the undercoat layer.

A method for fabricating a plurality of individual light emitting diode units includes forming a GaN epitaxial layer on a sapphire substrate, forming a plurality of exhaust trenches on the GaN epitaxial layer, wherein the exhaust trenches define a plurality of individual light emitting diode units, forming a reflective layer on the GaN epitaxial layer, attaching the reflective layer to a conductive substrate, removing the sapphire substrate from the GaN epitaxial layer via a laser lift-off process, wherein a gas produced during the laser lift-off process is exhausted via the exhaust trenches, and dicing the conductive substrate along the exhaust trenches to form the plurality of individual light emitting diode units.

A high-resolution, Active Matrix (AM) programmed monolithic Light Emitting Diode (LED) micro-array is fabricated using flip-chip technology. The fabrication process includes fabrications of an LED micro-array and an AM panel, and combining the resulting LED micro-array and AM panel using the flip-chip technology. The LED micro-array is grown and fabricated on a sapphire substrate and the AM panel can be fabricated using CMOS process. LED pixels in a same row share a common N-bus line that is connected to the ground of AM panel while p-electrodes of the LED pixels are electrically separated such that each p-electrode is independently connected to an output of drive circuits mounted on the AM panel. The LED micro-array is flip-chip bonded to the AM panel so that the AM panel controls the LED pixels individually and the LED pixels exhibit excellent emission uniformity. According to this constitution, incompatibility between the LED process and the CMOS process can be eliminated.

The present invention relates to a fabrication method of nitride-based semiconductors and a nitride-based semiconductor fabricated thereby. In the fabrication method of the invention, a self-organizing metal layer is formed on a sapphire substrate. The sapphire substrate having the self-organizing metal layer is heated so that self-organizing metal coalesces into nanoscale clusters to irregularly expose an upper surface of the sapphire substrate. Exposed portions of the sapphire substrate is plasma etched using the self-organized metal clusters as a mask to form a nanoscale uneven structure on the sapphire substrate. A resultant structure is wet etched to remove the self-organized metal clusters. The nanoscale uneven structure formed on the sapphire substrate decreases the stress and resultant dislocation between the sapphire substrate and a nitride-based semiconductor layer as well as increases the quantum efficiency between the same.

A process for cheaply fabricating a substantially single crystal or a polycrystalline semiconductor structure on a host substrate. The process begins by depositing a layer of wide band gap nitride material 10, such as gallium nitride, aluminum nitride and/or indium nitride, on a sapphire substrate 11. The semiconductor structure 14 is then grown on the nitride layer. Next, the host substrate 15 is attached with a bonding agent to an exposed surface area of the semiconductor structure 14. The sapphire substrate is lifted off by irradiation in which nitrogen is dissociated from the nitride layer.

The present invention discloses a double-reflective-layer gallium nitride-based flip-chip light-emitting diode with both a distributed Bragg reflector and a metal reflective layer on its side and a fabrication method thereof. The light-emitting diode includes: a sapphire substrate; a buffer layer, an N-GaN layer, a multiple-quantum-well layer and a P-GaN layer stacked on the sapphire substrate in that order; a transparent conductive layer formed on the P-GaN layer; a distributed Bragg reflector formed over a side of the epitaxial layer and the transparent conductive layer; a metal reflective layer formed on the DBR; a P-type ohmic contact electrode formed on the transparent conductive layer; and an N-type ohmic contact electrode formed on the exposed N-GaN layer, wherein the P-type ohmic contact electrode and the N-type ohmic contact electrode are bonded to a heat dissipation substrate through a metal conductive layer and a ball bonder. By arranging a double reflection structure including a DBR and a metal reflective layer on the sloping side of the LED chip, the good reflectivity of the reflective layers can be fully utilized, thereby improving the light-emission efficiency of the LED.

The invention discloses an oily diamond grinding liquid and a preparation method thereof, and belongs to the technical field of surface superfine grinding. The grinding liquid comprises the following components by weight percent: 0.001%-10% of diamond micro powder, 0.001%-20% of surface active agent, 0-20% of dispersant, 0-10% of pH value regulator, 0-10% of wetting agent and oil in balancing amount. The oily diamond grinding liquid is mainly applied to surface grinding and polishing of silicon carbide wafers, LED sapphire substrate slices, ceramic, optical fiber, dies, semi-conductor compound wafers and the like. By the use of the oily diamond grinding liquid provided by the invention, the polishing efficiency can be greatly improved; the dispersing performance is good; a uniform and stable state can be kept for a long time; the degree of finish of products polished with the oily diamond grinding liquid is high; the polishing effect is good; no ingredient harmful to human body is contained; the cleaning is easy; and the environmental protection is facilitated.

Disclosed are a vertical GaN light emitting diode and a method for manufacturing the same. The vertical GaN light emitting diode comprises a first conductive GaN clad layer with an upper surface provided with a first contact formed thereon, an active layer formed on a lower surface of the first conductive GaN clad layer, a second conductive GaN clad layer formed on a lower surface of the active layer, a conductive adhesive layer formed on the second conductive GaN clad layer, and a conductive substrate, with a lower surface provided with a second contact formed thereon, formed on a lower surface of the conductive adhesive layer. The method for manufacturing the vertical GaN light emitting diodes comprises the step of removing the sapphire substrate from the light emitting structure so as to prevent the damages on a GaN single crystal plane of the structure.

A method of forming a light emitting device includes providing a sapphire substrate, growing an Al_1−xGa_xN first layer by vapor deposition on the substrate at a temperature between about 1000° C. and about 1180° C., and growing a III-nitride second layer overlying the first layer. The first layer may have a thickness between about 500 angstroms and about 5000 angstroms. In some embodiments, reaction between the group V precursor and the substrate is reduced by starting with a low molar ratio of group V precursor to group III precursor, then increasing the ratio during growth of the first layer, or by using nitrogen as an ambient gas.

An object of the present invention is to improve, in a group III nitride semiconductor device, the productivity, heat radiation characteristic and performance in the element high speed operation; upon a sapphire substrate in which an A plane (an (11-20) plane) is set to be the basal plane, an epitaxial growth layer of a group III nitride semiconductor is formed and, thereon, a gate electrode 16, a source electrode 15 and a drain electrode 17 are formed; these electrodes are disposed in such a way that a direction along which they are laid makes an angle within 20° with respect to a C axis of sapphire.

Provided is a nitride semiconductor device with high reliability and high flexibility in design and manufacture of the device. The nitride semiconductor device comprises a seed crystal portion (11) formed on a sapphire substrate (10) and having a mask (12) on one side surface thereof, and a GaN layer (15) grown on the sapphire substrate (10) and the seed crystal portion (11) through epitaxial lateral overgrowth. The GaN layer (15) is grown only from an exposed side surface of the seed crystal portion (11) which is not covered with the mask (12), so the lateral growth of the GaN layer (15) is asymmetrically carried out. Thereby, a meeting portion (32) is formed in the vicinity of a boundary between the seed crystal portion (11) and the mask (12) in a thickness direction of the GaN layer (15). Therefore, as the meeting portion (32) is formed in a position away from the center between the adjacent seed crystal portions (11) in a direction parallel to a surface of the substrate, a width W_L of a lateral growth region is larger with respect to a pitch W_P of the seed crystal potion (11), compared with conventional configurations.

A group III nitride semiconductor device is disclosed which has a reduced number of threading dislocations adversely affecting characteristics of the group III nitride semiconductor device. A method for manufacturing the group III nitride semiconductor device controls pit formation in a GaN layer formed on a sapphire substrate.First, a low temperature buffer layer is formed on a sapphire substrate by MOCVD. An undoped GaN layer having a predetermined thickness is then grown on the low temperature buffer layer. Next, a GaN layer containing magnesium as a dopant is formed on the layer at a lower pressure than that of depositing the GaN layer, which results in filling pits generated on the GaN layer to flatten the surface of another GaN layer.

A method including the steps of: modifying at least one part of a sapphire substrate by dry etching to thereby form any one of a dot shape, a stripe shape, a lattice shape, etc. as an island shape on the sapphire substrate; forming an AlN buffer layer on the sapphire substrate; and epitaxially growing a desired Group III nitride compound semiconductor vertically and laterally so that the AlN layer formed on a modified portion of the surface of the sapphire substrate is covered with the desirably Group III nitride compound semiconductor without any gap while the AlN layer formed on a non-modified portion of the surface of the sapphire substrate is used as a seed, wherein the AlN buffer layer is formed by means of reactive sputtering with Al as a target in an nitrogen atmosphere.