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262 results about "Gallium arsenide" patented technology

Gallium arsenide (GaAs) is a compound of the elements gallium and arsenic. It is a III-V direct band gap semiconductor with a zinc blende crystal structure. Gallium arsenide is used in the manufacture of devices such as microwave frequency integrated circuits, monolithic microwave integrated circuits, infrared light-emitting diodes, laser diodes, solar cells and optical windows.

Multi-circle memory optomagnetic encoder hybrid system

The invention discloses a multi-turn memory optomagnetic encoder hybrid system, belongs to the technical field of position and angle measurement encoders, and aims at solving the problems that an existing optomagnetic hybrid encoder is complex in signal processing, long in axial length, insufficient in precision stability and prone to losing the number of turns and the position. The system comprises an optical encoder, a gallium arsenide magnetic signal acquisition sensor, a multi-antipode unequal magnetic ring, a processor, a hardware circuit, an ultra-low power consumption circuit, a signal acquisition module, a signal processing module and the like, integrates self-developed magnetic angle analysis, turn number memory correction and other algorithms, and adopts dual-redundancy design and intelligent signal mode switching. The method simplifies the signal processing flow, shortens the axial length, improves the measurement precision and stability, enhances the environmental adaptability and fault-tolerant capability, prolongs the endurance, and is suitable for the position angle measurement in a high-precision and severe environment.
Owner:TITANIUM TIGER ROBOT TECH (SHANGHAI) CO LTD

Shielded trench devices

A shield trench power device such as a trench MOSFET or IGBT includes a substrate or an epitaxial layer of silicon, silicon carbide, gallium nitride, or gallium arsenide and employs an in-trench structure including a gate structure and an underlying polysilicon or oxide shield region that contacts a shield region in an epitaxial or crystalline layer of the device. The poly silicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.
Owner:IPOWER SEMICON

Method and system for vertical gradient freeze 8 inch gallium arsenide substrates

Methods and wafers for vertical gradient freeze 8 inch gallium arsenide (GaAs) substrates. In disclosed examples, vertical gradient freeze systems for forming gallium arsenide (GaAs) substrates having silicon as a dopant, the system includes a crucible to contain a GaAs liquid melt and seed material during a formation process; one or more heating coils arranged in a plurality of heating zones; and a pedestal to move relative to the crucible, the system operable to control heating of the plurality of heating zones and movement of the pedestal to form a single crystal GaAs substrate.
Owner:AXT INC

A fin-line terahertz multi-phase shifter based on gallium arsenide diodes

The present invention belongs to the field of electromagnetic functional devices, and specifically relates to a fin-line terahertz multi-phase shifter based on a gallium arsenide diode, comprising: a rectangular waveguide input port, a substrate, a rectangular waveguide-fin-line transition structure, a fin-line structure, a probe-type microstructure phase shifter unit, its feeding opening portion, a fin-line-rectangular waveguide transition structure, and a rectangular waveguide output port. The present invention addresses the problems of the existing terahertz wave phase modulator having few phase shifting technical solutions, large insertion loss during phase shifting, a small phase shift range, a large device size, and low integrability. By controlling the on-off of the diode on the probe-type microstructure phase shifter unit by voltage, the perturbation intensity of the probe on the fin line is changed, so that the equivalent dielectric constant of the fin line changes, thereby achieving the phase shift of the terahertz wave; then, by superimposing the phase shifters in a centrally symmetrical and parallel arrangement, a low-insertion-loss multi-bit terahertz wave phase shift is finally achieved, ensuring a good working state and promoting the development of terahertz phase control technology.
Owner:YANGTZE DELTA REGION INST OF UNIV OF ELECTRONICS SCI & TECH OF CHINE (HUZHOU)

Gallium arsenide solar cell top electrode for low-cost space and preparation method of gallium arsenide solar cell top electrode

The invention discloses a method for preparing an upper electrode of a gallium arsenide solar cell for a low-cost space, which comprises the following steps of: corroding a gallium arsenide epitaxial wafer taking germanium as a substrate in a mixed acid corrosion solution, removing an oxide layer and pollutants on the surface of the epitaxial wafer, taking out the epitaxial wafer, and cleaning the epitaxial wafer in deionized water; the surface of the active layer of the epitaxial wafer is tightly attached to the metal grid mesh, the epitaxial wafer is put into vacuum evaporation equipment, electrode metal is evaporated layer by layer in an electron beam evaporation mode, and after evaporation is completed, the epitaxial wafer is taken out from the vacuum evaporation equipment when the epitaxial wafer is cooled to 100 DEG C or below; and placing in a vacuum sintering furnace, heating at a constant temperature for a period of time, cooling to below 100 DEG C, and taking out to obtain the space gallium arsenide solar cell top electrode. A traditional photoetching process is replaced by a metal grid mesh, the surface of an active layer of an epitaxial wafer is tightly attached to the metal grid mesh, and then the epitaxial wafer is put into a vacuum coating machine to be subjected to metal evaporation. And the evaporated metal is deposited on the surface of the epitaxial wafer through gaps of the grid mesh to prepare a conductive upper electrode.
Owner:CHINA ELECTRONIC TECH GRP CORP NO 18 RES INST

Quantum dot based on self-assembly growth technology and preparation method thereof

The invention discloses a quantum dot based on a self-assembly growth technology and a preparation method thereof. The preparation method comprises the following steps: selecting a GaAs substrate, heating to remove an oxide layer and degassing; growing a GaAs (gallium arsenide) buffer layer; raising the temperature, and growing an AlGaAs buffer layer; reducing the temperature of the substrate, and growing a GaAs buffer layer; reducing the temperature of the substrate, modifying the velocity-flow ratio of the V-group elements to the III-group elements in the growth cavity, and growing a layer of InGaAs quantum well; modifying the velocity-flow ratio of the V-group elements to the III-group elements in the growth cavity, growing an InAs material on the quantum well, and forming quantum dots through a self-assembly technology; and raising the temperature, growing an InAlAs stress buffer layer, growing an InGaAs cover layer, and growing a GaAs spacer layer. The stress buffer layer and the composite cover layer are used to reduce the stress on the quantum dots, so that the size of the quantum dots is increased, and finally the required quantum dots with special wavelengths are obtained.
Owner:HUNAN HUISI OPTOELECTRONICS TECH CO LTD

A fan-out packaging method for gallium arsenide radio frequency chips based on resin

The present invention belongs to the technical field of integrated circuit packaging, and particularly relates to a fan-out packaging method for gallium arsenide radio frequency chips based on a resin base. The method comprises the following steps: using a temporary bonding carrier as a carrier; coating a photodecomposed temporary bonding adhesive on the carrier by spin coating and curing, and then using a metal protective layer to protect the temporary bonding adhesive on the front side; bonding the back sides of two heterogeneous gallium arsenide radio frequency chips to the front side of the metal protective layer through an adhesive layer; using a wafer-level plastic packaging process to plastic-package and encapsulate two heterogeneous gallium arsenide radio frequency chips to form a first plastic packaging layer; performing laser or mechanical drilling on the first plastic packaging layer to expose the metal protective layer to form a first plastic packaging through hole; and filling in the first plastic packaging through hole to form a filler. The present invention reduces the chip manufacturing cost and realizes the miniaturization of the chip size. At the same time, the high heat dissipation conductive layer on the back side can effectively enhance the heat dissipation of the chip and improve the performance of the system.
Owner:58TH RES INST OF CETC

Photoconductive switch, manufacturing method and high-voltage-resistant picosecond electric pulse device

The invention discloses a photoconductive switch, a manufacturing method and a high-voltage-resistant picosecond electric pulse device, relates to the technical field of semiconductor devices and can also be applied to the field of microelectronics, and the photoconductive switch comprises a substrate layer, and a low-temperature gallium arsenide layer, a top insulating layer and a top electrode layer which are sequentially stacked on the substrate layer, wherein the top electrode layer comprises a first pin and a second pin, and the first pin and the second pin are embedded into the low-temperature gallium arsenide layer through the top insulating layer. According to the technical scheme, the electrode with a certain depth is embedded into the gallium arsenide growing at low temperature, so that the current density can be reduced, and the heat dissipation performance and the voltage resistance of the photoconductive switch are enhanced.
Owner:BEIHANG UNIV

Intermediate frequency filter chip based on gallium arsenide IPD technology

The invention discloses an intermediate frequency filter chip based on a gallium arsenide IPD process, which adopts the GaAs IPD process with three metal layers and comprises six resonators, twelve capacitors and three metalized grounding holes. The six resonators are composed of capacitors C1-C6 and inductors L1-L6 which are connected in series / in parallel, the inductors are all of self-built octagonal structures, and wiring is only conducted on the middle layer and the uppermost metal layer; a branch series capacitor Ca-Cc and a main parallel capacitor Cd-Cf respectively form six transmission zeros outside a low-frequency band and a high-frequency band. According to the invention, the characteristics of small size and wide band of the filter chip are realized, the loss is reduced, the in-band flatness is improved, and the filter chip has high frequency selectivity and high out-of-band rejection capability.
Owner:NANTONG UNIV

Broadband low-noise amplifier

The invention discloses a broadband low-noise amplifier, and belongs to the technical field of monolithic microwave integrated circuits. Comprising a current multiplexing structure low-noise amplifier and a balanced low-noise amplifier which are cascaded, the current multiplexing low-noise amplifier comprises a first-stage amplification circuit and a second-stage amplification circuit which are cascaded in sequence, the balanced low noise amplifier comprises two folding Lange couplers and two amplification branches, the two amplification branches are of the same two-stage amplification circuit structure and comprise a third-stage amplification circuit and a fourth-stage amplification circuit which are cascaded and have the same structure; pHEMT (Pseudomorphic High Electron Mobility Transistor) tubes are adopted as amplifying devices in each amplifying circuit, and the broadband low-noise amplifier is integrated on a monolithic gallium arsenide. By combining the current multiplexing technology, the Lange coupler folding technology, the negative feedback technology and the balanced structure, the noise coefficient is effectively reduced, the power consumption is reduced, the layout area is reduced, and the performance of a traditional balanced low-noise amplifier is improved.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Pressing plate type spraying process for high-precision semiconductor equipment

According to the pressing plate type spraying process for the high-precision semiconductor equipment, through innovative combination of an intelligent dynamic pressing plate and a pulse alternating spraying mechanism, nanoscale deposition precision control is achieved. The process comprises the following steps: performing plasma activation on the surface of a substrate; scanning the surface topological structure by using a pressure control array driven by the MEMS; a partition pressure distribution diagram and spraying parameters are generated; heating the substrate to a preset temperature; the intelligent dynamic pressing plate is controlled to make contact with the substrate; starting a pulse spraying system; monitoring in real time and dynamically adjusting parameters; and releasing the pressure and cooling after the preset film thickness is reached. According to the process, a pressure control point array with the density of 64 / cm < 2 > is adopted. According to the method, the film thickness control precision (+ / -1 angstrom), the surface uniformity (99.8%) and the material utilization rate (gt; the method is suitable for high-end application scenes of various semiconductor materials such as silicon-based integrated circuits, gallium arsenide devices and silicon carbide power devices, and the key bottleneck problem of a traditional spraying technology is solved.
Owner:TONGZHOU DONGDA MASCH CO LTD

Reverse four-junction thin film gallium arsenide solar cell for space and preparation method of reverse four-junction thin film gallium arsenide solar cell

The invention discloses a reverse four-junction thin film gallium arsenide solar cell for space and a preparation method, and belongs to the technical field of solar cells, the reverse four-junction thin film gallium arsenide solar cell for space adopts a reverse four-junction epitaxial structure, and a composite metal substrate is arranged on the back of an epitaxial layer of the reverse four-junction thin film gallium arsenide solar cell for space. The reverse four-junction thin film gallium arsenide solar cell for the space is characterized in that the epitaxial structure adopted by the reverse four-junction thin film gallium arsenide solar cell for the space can effectively improve the anti-irradiation performance of the thin film solar cell, meanwhile, the composite metal layer can enable the electrical performance of the solar cell not to be affected by bending, and the attachability of the solar cell is improved.
Owner:CHINA ELECTRONIC TECH GRP CORP NO 18 RES INST

Single power supply ultra wide band temperature compensation low noise amplifier circuit

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.
Owner:CHENGDU GANIDE TECH

Three-junction gallium arsenide solar cell with quantum dot structure and manufacturing method of three-junction gallium arsenide solar cell

The invention discloses a three-junction gallium arsenide solar cell with a quantum dot structure and a manufacturing method of the three-junction gallium arsenide solar cell, belongs to the technical field of semiconductor photovoltaics, and aims to solve the problems that a quantum dot cell is large in stress and has many defects, and voltage and current are difficult to consider at the same time. According to the core technical scheme, in a middle battery base region, a GaAsP stress compensation layer is grown above an InGaAs quantum dot base region with gradient decreasing In components. The gradient quantum dots are used for enhancing long-wave absorption to improve short-circuit current; the open-circuit voltage of the GaAsP layer is increased by utilizing the wide forbidden band characteristic, the thickness of the GaAsP layer is accurately controlled, and the compressive stress of the quantum dot region is balanced by the introduced tensile stress. According to the stress balance design, material defects are greatly reduced, the crystal quality is improved, synchronous boosting of short-circuit current and open-circuit voltage is finally achieved on the basis of high reliability, and the overall efficiency of the battery is remarkably improved.
Owner:JIANGXI UNIV OF TECH

CVD diamond heat dissipation structure of optical chip and preparation method of CVD diamond heat dissipation structure

The invention provides a CVD diamond heat dissipation structure of an optical chip and a preparation method of the CVD diamond heat dissipation structure, and relates to the technical field of heat sink pieces. The heat sink sheet is arranged on the top packaging material gallium arsenide of the optical module chip; transverse intervals and longitudinal intervals are arranged between the heat sink sheets. And the heat sink sheets form a grid type structure. According to the invention, gallium arsenide is used as a photoetching substrate by means of electronic characteristics and photoelectric characteristics of gallium arsenide, and diamond is used as a heat sink to grow on an optical module chip by means of high thermal conductivity of diamond. The diamond heat sink is added on the optical module chip, so that the heat dissipation requirement of a high-power device can be met, the heat dissipation effect of the chip is remarkably improved, the temperature of the optical module chip is effectively reduced, and the loss of the device is reduced.
Owner:WUXI UNIV +1

Method for heteroepitaxial growth of gallium arsenide material on silicon by introducing laser surface treatment

The invention provides a method for heteroepitaxial growth of a gallium arsenide material on silicon by introducing laser surface treatment. The method comprises the following steps: growing a gallium arsenide low-temperature layer with a low crystallization degree on a silicon substrate, and crystallizing the surface layer of the gallium arsenide low-temperature layer by adopting a laser surface treatment mode; growing a gallium arsenide medium-temperature layer on the gallium arsenide low-temperature layer after the surface layer crystallization treatment, and purifying the surface layer crystalline state of the gallium arsenide medium-temperature layer by adopting a laser surface layer treatment mode; and growing a gallium arsenide high-temperature layer on the gallium arsenide medium-temperature layer after the surface layer crystalline state purification treatment. Under the condition that the crystallization degree of the whole gallium arsenide epitaxial layer is reserved, the crystallization degree of the local part, namely the upper surface of the epitaxial layer, is improved, the inhibition effect on dislocation is enhanced, and the optimization of the crystal quality of the whole epitaxial structure is realized. The dislocation penetrating to the surface of the whole epitaxial structure during heteroepitaxial growth of the gallium arsenide material on the silicon substrate is remarkably reduced, and a brand new way is opened up for preparing semiconductor photoelectric devices.
Owner:BEIJING UNIV OF POSTS & TELECOMM

Method for producing bonded wafer for micro leds

The present invention is a method for manufacturing a bonded wafer for a micro-LED, the method includes the steps of epitaxially growing an AlGaInP-based first cladding layer, non-doped active layer, and second cladding layer on a GaAs substrate to form an epitaxial layer, growing a GaP window layer on the second cladding layer, bonding the GaP window layer to a transparent substrate via a thermosetting bonding member, separating the GaAs substrate, isolating the epitaxial layer into micro-LED devices, exposing the second cladding layer or the GaP window layer of the micro-LED device, forming electrodes, adhering the electrodes to a transfer substrate, and irradiating a laser from the transparent substrate side to isolate the micro-LED device from the transparent substrate, in which the GaP window layer has a thickness of 6 µm or more. This provides a method for manufacturing a bonded wafer for an AlGaInP-based micro-LED which improves a yield decrease caused by a crack in a micro-LED device during a LLO step.
Owner:SHIN ETSU HANDOTAI CO LTD +2

Photoconductive switch of comb-shaped electrode

PendingCN121865749AImprove electric field distributionshort lifeFinal product manufacturePhotoconductive switchGallium arsenide
The invention provides a photoconductive switch of a comb electrode, which comprises a semi-insulating gallium arsenide substrate layer, a low-temperature gallium arsenide layer and an insulating protective layer, and is characterized in that the low-temperature gallium arsenide layer is formed on the semi-insulating gallium arsenide substrate layer, and the insulating protective layer is arranged on the low-temperature gallium arsenide layer; a switch anode and a switch cathode are respectively formed on the inner side of the low-temperature gallium arsenide layer surface insulation protection layer; a comb-shaped electrode is arranged on the surface of the low-temperature gallium arsenide layer and located at the switch anode. According to the invention, by arranging the comb-shaped electrode structure, a plurality of comb-tooth electrodes which are distributed in a staggered manner are formed in the electrode region, so that the action area of incident light and a semiconductor active region is increased under an illumination condition, and generation and collection of photon-generated carriers are facilitated; meanwhile, the distribution state of an electric field near the electrode is improved, and the possibility of local electric field concentration is reduced; in addition, a low-temperature gallium arsenide material is adopted as the photoconductive layer, the service life of a current carrier is short, and the device is suitable for photoelectric trigger application scenes with requirements for response speed and stability.
Owner:XIAN UNIV OF TECH

Solar cell step-shaped isolation groove, preparation method thereof and multi-junction gallium arsenide solar cell

The invention provides a solar cell step-shaped isolation groove, a preparation method thereof and a multi-junction gallium arsenide solar cell, the step-shaped isolation groove comprises a wide isolation groove and a narrow isolation groove, the narrow isolation groove is arranged above a lower electrode, the wide isolation groove is arranged above the narrow isolation groove, and the edges of the two sides of the wide isolation groove are located on the opposite outer sides of the edges of the two sides of the narrow isolation groove; the wide isolation groove penetrates through the top cell layer; the depth of the narrow isolation groove penetrates through the middle battery layer and the bottom battery layer. According to the invention, the step-shaped isolation groove is arranged, so that the film material for preparing the antireflection film can enter the isolation groove more easily, and the passivation effect on the isolation groove is improved; by arranging the wide isolation grooves, the top battery does not have a state that the edge is suspended and is not supported, and the mechanical property and the reliability of the battery are improved; and meanwhile, the top cell cannot shield the narrow isolation groove below the top cell, impurities adhered to the narrow isolation groove can be removed more conveniently, and the electrical performance and stability of the solar cell are ensured.
Owner:CHINA POWER TECH INC +1

Apparatus and method for dry etching of aluminum gallium arsenide optical waveguides using argon gas plasma

A method for dry etching to fabricate an AlGaAs optical waveguide is provided. The method includes steps as follows: providing at least one AlGaAs-on-insulator substrate(100) which comprising a substrate layer(102), a buried layer(104) formed over the substrate layer(102), a bonding interlayer(106) formed over the buried layer(104), and an AlGaAs layer(108) formed over the bonding interlayer(106), forming a hardmask film (110)on the AlGaAs layer(108), forming a photoresist film (112)on the hardmask film(110), transferring a pattern to the photoresist film(112), etching the hardmask film(110) to transfer the pattern from the photoresist film(112) to the hardmask film(110), and etching the AlGaAs layer(108) using ICP-RIE with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer(108), wherein only physical bombardment of Ar + ions is applied to the AlGaAs layer(108) to pattern the waveguide structure.
Owner:THE HONG KONG UNIV OF SCI & TECH

Non-linear quasi-bound state terahertz non-magnetic regulation non-reciprocal transmitter and control method

The invention discloses a nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter and a control method, and belongs to the field of terahertz devices. The nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter is formed by periodically arranging and splicing a plurality of unit structures, and each unit structure comprises a silicon carbide substrate and a cylindrical groove gallium arsenide cylinder with the same outer diameter and different inner diameters. The non-linearity of the gallium arsenide material is combined with the asymmetry of the gallium arsenide cylindrical unit structures of the cylindrical grooves with the same outer diameter and different inner diameters, and the non-reciprocal transmission intensity of the terahertz waves is adjusted by changing structural parameters, so that the non-reciprocal transmission regulation and control of the terahertz waves are realized. The nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device designed by the invention is simple in structure, terahertz wave transmission can be regulated only by changing the incident power of terahertz waves without additionally arranging bias mechanisms such as an external magnetic field, electricity, light, a heat source and the like, and the nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device is suitable for a future terahertz integrated system.
Owner:CHINA JILIANG UNIV

A novel high-isolation and low-insertion-loss switch matrix chip

The present invention discloses a novel high-isolation, low-insertion-loss switch matrix chip, comprising a switch matrix circuit disposed on a gallium arsenide (GaAs) pHEMT (Phe) semiconductor circuit layer. The switch matrix circuit comprises m input terminals, m switch structures, a vertical transition structure, n power dividers, and n output terminals. The vertical transition structure is configured as a coplanar waveguide. The input terminals are electrically connected to the signal input terminals of the switch structures, the signal output terminals of the switch structures are electrically connected to the vertical transition structure and the signal input terminals of the power dividers, the signal output terminals of the vertical transition structure are electrically connected to the signal input terminals of the power dividers, and the signal output terminals of the power dividers are electrically connected to the output terminals. A highly integrated switch matrix chip is achieved using a GaAs pHEMT process. The switch matrix chip integrates multiple switches and power dividers, along with a high-isolation vertical transition structure, achieving high isolation and low loss.
Owner:SOUTHWEST CHINA RES INST OF ELECTRONICS EQUIP

Method and apparatus for imaging arterial wall structure

The application provides an imaging method and device for an arterial wall structure, a soliton light source signal is obtained by preprocessing a laser signal, the soliton light source signal is emitted to a microscopic imaging system, a first target position of a target object is scanned and imaged by the microscopic imaging system, and a third harmonic image and a three-photon fluorescence image are obtained. According to the technical scheme, the soliton light source signal of a specific wavelength is obtained by preprocessing the laser signal in advance, the soliton light source signal has better adaptability to a marker (stronger excitation characteristic), the imaging quality of the third harmonic image and the three-photon fluorescence image after imaging of the microscopic imaging system is improved, direct visualization and easy resolution of different layers of the arterial wall structure are achieved, and the microscopic imaging system configured with a gallium arsenide photomultiplier tube and a gallium arsenic phosphor photomultiplier tube is used, two-channel acquisition is adopted to realize twice scanning and imaging of the first target position of the target object, and the number of obtained image details is ensured.
Owner:SHENZHEN UNIV

Amplitude limiter circuit structure integrated with filtering function in gallium arsenide process

The invention relates to the technical field of radio frequency devices, in particular to an amplitude limiter circuit structure integrated with a filtering function by a gallium arsenide process, and the circuit sequentially comprises a 50-ohm microstrip input matching section, a first-stage amplitude limiting filtering unit, a second-stage amplitude limiting filtering unit and an output matching section along a main transmission line, in the first stage, three forward PIN diodes and three reverse PIN diodes are stacked and connected to a main circuit in parallel, high power tolerance and symmetrical amplitude limiting capacity are achieved, and two low-frequency transmission zero points are formed by fusing a micro-strip grounding branch knot and an MIM capacitor resonator; in the second stage, two anti-parallel PIN diodes are matched with a grounding inductor to form a third transmission zero point, three groups of resonant structures are integrated, six transmission zero points are introduced, the filtering performance in a 12-18GHz frequency band is remarkably enhanced, a PIN diode parasitic capacitor and a microstrip inductive structure are skillfully utilized by the circuit to cooperatively realize filtering, extra passive elements are not needed, and the cost is low. The method is suitable for integrated protection of sensitive devices in a high-frequency radar and communication system.
Owner:NANJING SIXIN SEMICON CO LTD

Two-dimensional bismuth compound / gallium arsenide heterojunction, preparation method thereof and application of two-dimensional bismuth compound / gallium arsenide heterojunction in photoelectric detector

The invention discloses a two-dimensional bismuth compound / gallium arsenide heterojunction, a preparation method thereof and application of the two-dimensional bismuth compound / gallium arsenide heterojunction in a photoelectric detector, and belongs to the field of semiconductor devices. Two-dimensional bismuth compounds (bismuth selenide or bismuth telluride) are prepared on a cleaned and pre-masked gallium arsenide substrate through an electron beam evaporation method, the two-dimensional bismuth compound / gallium arsenide heterojunction is formed, and the thickness of a two-dimensional bismuth compound film is controllable. And preparing a symmetric or asymmetric electrode by electron beam evaporation to obtain a prototype device of the photoelectric detector. The preparation process is simple, the repeatability is good, the detector can achieve the high detection rate (up to-1014 Jones) of optical signals from the ultraviolet band to the near-infrared band (367-1064 nm) under the room temperature condition and without bias voltage, and meanwhile the excellent cycling stability and air stability are achieved.
Owner:HARBIN INST OF TECH

Quaternary infrared chip with high reliability and vertical structure and preparation method thereof

The invention relates to a high-reliability quaternary infrared chip with a vertical structure and a preparation method of the high-reliability quaternary infrared chip with the vertical structure, and the high-reliability quaternary infrared chip with the vertical structure comprises a multi-quantum well active region, a P electrode, a spacer layer, an N-type wide-band-gap coating layer, an N-type gallium arsenide substrate, an N electrode and a passivation layer, the P electrode is arranged above the multi-quantum well active region, and the spacer layer is arranged above the N-type wide-band-gap coating layer. The spacer layer is arranged below the multi-quantum well active region, the N-type wide-band-gap coating layer is arranged below the spacer layer, the N-type gallium arsenide substrate is arranged below the N-type wide-band-gap coating layer, the N electrode is arranged below the N-type gallium arsenide substrate, and the passivation layer coats the upper part of the multi-quantum well active region and the lower part of the side edge of the P electrode. According to the four-element infrared chip, all chips can be detected, defective products can be removed at the chip end, and the packaging yield can be guaranteed. Through the passivation layer, the quaternary infrared chip can effectively isolate moisture, smudginess and silver paste in the packaging process, and the packaging reliability is improved.
Owner:SHENZHEN ORIENT COMPONENTS CO LTD

Low-cost metal substrate thin film gallium arsenide solar cell and preparation method thereof

The invention relates to a low-cost metal substrate thin film gallium arsenide solar cell and a preparation method thereof. The solar cell sequentially comprises an antireflection film and an upper metal electrode from top to bottom, the gallium arsenide epitaxial layer grows in an inverted mode; evaporating a metal titanium layer; evaporating a metal chromium layer; evaporating a metal nickel layer; and electroplating a metal nickel or nickel alloy layer. The preparation method comprises the steps of flip epitaxial growth, stress balance metal transition layer evaporation, metal substrate electroplating, temporary substrate bonding, original GaAs substrate removal and thin film solar cell device technology. The metal substrate thin film gallium arsenide solar cell prepared by the invention adopts cheap titanium, chromium, nickel and other metal materials and an electroplating method, and has the advantages of stress matching, low cost, light weight and the like compared with the existing thin film gallium arsenide solar cell.
Owner:SHANGHAI INST OF SPACE POWER SOURCES

Chip circuit device of K-band receiving assembly

The invention provides a K-band receiving component chip circuit device, which belongs to the technical field of radio frequency integrated microsystems and comprises a gallium arsenide low-noise amplification circuit and a silicon-based amplitude-phase multifunctional circuit. The gallium arsenide low-noise amplification circuit is located at the front end of the receiving link; the silicon-based amplitude-phase multifunctional circuit comprises a driving amplification circuit, a numerical control attenuation circuit, a numerical control phase shift circuit and a power distribution circuit. The output end of the gallium arsenide low-noise amplification circuit is connected with the input end of the driving amplification circuit, the output end of the driving amplification circuit is connected with the input end of the numerical control attenuation circuit, the output end of the numerical control attenuation circuit is connected with the input end of the driving amplification circuit, and the output end of the driving amplification circuit is connected with the input end of the numerical control phase shift circuit. The output end of the numerical control phase shift circuit is connected with the input end of the power distribution circuit, and the output end of the power distribution circuit is connected with the COM end. According to the invention, a complex circuit is simplified, the occupation of large-scale simulation on resources is reduced, the simulation time is shortened, and different K-band scenes are adapted.
Owner:INFORMATION SCI RES INST OF CETC +1

A glue-free fixing and separation method for a temporary substrate of a flexible gallium arsenide solar cell

The present invention provides a method for fixing and separating a temporary substrate of a flexible gallium arsenide solar cell without glue, comprising the steps of: S1, constructing an outer welding layer 1 on a temporary substrate; S2, welding the outer welding layer 1 to the back electrode of a wafer by laser welding technology; S3, peeling off the wafer substrate and continuing to prepare the battery device; S4, separating adjacent flexible gallium arsenide solar cell monomers by laser cutting technology; wherein the outer welding layer 1 includes at least one group of closed path belts, and all flexible gallium arsenide solar cell monomers are located on the inner side of the closed path belts. The method for fixing and separating a temporary substrate without glue provided by the present invention can avoid the introduction of volatile organic adhesive components in the preparation process of flexible gallium arsenide solar cells, can effectively improve the stability of the battery preparation process, and ensure the preparation efficiency and preparation quality of the battery. The closed path belt in the outer welding layer 1 can avoid chemical corrosion on the back electrode side, and ensure the preparation quality of the battery.
Owner:CHINA POWER TECH INC +1

Gallium arsenide single crystal substrate and method for its production

A gallium arsenide single-crystal substrate is a gallium arsenide single-crystal substrate with a circular main surface, wherein an average value of a dislocation density of the main surface 5 cm -2 or more and 100 cm -2 or less, and in an imaginary lattice formed by laying out squares with a side length of 2 mm on the main surface such that a maximum number of the squares are arranged next to each other without overlapping, a ratio of the number of squares in which no dislocation is present to the total number of squares forming the lattice is 97.0% or more and 99.5% or less, wherein the gallium arsenide single-crystal substrate contains silicon, wherein the silicon concentration is 1.0 × 10 18 cm -3 or more and 5.0×10 19 cm -3 or less, and a carrier concentration of the gallium arsenide single crystal substrate of 1.0×10 18 cm-3 or more and 4.0×10 18 cm -3 or less.
Owner:SUMITOMO ELECTRIC INDUSTRIES LTD