150 results about "Gallium arsenide" patented technology

The invention discloses a multi-turn memory optomagnetic encoder hybrid system, belongs to the technical field of position and angle measurement encoders, and aims at solving the problems that an existing optomagnetic hybrid encoder is complex in signal processing, long in axial length, insufficient in precision stability and prone to losing the number of turns and the position. The system comprises an optical encoder, a gallium arsenide magnetic signal acquisition sensor, a multi-antipode unequal magnetic ring, a processor, a hardware circuit, an ultra-low power consumption circuit, a signal acquisition module, a signal processing module and the like, integrates self-developed magnetic angle analysis, turn number memory correction and other algorithms, and adopts dual-redundancy design and intelligent signal mode switching. The method simplifies the signal processing flow, shortens the axial length, improves the measurement precision and stability, enhances the environmental adaptability and fault-tolerant capability, prolongs the endurance, and is suitable for the position angle measurement in a high-precision and severe environment.

The invention discloses a photoconductive switch, a manufacturing method and a high-voltage-resistant picosecond electric pulse device, relates to the technical field of semiconductor devices and can also be applied to the field of microelectronics, and the photoconductive switch comprises a substrate layer, and a low-temperature gallium arsenide layer, a top insulating layer and a top electrode layer which are sequentially stacked on the substrate layer, wherein the top electrode layer comprises a first pin and a second pin, and the first pin and the second pin are embedded into the low-temperature gallium arsenide layer through the top insulating layer. According to the technical scheme, the electrode with a certain depth is embedded into the gallium arsenide growing at low temperature, so that the current density can be reduced, and the heat dissipation performance and the voltage resistance of the photoconductive switch are enhanced.

The invention discloses an intermediate frequency filter chip based on a gallium arsenide IPD process, which adopts the GaAs IPD process with three metal layers and comprises six resonators, twelve capacitors and three metalized grounding holes. The six resonators are composed of capacitors C1-C6 and inductors L1-L6 which are connected in series / in parallel, the inductors are all of self-built octagonal structures, and wiring is only conducted on the middle layer and the uppermost metal layer; a branch series capacitor Ca-Cc and a main parallel capacitor Cd-Cf respectively form six transmission zeros outside a low-frequency band and a high-frequency band. According to the invention, the characteristics of small size and wide band of the filter chip are realized, the loss is reduced, the in-band flatness is improved, and the filter chip has high frequency selectivity and high out-of-band rejection capability.

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.

The invention provides a method for heteroepitaxial growth of a gallium arsenide material on silicon by introducing laser surface treatment. The method comprises the following steps: growing a gallium arsenide low-temperature layer with a low crystallization degree on a silicon substrate, and crystallizing the surface layer of the gallium arsenide low-temperature layer by adopting a laser surface treatment mode; growing a gallium arsenide medium-temperature layer on the gallium arsenide low-temperature layer after the surface layer crystallization treatment, and purifying the surface layer crystalline state of the gallium arsenide medium-temperature layer by adopting a laser surface layer treatment mode; and growing a gallium arsenide high-temperature layer on the gallium arsenide medium-temperature layer after the surface layer crystalline state purification treatment. Under the condition that the crystallization degree of the whole gallium arsenide epitaxial layer is reserved, the crystallization degree of the local part, namely the upper surface of the epitaxial layer, is improved, the inhibition effect on dislocation is enhanced, and the optimization of the crystal quality of the whole epitaxial structure is realized. The dislocation penetrating to the surface of the whole epitaxial structure during heteroepitaxial growth of the gallium arsenide material on the silicon substrate is remarkably reduced, and a brand new way is opened up for preparing semiconductor photoelectric devices.

The invention provides a photoconductive switch of a comb electrode, which comprises a semi-insulating gallium arsenide substrate layer, a low-temperature gallium arsenide layer and an insulating protective layer, and is characterized in that the low-temperature gallium arsenide layer is formed on the semi-insulating gallium arsenide substrate layer, and the insulating protective layer is arranged on the low-temperature gallium arsenide layer; a switch anode and a switch cathode are respectively formed on the inner side of the low-temperature gallium arsenide layer surface insulation protection layer; a comb-shaped electrode is arranged on the surface of the low-temperature gallium arsenide layer and located at the switch anode. According to the invention, by arranging the comb-shaped electrode structure, a plurality of comb-tooth electrodes which are distributed in a staggered manner are formed in the electrode region, so that the action area of incident light and a semiconductor active region is increased under an illumination condition, and generation and collection of photon-generated carriers are facilitated; meanwhile, the distribution state of an electric field near the electrode is improved, and the possibility of local electric field concentration is reduced; in addition, a low-temperature gallium arsenide material is adopted as the photoconductive layer, the service life of a current carrier is short, and the device is suitable for photoelectric trigger application scenes with requirements for response speed and stability.

The invention discloses a nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter and a control method, and belongs to the field of terahertz devices. The nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter is formed by periodically arranging and splicing a plurality of unit structures, and each unit structure comprises a silicon carbide substrate and a cylindrical groove gallium arsenide cylinder with the same outer diameter and different inner diameters. The non-linearity of the gallium arsenide material is combined with the asymmetry of the gallium arsenide cylindrical unit structures of the cylindrical grooves with the same outer diameter and different inner diameters, and the non-reciprocal transmission intensity of the terahertz waves is adjusted by changing structural parameters, so that the non-reciprocal transmission regulation and control of the terahertz waves are realized. The nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device designed by the invention is simple in structure, terahertz wave transmission can be regulated only by changing the incident power of terahertz waves without additionally arranging bias mechanisms such as an external magnetic field, electricity, light, a heat source and the like, and the nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device is suitable for a future terahertz integrated system.

The application provides an imaging method and device for an arterial wall structure, a soliton light source signal is obtained by preprocessing a laser signal, the soliton light source signal is emitted to a microscopic imaging system, a first target position of a target object is scanned and imaged by the microscopic imaging system, and a third harmonic image and a three-photon fluorescence image are obtained. According to the technical scheme, the soliton light source signal of a specific wavelength is obtained by preprocessing the laser signal in advance, the soliton light source signal has better adaptability to a marker (stronger excitation characteristic), the imaging quality of the third harmonic image and the three-photon fluorescence image after imaging of the microscopic imaging system is improved, direct visualization and easy resolution of different layers of the arterial wall structure are achieved, and the microscopic imaging system configured with a gallium arsenide photomultiplier tube and a gallium arsenic phosphor photomultiplier tube is used, two-channel acquisition is adopted to realize twice scanning and imaging of the first target position of the target object, and the number of obtained image details is ensured.

The invention relates to the technical field of radio frequency devices, in particular to an amplitude limiter circuit structure integrated with a filtering function by a gallium arsenide process, and the circuit sequentially comprises a 50-ohm microstrip input matching section, a first-stage amplitude limiting filtering unit, a second-stage amplitude limiting filtering unit and an output matching section along a main transmission line, in the first stage, three forward PIN diodes and three reverse PIN diodes are stacked and connected to a main circuit in parallel, high power tolerance and symmetrical amplitude limiting capacity are achieved, and two low-frequency transmission zero points are formed by fusing a micro-strip grounding branch knot and an MIM capacitor resonator; in the second stage, two anti-parallel PIN diodes are matched with a grounding inductor to form a third transmission zero point, three groups of resonant structures are integrated, six transmission zero points are introduced, the filtering performance in a 12-18GHz frequency band is remarkably enhanced, a PIN diode parasitic capacitor and a microstrip inductive structure are skillfully utilized by the circuit to cooperatively realize filtering, extra passive elements are not needed, and the cost is low. The method is suitable for integrated protection of sensitive devices in a high-frequency radar and communication system.

The invention relates to a high-reliability quaternary infrared chip with a vertical structure and a preparation method of the high-reliability quaternary infrared chip with the vertical structure, and the high-reliability quaternary infrared chip with the vertical structure comprises a multi-quantum well active region, a P electrode, a spacer layer, an N-type wide-band-gap coating layer, an N-type gallium arsenide substrate, an N electrode and a passivation layer, the P electrode is arranged above the multi-quantum well active region, and the spacer layer is arranged above the N-type wide-band-gap coating layer. The spacer layer is arranged below the multi-quantum well active region, the N-type wide-band-gap coating layer is arranged below the spacer layer, the N-type gallium arsenide substrate is arranged below the N-type wide-band-gap coating layer, the N electrode is arranged below the N-type gallium arsenide substrate, and the passivation layer coats the upper part of the multi-quantum well active region and the lower part of the side edge of the P electrode. According to the four-element infrared chip, all chips can be detected, defective products can be removed at the chip end, and the packaging yield can be guaranteed. Through the passivation layer, the quaternary infrared chip can effectively isolate moisture, smudginess and silver paste in the packaging process, and the packaging reliability is improved.

The invention relates to a low-cost metal substrate thin film gallium arsenide solar cell and a preparation method thereof. The solar cell sequentially comprises an antireflection film and an upper metal electrode from top to bottom, the gallium arsenide epitaxial layer grows in an inverted mode; evaporating a metal titanium layer; evaporating a metal chromium layer; evaporating a metal nickel layer; and electroplating a metal nickel or nickel alloy layer. The preparation method comprises the steps of flip epitaxial growth, stress balance metal transition layer evaporation, metal substrate electroplating, temporary substrate bonding, original GaAs substrate removal and thin film solar cell device technology. The metal substrate thin film gallium arsenide solar cell prepared by the invention adopts cheap titanium, chromium, nickel and other metal materials and an electroplating method, and has the advantages of stress matching, low cost, light weight and the like compared with the existing thin film gallium arsenide solar cell.

The invention provides a K-band receiving component chip circuit device, which belongs to the technical field of radio frequency integrated microsystems and comprises a gallium arsenide low-noise amplification circuit and a silicon-based amplitude-phase multifunctional circuit. The gallium arsenide low-noise amplification circuit is located at the front end of the receiving link; the silicon-based amplitude-phase multifunctional circuit comprises a driving amplification circuit, a numerical control attenuation circuit, a numerical control phase shift circuit and a power distribution circuit. The output end of the gallium arsenide low-noise amplification circuit is connected with the input end of the driving amplification circuit, the output end of the driving amplification circuit is connected with the input end of the numerical control attenuation circuit, the output end of the numerical control attenuation circuit is connected with the input end of the driving amplification circuit, and the output end of the driving amplification circuit is connected with the input end of the numerical control phase shift circuit. The output end of the numerical control phase shift circuit is connected with the input end of the power distribution circuit, and the output end of the power distribution circuit is connected with the COM end. According to the invention, a complex circuit is simplified, the occupation of large-scale simulation on resources is reduced, the simulation time is shortened, and different K-band scenes are adapted.

The application discloses a kind of perfect cutoff absorber of metasurface based on nano round structure, adopt nanometer cylinder and ring array grown on silicon dioxide, two groups of ring structure are respectively selected using dielectric material gallium arsenide and silicon.Optimizing structure parameter, wavelength from ultraviolet to mid-infrared, 0.913 average absorption is realized in absorption band 100-710nm, and average absorption is only 0.02 in non-absorption band 1260nm-20μm wave band.ER is 9.6dB, ED is 0.81, and CS is 0.0015nm ‑1 The perfect cutoff absorber provided by the application has exactly this spectral selectivity, which provides an effective method for designing ideal solar heat absorber, which has important application in the field of renewable energy, such as solar thermal photovoltaic and solar thermal energy application.

The invention discloses a concentrating cell module and a preparation method thereof, and the concentrating cell module comprises a concentrating gallium arsenide solar cell, a buffer layer, a first silver-gold plating layer, a front copper foil, a substrate, a back copper foil, a nickel plating layer, a palladium plating layer and a gold plating layer, and the front copper foil and the back copper foil are respectively arranged on the front side and the back side of the substrate. A nickel plating layer, a palladium plating layer and a gold plating layer are sequentially plated on the back face of the back copper foil, a first silver-gold plating layer is plated on the front face of the front copper foil, a cell fixing area is preset on the front face of the front copper foil, a buffer layer is plated on the back face of the light-gathering gallium arsenide solar cell, and the buffer layer is a second silver-gold plating layer or a gold-tin plating layer. The light-gathering gallium arsenide solar cell is placed in the cell fixing area, the positive electrode of the light-gathering gallium arsenide solar cell is connected with the positive electrode of the front copper foil, and the negative electrode of the light-gathering gallium arsenide solar cell and the negative electrode of the front copper foil are conducted through resistance welding. According to the invention, the problem of poor heat dissipation performance of the light-condensing gallium arsenide solar cell in high-power light-condensing application can be effectively solved.

The present invention relates to a device (V) for measuring surface properties of wafers, comprising: a light source (1) which is adapted to output a directed light beam; a detector arrangement (2) which is adapted to detect an azimuthal scattering characteristic (asymmetry of the scattering), an orientation of the emission characteristic in the forward direction (also backscattering) and a zenith scattering, which arise when the light beam is incident on the wafer (W); a wafer holder (3) on which a wafer can be mounted; and an evaluation unit (4). The invention also relates to a corresponding method. The device and method are used in particular to detect COPs (crystal originated pits) and particles on the wafer surface in a sufficiently sharply separated manner and to determine the size thereof.

The present application relates to a semi-insulating gallium arsenide single crystal and its manufacturing method and growth device, the manufacturing method of which includes the steps of: putting a crystal raw material into a PBN crucible, moving it into a quartz crucible, placing graphite in a quartz cap, and then sealingly connecting it with the quartz crucible (S1); loading it into a VGF single crystal furnace after sealing and connecting it, and the quartz cap and the quartz crucible are in different temperature zones (S2); and raising the temperature of the temperature zone where the quartz crucible is located to the melting temperature, while simultaneously raising the temperature of the temperature zone where the quartz cap is located to 1000±50°C (S3). The present application discloses a semi-insulating gallium arsenide single crystal and a manufacturing method and growth apparatus thereof, which include steps S3, S4, S5, S6, and S7, in which the temperature zone where the quartz cap is located is controlled to drop to 1000°C±50°C, and the temperature is maintained, doped with the atmosphere, and the crystal is grown. The method of the present application can effectively improve the amount of carbon doping inside the gallium arsenide crystal and the uniformity of the electrical properties.

A semiconductor stack includes a substrate formed of silicon, an oxide buffer layer formed of any one of zirconia, hafnia, and composite oxides of zirconia and hafnia, an alignment layer formed of gallium arsenide, and a compound semiconductor layer formed of a III-V compound semiconductor. The substrate, the oxide buffer layer, the alignment layer, and the compound semiconductor layer are stacked in this order.

The utility model provides a gallium arsenide LED epitaxial structure and an LED chip. The gallium arsenide LED epitaxial structure comprises a gallium arsenide substrate; the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the surface of one side of the substrate; wherein a composite buffer layer is arranged between the gallium arsenide substrate and the N-type semiconductor layer; the composite buffer layer comprises a first GaAs buffer layer, a defect growth layer and a defect stop layer which are sequentially arranged on the surface of the gallium arsenide substrate, the defect growth layer is used for expanding crystal defects of the first GaAs buffer layer, and the defect stop layer stops growth of the crystal defects by changing the growth direction of the crystal defects. On the basis of the arrangement, crystal defects such as epitaxial layer dislocation, stacking defects and the like and even slippage which are formed by taking scratches, defects and the like on the surface of the gallium arsenide substrate as starting points can be effectively avoided, the crystal growth quality is improved, and meanwhile, the cost is slightly increased. And the method is particularly suitable for high-power LEDs and small-size (such as Mini and Micro) LEDs.

The application discloses a method for simultaneously obtaining rigid solar cells and flexible solar cells by one epitaxial process, and can obtain a high-performance rigid three-junction gallium arsenide solar cell and a high-performance flexible gallium arsenide three-junction / double-junction solar cell from a single germanium wafer through one epitaxial process. The single expensive epitaxial growth process can simultaneously produce two complete high-performance multi-junction cells, greatly reduces the epitaxial cost, and improves the material utilization efficiency and production efficiency. Since the substrate reuse mode is not used, the epitaxial substrate quality is excellent and controllable, and the quality and epitaxial cost are double optimized.

The application relates to a manufacturing method for preventing pollution caused by cutting of a gallium arsenide-based LED tube core out-of-plane electrode, and belongs to the technical field of semiconductor processing. The method steps are as follows: (1) placing a thinned wafer on a bearing disc, and pressing the wafer by using a tablet of the bearing disc; (2) respectively installing spring clamps on tray holes at opposite positions of the bearing disc, and pressing the wafer on the bearing disc by using the spring clamps; (3) placing the bearing disc and a planet carrier self-provided at the lower side of the bearing disc in a chamber of an evaporation device, rotating the planet carrier, and performing evaporation operation after determining that the wafer is stably installed. The application assists the bearing disc in pressing the wafer by using the separately designed spring clamps, only a very small area needs to be shielded during use, wafer scratches are avoided, wafer warping is avoided, pollution in the wafer evaporation process is reduced, and the out-of-plane electrode leakage after the evaporation is reduced.

This invention discloses a near-infrared metasurface perfect absorber for thermionic photoelectric conversion. The absorber includes a silicon dioxide substrate, on which a rectangular array of chromium material is arranged. Four layers of cylinders are stacked on each rectangular unit. The four cylinders all have a radius R and a height H1. The materials of the four cylinders, from bottom to top, are silicon, magnesium fluoride, chromium, and gallium arsenide, respectively. The period P of the rectangular array is consistent with the side length of the rectangular unit. After parameter optimization, an average absorption of 0.923 is achieved in the wavelength range of 800nm ​​to 1800nm, and a maximum absorption of 0.991 is achieved at a wavelength of 1100nm.

The utility model relates to a gallium arsenide wafer transfer device, top ends of frame bodies of two brackets are provided with clamping grooves used for clamping gallium arsenide wafers, top ends of insulating transfer boxes are provided with positioning grooves used for positioning a fixing device, and bottom ends of a bottom plate are provided with springs used for buffering the bottom plate. The top end of the fixing assembly is fixedly provided with a cover plate assembly used for driving the fixing assembly to tightly cover and fix the gallium arsenide wafer. A plurality of gallium arsenide wafers can be placed in the clamping grooves in the bracket; the positioning blocks on the cover plate are controlled to be clamped into the positioning grooves through the grooves, so that the adjacent gallium arsenide wafers can be blocked by the partition plates, and meanwhile, the gallium arsenide wafers are tightly covered and sealed by the fixing plates; therefore, the gallium arsenide wafer is prevented from being damaged due to the fact that the gallium arsenide wafer shakes in the process of transferring the gallium arsenide wafer by using the insulating transfer box.

The application discloses a precision-adjustable wideband temperature compensation circuit based on a gallium arsenide process and relates to the technical field of integrated circuits.The circuit comprises a temperature compensation driving module, a temperature compensation attenuation module and a temperature compensation precision control logic module.The temperature compensation driving module senses environmental temperature changes through a clamping circuit and a differential network and outputs an analog control voltage.The temperature compensation attenuation module comprises a plurality of parallel controllable attenuation units, each of which comprises two series-connected transistors, and the on-off of each controllable attenuation unit is controlled by a switch signal of the control logic module and the attenuation amount of each controllable attenuation unit is controlled by an analog voltage of the driving module.The control logic module controls the conduction of different numbers of attenuation units by receiving an external TTL signal, so that the multi-gear adjustment of the overall temperature compensation precision is realized.The application overcomes the shortcomings of the traditional temperature compensation circuit, such as unadjustable precision and narrow frequency band, and has the advantages of wide working frequency band, adjustable temperature compensation precision, compact structure and easy integration, and is suitable for high-performance millimeter wave communication systems.

The invention relates in particular to a method for producing a device comprising at least two thin layers and intended for use in particular in the fields of optoelectronics and photovoltaics, said method comprising the following steps: supplying a silicon (c-Si) wafer (2), loading said silicon (c-Si) wafer (2) into a first reactor to produce a thin layer of germanium (Ge) (3) by plasma-assisted chemical vapor deposition, optionally with a silicon (Si) gradient in the first few nanometers, so as to obtain an intermediate device, loading said intermediate device into a second reactor, then deposition and growth by epitaxy of a thin layer of gallium arsenide (GaAs) (4) by remote plasma chemical vapor deposition (RP-CVD). Figure for the abstract: [Fig. 1]

A gallium arsenide single-crystal substrate has a main surface of circular shape and has a first integrated intensity ratio, a second integrated intensity ratio, a third integrated intensity ratio, a fourth integrated intensity ratio and a fifth integrated intensity ratio, wherein the second integrated intensity ratio is 0.9 or more and 1.05 or less, both the third integrated intensity ratio and the fourth integrated intensity ratio are 1.0 or less, the fifth integrated intensity ratio is 0.8 or less and a ratio of the first integrated intensity ratio to the second integrated intensity ratio is 0.5 or more and 1 or less.

The invention belongs to the technical field of solar cells, and particularly relates to an amorphous carbon / gallium arsenide double-junction solar cell and a preparation method thereof. The solar cell provided by the invention comprises a lower electrode, a substrate, a buffer layer, a lower cell, a tunnel junction, an upper cell, a transparent conductive layer, an antireflection layer and an upper electrode which are stacked in sequence, the lower cell is a GaAs homojunction and comprises a p-type GaAs layer and an n-type GaAs layer which are stacked, the p-type GaAs layer is in contact with the buffer layer, and the n-type GaAs layer is in contact with the tunnel junction; the upper battery is of an amorphous carbon structure and comprises a p-type amorphous carbon layer and an n-type amorphous carbon layer which are arranged in a stacked mode, the p-type amorphous carbon layer is in contact with the tunnel junction, and the n-type amorphous carbon layer is in contact with the transparent conducting layer. The amorphous carbon / gallium arsenide double-junction solar cell provided by the invention has the advantages of low production cost, wide spectrum coverage, good stability and few interface defects.

The invention discloses an adaptive bias broadband high-power amplifier, and relates to the technical field of radio frequency integrated circuits. The amplifier comprises an active self-adaptive bias module, an amplifier driving stage module, an inter-stage high-coupling-coefficient transformer matching network module, an amplifier power stage module and a high-power electrostatic discharge output matching common module. Through the active self-adaptive bias module, the interstage high-coupling-coefficient transformer matching network module and the high-power electrostatic discharge output matching common module, combined innovation of self-adaptive bias, broadband and electrostatic discharge multiplexing of the high-power amplifier is realized; a high-power amplifier with the performance superior to that of a traditional gallium arsenide process and the cost directly close to that of a CMOS is realized on a silicon-based platform, and a core technical support is provided for a 5G / 6G radio frequency chip.

This invention relates to the field of solar cell technology, specifically to a space-grade gallium arsenide solar cell with a carbon electrode and its fabrication method. The gallium arsenide solar cell, from top to bottom, comprises an antireflection coating, a metal top electrode, a triple-junction GaAs epitaxial layer, and a composite carbon-based back electrode. The composite carbon-based back electrode, from top to bottom, comprises a MoO3 ultrathin interface layer, a V2C MXene current transport layer, and a graphite / carbon black / composite conductive binder composite layer. This solar cell, using a carbon-based electrode as the back electrode, exhibits low cost, high power-to-weight ratio, high conductivity, and high stability, making it suitable for extreme space environments.

The invention provides an efficient thin-film gallium arsenide solar cell and a preparation method thereof. The solar cell at least comprises a gallium arsenide substrate, a GaAs nucleating layer, a GaInP corrosion barrier layer, a lattice gradient buffer module, a GaInAs cap layer, an AlGaInP top cell, an AlGaInAs / AlGaInP tunnel junction, a GaInAs bottom cell and a GaInAs back cap layer which are sequentially distributed in the thickness direction of the solar cell. The AlGaInP top battery comprises an (AlGa) 1-bInbP emitter region layer and an (AlGa) 1-cIncP base region layer, b is greater than or equal to 0.4 and less than or equal to 1, and c is greater than or equal to 0.4 and less than or equal to 1; the GaInAs bottom cell comprises a Ga1-dIndP emitter region layer and a Ga1-eIneAs base region layer, 0.4 < = d < = 1, and 0.01 < = e < = 0.5. Through band gap optimization and addition of the lattice gradient buffer module, the photoelectric conversion efficiency of the two-junction gallium arsenide solar cell is improved, the typical efficiency of the two-junction solar cell is improved to 30% from 25%-26% at present, the performance index is directly benchmarked with a mainstream three-junction solar cell, and the efficiency of the two-junction gallium arsenide solar cell is greatly improved. And a competitive technical scheme is provided for the application of high-performance and low-cost solar cells.