223 results about "Gallium arsenide" patented technology

The invention discloses a multi-turn memory optomagnetic encoder hybrid system, belongs to the technical field of position and angle measurement encoders, and aims at solving the problems that an existing optomagnetic hybrid encoder is complex in signal processing, long in axial length, insufficient in precision stability and prone to losing the number of turns and the position. The system comprises an optical encoder, a gallium arsenide magnetic signal acquisition sensor, a multi-antipode unequal magnetic ring, a processor, a hardware circuit, an ultra-low power consumption circuit, a signal acquisition module, a signal processing module and the like, integrates self-developed magnetic angle analysis, turn number memory correction and other algorithms, and adopts dual-redundancy design and intelligent signal mode switching. The method simplifies the signal processing flow, shortens the axial length, improves the measurement precision and stability, enhances the environmental adaptability and fault-tolerant capability, prolongs the endurance, and is suitable for the position angle measurement in a high-precision and severe environment.

A shield trench power device such as a trench MOSFET or IGBT includes a substrate or an epitaxial layer of silicon, silicon carbide, gallium nitride, or gallium arsenide and employs an in-trench structure including a gate structure and an underlying polysilicon or oxide shield region that contacts a shield region in an epitaxial or crystalline layer of the device. The poly silicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.

Methods and wafers for vertical gradient freeze 8 inch gallium arsenide (GaAs) substrates. In disclosed examples, vertical gradient freeze systems for forming gallium arsenide (GaAs) substrates having silicon as a dopant, the system includes a crucible to contain a GaAs liquid melt and seed material during a formation process; one or more heating coils arranged in a plurality of heating zones; and a pedestal to move relative to the crucible, the system operable to control heating of the plurality of heating zones and movement of the pedestal to form a single crystal GaAs substrate.

The present invention belongs to the field of electromagnetic functional devices, and specifically relates to a fin-line terahertz multi-phase shifter based on a gallium arsenide diode, comprising: a rectangular waveguide input port, a substrate, a rectangular waveguide-fin-line transition structure, a fin-line structure, a probe-type microstructure phase shifter unit, its feeding opening portion, a fin-line-rectangular waveguide transition structure, and a rectangular waveguide output port. The present invention addresses the problems of the existing terahertz wave phase modulator having few phase shifting technical solutions, large insertion loss during phase shifting, a small phase shift range, a large device size, and low integrability. By controlling the on-off of the diode on the probe-type microstructure phase shifter unit by voltage, the perturbation intensity of the probe on the fin line is changed, so that the equivalent dielectric constant of the fin line changes, thereby achieving the phase shift of the terahertz wave; then, by superimposing the phase shifters in a centrally symmetrical and parallel arrangement, a low-insertion-loss multi-bit terahertz wave phase shift is finally achieved, ensuring a good working state and promoting the development of terahertz phase control technology.

The invention discloses a photoconductive switch, a manufacturing method and a high-voltage-resistant picosecond electric pulse device, relates to the technical field of semiconductor devices and can also be applied to the field of microelectronics, and the photoconductive switch comprises a substrate layer, and a low-temperature gallium arsenide layer, a top insulating layer and a top electrode layer which are sequentially stacked on the substrate layer, wherein the top electrode layer comprises a first pin and a second pin, and the first pin and the second pin are embedded into the low-temperature gallium arsenide layer through the top insulating layer. According to the technical scheme, the electrode with a certain depth is embedded into the gallium arsenide growing at low temperature, so that the current density can be reduced, and the heat dissipation performance and the voltage resistance of the photoconductive switch are enhanced.

The invention discloses an intermediate frequency filter chip based on a gallium arsenide IPD process, which adopts the GaAs IPD process with three metal layers and comprises six resonators, twelve capacitors and three metalized grounding holes. The six resonators are composed of capacitors C1-C6 and inductors L1-L6 which are connected in series / in parallel, the inductors are all of self-built octagonal structures, and wiring is only conducted on the middle layer and the uppermost metal layer; a branch series capacitor Ca-Cc and a main parallel capacitor Cd-Cf respectively form six transmission zeros outside a low-frequency band and a high-frequency band. According to the invention, the characteristics of small size and wide band of the filter chip are realized, the loss is reduced, the in-band flatness is improved, and the filter chip has high frequency selectivity and high out-of-band rejection capability.

According to the pressing plate type spraying process for the high-precision semiconductor equipment, through innovative combination of an intelligent dynamic pressing plate and a pulse alternating spraying mechanism, nanoscale deposition precision control is achieved. The process comprises the following steps: performing plasma activation on the surface of a substrate; scanning the surface topological structure by using a pressure control array driven by the MEMS; a partition pressure distribution diagram and spraying parameters are generated; heating the substrate to a preset temperature; the intelligent dynamic pressing plate is controlled to make contact with the substrate; starting a pulse spraying system; monitoring in real time and dynamically adjusting parameters; and releasing the pressure and cooling after the preset film thickness is reached. According to the process, a pressure control point array with the density of 64 / cm < 2 > is adopted. According to the method, the film thickness control precision (+ / -1 angstrom), the surface uniformity (99.8%) and the material utilization rate (gt; the method is suitable for high-end application scenes of various semiconductor materials such as silicon-based integrated circuits, gallium arsenide devices and silicon carbide power devices, and the key bottleneck problem of a traditional spraying technology is solved.

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.

The invention discloses a three-junction gallium arsenide solar cell with a quantum dot structure and a manufacturing method of the three-junction gallium arsenide solar cell, belongs to the technical field of semiconductor photovoltaics, and aims to solve the problems that a quantum dot cell is large in stress and has many defects, and voltage and current are difficult to consider at the same time. According to the core technical scheme, in a middle battery base region, a GaAsP stress compensation layer is grown above an InGaAs quantum dot base region with gradient decreasing In components. The gradient quantum dots are used for enhancing long-wave absorption to improve short-circuit current; the open-circuit voltage of the GaAsP layer is increased by utilizing the wide forbidden band characteristic, the thickness of the GaAsP layer is accurately controlled, and the compressive stress of the quantum dot region is balanced by the introduced tensile stress. According to the stress balance design, material defects are greatly reduced, the crystal quality is improved, synchronous boosting of short-circuit current and open-circuit voltage is finally achieved on the basis of high reliability, and the overall efficiency of the battery is remarkably improved.

The invention provides a method for heteroepitaxial growth of a gallium arsenide material on silicon by introducing laser surface treatment. The method comprises the following steps: growing a gallium arsenide low-temperature layer with a low crystallization degree on a silicon substrate, and crystallizing the surface layer of the gallium arsenide low-temperature layer by adopting a laser surface treatment mode; growing a gallium arsenide medium-temperature layer on the gallium arsenide low-temperature layer after the surface layer crystallization treatment, and purifying the surface layer crystalline state of the gallium arsenide medium-temperature layer by adopting a laser surface layer treatment mode; and growing a gallium arsenide high-temperature layer on the gallium arsenide medium-temperature layer after the surface layer crystalline state purification treatment. Under the condition that the crystallization degree of the whole gallium arsenide epitaxial layer is reserved, the crystallization degree of the local part, namely the upper surface of the epitaxial layer, is improved, the inhibition effect on dislocation is enhanced, and the optimization of the crystal quality of the whole epitaxial structure is realized. The dislocation penetrating to the surface of the whole epitaxial structure during heteroepitaxial growth of the gallium arsenide material on the silicon substrate is remarkably reduced, and a brand new way is opened up for preparing semiconductor photoelectric devices.

The invention provides a photoconductive switch of a comb electrode, which comprises a semi-insulating gallium arsenide substrate layer, a low-temperature gallium arsenide layer and an insulating protective layer, and is characterized in that the low-temperature gallium arsenide layer is formed on the semi-insulating gallium arsenide substrate layer, and the insulating protective layer is arranged on the low-temperature gallium arsenide layer; a switch anode and a switch cathode are respectively formed on the inner side of the low-temperature gallium arsenide layer surface insulation protection layer; a comb-shaped electrode is arranged on the surface of the low-temperature gallium arsenide layer and located at the switch anode. According to the invention, by arranging the comb-shaped electrode structure, a plurality of comb-tooth electrodes which are distributed in a staggered manner are formed in the electrode region, so that the action area of incident light and a semiconductor active region is increased under an illumination condition, and generation and collection of photon-generated carriers are facilitated; meanwhile, the distribution state of an electric field near the electrode is improved, and the possibility of local electric field concentration is reduced; in addition, a low-temperature gallium arsenide material is adopted as the photoconductive layer, the service life of a current carrier is short, and the device is suitable for photoelectric trigger application scenes with requirements for response speed and stability.

A method for dry etching to fabricate an AlGaAs optical waveguide is provided. The method includes steps as follows: providing at least one AlGaAs-on-insulator substrate(100) which comprising a substrate layer(102), a buried layer(104) formed over the substrate layer(102), a bonding interlayer(106) formed over the buried layer(104), and an AlGaAs layer(108) formed over the bonding interlayer(106), forming a hardmask film (110)on the AlGaAs layer(108), forming a photoresist film (112)on the hardmask film(110), transferring a pattern to the photoresist film(112), etching the hardmask film(110) to transfer the pattern from the photoresist film(112) to the hardmask film(110), and etching the AlGaAs layer(108) using ICP-RIE with Ar plasma to form a waveguide structure having a trapezoidal-shaped upper portion with positive slope sidewalls and a horizontally extending lower portion for the AlGaAs layer(108), wherein only physical bombardment of Ar + ions is applied to the AlGaAs layer(108) to pattern the waveguide structure.

The invention discloses a nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter and a control method, and belongs to the field of terahertz devices. The nonlinear quasi bound state terahertz non-magnetic regulation non-reciprocal transmitter is formed by periodically arranging and splicing a plurality of unit structures, and each unit structure comprises a silicon carbide substrate and a cylindrical groove gallium arsenide cylinder with the same outer diameter and different inner diameters. The non-linearity of the gallium arsenide material is combined with the asymmetry of the gallium arsenide cylindrical unit structures of the cylindrical grooves with the same outer diameter and different inner diameters, and the non-reciprocal transmission intensity of the terahertz waves is adjusted by changing structural parameters, so that the non-reciprocal transmission regulation and control of the terahertz waves are realized. The nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device designed by the invention is simple in structure, terahertz wave transmission can be regulated only by changing the incident power of terahertz waves without additionally arranging bias mechanisms such as an external magnetic field, electricity, light, a heat source and the like, and the nonlinear quasi-bound-state terahertz non-magnetic regulation non-reciprocal transmission device is suitable for a future terahertz integrated system.

The present invention discloses a novel high-isolation, low-insertion-loss switch matrix chip, comprising a switch matrix circuit disposed on a gallium arsenide (GaAs) pHEMT (Phe) semiconductor circuit layer. The switch matrix circuit comprises m input terminals, m switch structures, a vertical transition structure, n power dividers, and n output terminals. The vertical transition structure is configured as a coplanar waveguide. The input terminals are electrically connected to the signal input terminals of the switch structures, the signal output terminals of the switch structures are electrically connected to the vertical transition structure and the signal input terminals of the power dividers, the signal output terminals of the vertical transition structure are electrically connected to the signal input terminals of the power dividers, and the signal output terminals of the power dividers are electrically connected to the output terminals. A highly integrated switch matrix chip is achieved using a GaAs pHEMT process. The switch matrix chip integrates multiple switches and power dividers, along with a high-isolation vertical transition structure, achieving high isolation and low loss.

The application provides an imaging method and device for an arterial wall structure, a soliton light source signal is obtained by preprocessing a laser signal, the soliton light source signal is emitted to a microscopic imaging system, a first target position of a target object is scanned and imaged by the microscopic imaging system, and a third harmonic image and a three-photon fluorescence image are obtained. According to the technical scheme, the soliton light source signal of a specific wavelength is obtained by preprocessing the laser signal in advance, the soliton light source signal has better adaptability to a marker (stronger excitation characteristic), the imaging quality of the third harmonic image and the three-photon fluorescence image after imaging of the microscopic imaging system is improved, direct visualization and easy resolution of different layers of the arterial wall structure are achieved, and the microscopic imaging system configured with a gallium arsenide photomultiplier tube and a gallium arsenic phosphor photomultiplier tube is used, two-channel acquisition is adopted to realize twice scanning and imaging of the first target position of the target object, and the number of obtained image details is ensured.

The invention relates to the technical field of radio frequency devices, in particular to an amplitude limiter circuit structure integrated with a filtering function by a gallium arsenide process, and the circuit sequentially comprises a 50-ohm microstrip input matching section, a first-stage amplitude limiting filtering unit, a second-stage amplitude limiting filtering unit and an output matching section along a main transmission line, in the first stage, three forward PIN diodes and three reverse PIN diodes are stacked and connected to a main circuit in parallel, high power tolerance and symmetrical amplitude limiting capacity are achieved, and two low-frequency transmission zero points are formed by fusing a micro-strip grounding branch knot and an MIM capacitor resonator; in the second stage, two anti-parallel PIN diodes are matched with a grounding inductor to form a third transmission zero point, three groups of resonant structures are integrated, six transmission zero points are introduced, the filtering performance in a 12-18GHz frequency band is remarkably enhanced, a PIN diode parasitic capacitor and a microstrip inductive structure are skillfully utilized by the circuit to cooperatively realize filtering, extra passive elements are not needed, and the cost is low. The method is suitable for integrated protection of sensitive devices in a high-frequency radar and communication system.

The invention relates to a high-reliability quaternary infrared chip with a vertical structure and a preparation method of the high-reliability quaternary infrared chip with the vertical structure, and the high-reliability quaternary infrared chip with the vertical structure comprises a multi-quantum well active region, a P electrode, a spacer layer, an N-type wide-band-gap coating layer, an N-type gallium arsenide substrate, an N electrode and a passivation layer, the P electrode is arranged above the multi-quantum well active region, and the spacer layer is arranged above the N-type wide-band-gap coating layer. The spacer layer is arranged below the multi-quantum well active region, the N-type wide-band-gap coating layer is arranged below the spacer layer, the N-type gallium arsenide substrate is arranged below the N-type wide-band-gap coating layer, the N electrode is arranged below the N-type gallium arsenide substrate, and the passivation layer coats the upper part of the multi-quantum well active region and the lower part of the side edge of the P electrode. According to the four-element infrared chip, all chips can be detected, defective products can be removed at the chip end, and the packaging yield can be guaranteed. Through the passivation layer, the quaternary infrared chip can effectively isolate moisture, smudginess and silver paste in the packaging process, and the packaging reliability is improved.

The invention relates to a low-cost metal substrate thin film gallium arsenide solar cell and a preparation method thereof. The solar cell sequentially comprises an antireflection film and an upper metal electrode from top to bottom, the gallium arsenide epitaxial layer grows in an inverted mode; evaporating a metal titanium layer; evaporating a metal chromium layer; evaporating a metal nickel layer; and electroplating a metal nickel or nickel alloy layer. The preparation method comprises the steps of flip epitaxial growth, stress balance metal transition layer evaporation, metal substrate electroplating, temporary substrate bonding, original GaAs substrate removal and thin film solar cell device technology. The metal substrate thin film gallium arsenide solar cell prepared by the invention adopts cheap titanium, chromium, nickel and other metal materials and an electroplating method, and has the advantages of stress matching, low cost, light weight and the like compared with the existing thin film gallium arsenide solar cell.

The invention provides a K-band receiving component chip circuit device, which belongs to the technical field of radio frequency integrated microsystems and comprises a gallium arsenide low-noise amplification circuit and a silicon-based amplitude-phase multifunctional circuit. The gallium arsenide low-noise amplification circuit is located at the front end of the receiving link; the silicon-based amplitude-phase multifunctional circuit comprises a driving amplification circuit, a numerical control attenuation circuit, a numerical control phase shift circuit and a power distribution circuit. The output end of the gallium arsenide low-noise amplification circuit is connected with the input end of the driving amplification circuit, the output end of the driving amplification circuit is connected with the input end of the numerical control attenuation circuit, the output end of the numerical control attenuation circuit is connected with the input end of the driving amplification circuit, and the output end of the driving amplification circuit is connected with the input end of the numerical control phase shift circuit. The output end of the numerical control phase shift circuit is connected with the input end of the power distribution circuit, and the output end of the power distribution circuit is connected with the COM end. According to the invention, a complex circuit is simplified, the occupation of large-scale simulation on resources is reduced, the simulation time is shortened, and different K-band scenes are adapted.

A gallium arsenide single-crystal substrate is a gallium arsenide single-crystal substrate with a circular main surface, wherein an average value of a dislocation density of the main surface 5 cm -2 or more and 100 cm -2 or less, and in an imaginary lattice formed by laying out squares with a side length of 2 mm on the main surface such that a maximum number of the squares are arranged next to each other without overlapping, a ratio of the number of squares in which no dislocation is present to the total number of squares forming the lattice is 97.0% or more and 99.5% or less, wherein the gallium arsenide single-crystal substrate contains silicon, wherein the silicon concentration is 1.0 × 10 18 cm -3 or more and 5.0×10 19 cm -3 or less, and a carrier concentration of the gallium arsenide single crystal substrate of 1.0×10 18 cm-3 or more and 4.0×10 18 cm -3 or less.

The invention discloses a half adder based on a vanadium dioxide and gallium arsenide metasurface, and belongs to the technical field of terahertz communication modulation. The multi-layer structure is composed of a gold substrate, a cycloolefin copolymer dielectric layer and a gold-gallium arsenide-vanadium dioxide top layer pattern. Based on the principle of a metamaterial absorber, the metasurface designed by the invention has the function of a half adder, and a new thought is provided for the design of a terahertz multifunctional logic device in the future.

A non-volatile memory element with a Schottky diode. The non-volatile memory element comprises: an insulating layer for electrical insulation; a Schottky diode formed on the insulating layer as a single crystal semiconductor layer, the material of which can be silicon, germanium, hexagonal boron nitride, or gallium arsenide; a conductive write wire electrically connected to the front end of the Schottky diode; a memory cell located on the Schottky diode and electrically connected to the rear end of the Schottky diode; and a select wire located on the memory cell and electrically connected to the memory cell. When data is selected for writing into the non-volatile memory element, a current flows through the Schottky diode to write the data into the memory cell.

There is provided a positron source (10; 1000) for generating a positron beam (180), wherein the positron source (10; 1000) includes: a laser arrangement (50) configured to generate a pulsed beam (70) of photons; a target (30) configured to receive the beam (70) of photons, wherein the target (30) is arranged for the photons of the beam (70) to generate a photon plasma at a surface layer (40) of the target (30), wherein the surface layer (40) is configured to preferentially absorb electrons from the photon plasma to generate corresponding free positrons; and an electrode arrangement (160) comprising one or more electrodes (160A, 160B, 160C) that are configured to apply an electric field to the photon plasma to extract the free positrons therefrom and to guide the positrons to form the positron beam (180). At least the target (30) and the electrode arrangement (160) are included within a vacuum chamber (20) configured in use to provide a vacuum condition in which the target (30) and the electrode arrangement (160) are arranged to function. Optionally, the surface layer (40) is configured to include a doped semiconductor material for providing the surface layer (40). More optionally, the doped semiconductor includes at least one of: p-doped Silicon, p-doped Gallium Arsenide, p-doped Graphene, Graphene, p-doped Silicon Carbide.

The invention discloses a flexible thin film gallium arsenide assembly capable of replacing single battery strings, and belongs to the technical field of solar batteries. In a vacuum environment and under a certain pressure, gallium arsenide solar cell strings are laminated and packaged, and positive and negative electrodes are welded and led out through high-temperature wires; the base film with the two ends laid with the copper foils is packaged, and the copper foils are welded and led out through welding high-temperature wires; laying the laminated and packaged gallium arsenide solar cell string assembly on a base film, and carrying out hot press molding through a hot melting film; and crimping the high-temperature lead of the gallium arsenide solar cell string assembly with the high-temperature lead of the base film. When a single string is replaced, the battery string needing to be replaced is cut off, and the battery string which is laminated and packaged again is adhered and cured on the base film by using silicon rubber to complete replacement.

The application discloses a kind of perfect cutoff absorber of metasurface based on nano round structure, adopt nanometer cylinder and ring array grown on silicon dioxide, two groups of ring structure are respectively selected using dielectric material gallium arsenide and silicon.Optimizing structure parameter, wavelength from ultraviolet to mid-infrared, 0.913 average absorption is realized in absorption band 100-710nm, and average absorption is only 0.02 in non-absorption band 1260nm-20μm wave band.ER is 9.6dB, ED is 0.81, and CS is 0.0015nm ‑1 The perfect cutoff absorber provided by the application has exactly this spectral selectivity, which provides an effective method for designing ideal solar heat absorber, which has important application in the field of renewable energy, such as solar thermal photovoltaic and solar thermal energy application.

The invention discloses a concentrating cell module and a preparation method thereof, and the concentrating cell module comprises a concentrating gallium arsenide solar cell, a buffer layer, a first silver-gold plating layer, a front copper foil, a substrate, a back copper foil, a nickel plating layer, a palladium plating layer and a gold plating layer, and the front copper foil and the back copper foil are respectively arranged on the front side and the back side of the substrate. A nickel plating layer, a palladium plating layer and a gold plating layer are sequentially plated on the back face of the back copper foil, a first silver-gold plating layer is plated on the front face of the front copper foil, a cell fixing area is preset on the front face of the front copper foil, a buffer layer is plated on the back face of the light-gathering gallium arsenide solar cell, and the buffer layer is a second silver-gold plating layer or a gold-tin plating layer. The light-gathering gallium arsenide solar cell is placed in the cell fixing area, the positive electrode of the light-gathering gallium arsenide solar cell is connected with the positive electrode of the front copper foil, and the negative electrode of the light-gathering gallium arsenide solar cell and the negative electrode of the front copper foil are conducted through resistance welding. According to the invention, the problem of poor heat dissipation performance of the light-condensing gallium arsenide solar cell in high-power light-condensing application can be effectively solved.

The present invention relates to a device (V) for measuring surface properties of wafers, comprising: a light source (1) which is adapted to output a directed light beam; a detector arrangement (2) which is adapted to detect an azimuthal scattering characteristic (asymmetry of the scattering), an orientation of the emission characteristic in the forward direction (also backscattering) and a zenith scattering, which arise when the light beam is incident on the wafer (W); a wafer holder (3) on which a wafer can be mounted; and an evaluation unit (4). The invention also relates to a corresponding method. The device and method are used in particular to detect COPs (crystal originated pits) and particles on the wafer surface in a sufficiently sharply separated manner and to determine the size thereof.

The present application relates to a semi-insulating gallium arsenide single crystal and its manufacturing method and growth device, the manufacturing method of which includes the steps of: putting a crystal raw material into a PBN crucible, moving it into a quartz crucible, placing graphite in a quartz cap, and then sealingly connecting it with the quartz crucible (S1); loading it into a VGF single crystal furnace after sealing and connecting it, and the quartz cap and the quartz crucible are in different temperature zones (S2); and raising the temperature of the temperature zone where the quartz crucible is located to the melting temperature, while simultaneously raising the temperature of the temperature zone where the quartz cap is located to 1000±50°C (S3). The present application discloses a semi-insulating gallium arsenide single crystal and a manufacturing method and growth apparatus thereof, which include steps S3, S4, S5, S6, and S7, in which the temperature zone where the quartz cap is located is controlled to drop to 1000°C±50°C, and the temperature is maintained, doped with the atmosphere, and the crystal is grown. The method of the present application can effectively improve the amount of carbon doping inside the gallium arsenide crystal and the uniformity of the electrical properties.

A semiconductor stack includes a substrate formed of silicon, an oxide buffer layer formed of any one of zirconia, hafnia, and composite oxides of zirconia and hafnia, an alignment layer formed of gallium arsenide, and a compound semiconductor layer formed of a III-V compound semiconductor. The substrate, the oxide buffer layer, the alignment layer, and the compound semiconductor layer are stacked in this order.

Provided is a gallium arsenide single crystal substrate having a main surface having a circular shape and having a first integrated intensity ratio, a second integrated intensity ratio, a third integrated intensity ratio, a fourth integrated intensity ratio, a fifth integrated intensity ratio, and a sixth integrated intensity ratio, the third integrated intensity ratio being 1.05-1.2, and the sixth integrated intensity ratio being 1.05-1.2. The fourth integrated intensity ratio, the fifth integrated intensity ratio, and the sixth integrated intensity ratio are all 0.9 or more, and the ratio of the first integrated intensity ratio to the third integrated intensity ratio is 0.9-1.3 (inclusive). The ratio of the fourth integrated intensity ratio to the first integrated intensity ratio, the ratio of the fifth integrated intensity ratio to the second integrated intensity ratio, and the ratio of the sixth integrated intensity ratio to the third integrated intensity ratio are all 0.7-1.1.