331 results about "Gallium arsenide" patented technology

The invention belongs to the technical field of integrated circuit packaging, and particularly relates to a resin-based gallium arsenide radio frequency chip fan-out packaging method. Comprising the following steps: using a temporary bonding support plate as a slide glass; coating photolysis temporary bonding glue on the slide glass in a spin coating mode, curing the photolysis temporary bonding glue, and then protecting the temporary bonding glue on the front surface by using a metal protection layer; bonding the back surfaces of the two heterogeneous gallium arsenide radio frequency chips to the front surface of the metal protection layer through a bonding layer; using a wafer-level plastic packaging process to package and wrap the two heterogeneous gallium arsenide radio frequency chips so as to form a first plastic packaging layer; performing laser or mechanical punching on the first plastic package layer to expose the metal protection layer so as to form a first plastic package through hole; and filling the first plastic package through hole to form a filler. According to the invention, the manufacturing cost of the chip is reduced, the miniaturization of the size of the chip is realized, the heat dissipation of the chip can be effectively enhanced by the high-heat-dissipation conductive layer on the back surface, and the performance of a system is improved.

The invention discloses a multi-turn memory optomagnetic encoder hybrid system, belongs to the technical field of position and angle measurement encoders, and aims at solving the problems that an existing optomagnetic hybrid encoder is complex in signal processing, long in axial length, insufficient in precision stability and prone to losing the number of turns and the position. The system comprises an optical encoder, a gallium arsenide magnetic signal acquisition sensor, a multi-antipode unequal magnetic ring, a processor, a hardware circuit, an ultra-low power consumption circuit, a signal acquisition module, a signal processing module and the like, integrates self-developed magnetic angle analysis, turn number memory correction and other algorithms, and adopts dual-redundancy design and intelligent signal mode switching. The method simplifies the signal processing flow, shortens the axial length, improves the measurement precision and stability, enhances the environmental adaptability and fault-tolerant capability, prolongs the endurance, and is suitable for the position angle measurement in a high-precision and severe environment.

A shield trench power device such as a trench MOSFET or IGBT includes a substrate or an epitaxial layer of silicon, silicon carbide, gallium nitride, or gallium arsenide and employs an in-trench structure including a gate structure and an underlying polysilicon or oxide shield region that contacts a shield region in an epitaxial or crystalline layer of the device. The poly silicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.

The present invention relates to a light emitting diode (LED) which comprises multiple point-like conductive electrodes, a dielectric layer, and an epitaxial composite layer. The dielectric layer is disposed around each point-like conductive electrode, and the epitaxial composite layer is disposed both on the point-like conductive electrodes and the dielectric layer. Each point-like conductive electrode includes an ohmic-contact metal layer and a carbon-doped gallium arsenide epitaxial layer. The carbon-doped gallium arsenide epitaxial layer is disposed on the ohmic-contact metal layer and electrically connected to the epitaxial composite layer.

Methods and wafers for vertical gradient freeze 8 inch gallium arsenide (GaAs) substrates. In disclosed examples, vertical gradient freeze systems for forming gallium arsenide (GaAs) substrates having silicon as a dopant, the system includes a crucible to contain a GaAs liquid melt and seed material during a formation process; one or more heating coils arranged in a plurality of heating zones; and a pedestal to move relative to the crucible, the system operable to control heating of the plurality of heating zones and movement of the pedestal to form a single crystal GaAs substrate.

The present invention belongs to the field of electromagnetic functional devices, and specifically relates to a fin-line terahertz multi-phase shifter based on a gallium arsenide diode, comprising: a rectangular waveguide input port, a substrate, a rectangular waveguide-fin-line transition structure, a fin-line structure, a probe-type microstructure phase shifter unit, its feeding opening portion, a fin-line-rectangular waveguide transition structure, and a rectangular waveguide output port. The present invention addresses the problems of the existing terahertz wave phase modulator having few phase shifting technical solutions, large insertion loss during phase shifting, a small phase shift range, a large device size, and low integrability. By controlling the on-off of the diode on the probe-type microstructure phase shifter unit by voltage, the perturbation intensity of the probe on the fin line is changed, so that the equivalent dielectric constant of the fin line changes, thereby achieving the phase shift of the terahertz wave; then, by superimposing the phase shifters in a centrally symmetrical and parallel arrangement, a low-insertion-loss multi-bit terahertz wave phase shift is finally achieved, ensuring a good working state and promoting the development of terahertz phase control technology.

The invention discloses a method for preparing an upper electrode of a gallium arsenide solar cell for a low-cost space, which comprises the following steps of: corroding a gallium arsenide epitaxial wafer taking germanium as a substrate in a mixed acid corrosion solution, removing an oxide layer and pollutants on the surface of the epitaxial wafer, taking out the epitaxial wafer, and cleaning the epitaxial wafer in deionized water; the surface of the active layer of the epitaxial wafer is tightly attached to the metal grid mesh, the epitaxial wafer is put into vacuum evaporation equipment, electrode metal is evaporated layer by layer in an electron beam evaporation mode, and after evaporation is completed, the epitaxial wafer is taken out from the vacuum evaporation equipment when the epitaxial wafer is cooled to 100 DEG C or below; and placing in a vacuum sintering furnace, heating at a constant temperature for a period of time, cooling to below 100 DEG C, and taking out to obtain the space gallium arsenide solar cell top electrode. A traditional photoetching process is replaced by a metal grid mesh, the surface of an active layer of an epitaxial wafer is tightly attached to the metal grid mesh, and then the epitaxial wafer is put into a vacuum coating machine to be subjected to metal evaporation. And the evaporated metal is deposited on the surface of the epitaxial wafer through gaps of the grid mesh to prepare a conductive upper electrode.

Some implementations described herein include an optoelectronic device for a low-lighting application and techniques to form the optoelectronic device. The optoelectronic device includes near infrared light vertical-cavity surface emitting laser devices, near infrared light pixel sensors, and visible light pixel sensors. The near infrared light vertical-cavity surface emitting laser devices and the near infrared light pixel sensor include selectively grown epitaxial materials (e.g., silicon germanium, gallium arsenide, or another type III / V material) that improves a performance of the near infrared light vertical-cavity surface emitting laser devices, near infrared light pixel sensors.

The invention provides a heterojunction type self-powered infrared photoelectric detector based on tellurium-based oxide and a preparation method thereof, the photoelectric detector is a PN junction device with a vertical structure, and the photoelectric detector comprises an N-type semiconductor material, an N-type semiconductor material contact electrode, a P-type semiconductor material and a P-type semiconductor material contact electrode from bottom to top; the N-type semiconductor material is one or more of indium, gallium, zinc oxide, silicon, germanium, gallium arsenide and indium gallium arsenide, the N-type semiconductor material contact electrode is one or more of titanium, aluminum, copper, silver, indium and chromium, the P-type semiconductor material is an amorphous tellurium oxide film, and the P-type semiconductor material contact electrode is one or more of titanium, gold, copper, platinum, palladium and nickel. The heterojunction type self-powered infrared photoelectric detector based on the tellurium-based oxide has the advantages of high sensitivity, high responsivity, high response speed and large-area uniformity, the process cost is extremely low, and the heterojunction type self-powered infrared photoelectric detector is easy to implement.

The invention discloses a quantum dot based on a self-assembly growth technology and a preparation method thereof. The preparation method comprises the following steps: selecting a GaAs substrate, heating to remove an oxide layer and degassing; growing a GaAs (gallium arsenide) buffer layer; raising the temperature, and growing an AlGaAs buffer layer; reducing the temperature of the substrate, and growing a GaAs buffer layer; reducing the temperature of the substrate, modifying the velocity-flow ratio of the V-group elements to the III-group elements in the growth cavity, and growing a layer of InGaAs quantum well; modifying the velocity-flow ratio of the V-group elements to the III-group elements in the growth cavity, growing an InAs material on the quantum well, and forming quantum dots through a self-assembly technology; and raising the temperature, growing an InAlAs stress buffer layer, growing an InGaAs cover layer, and growing a GaAs spacer layer. The stress buffer layer and the composite cover layer are used to reduce the stress on the quantum dots, so that the size of the quantum dots is increased, and finally the required quantum dots with special wavelengths are obtained.

The present invention belongs to the technical field of integrated circuit packaging, and particularly relates to a fan-out packaging method for gallium arsenide radio frequency chips based on a resin base. The method comprises the following steps: using a temporary bonding carrier as a carrier; coating a photodecomposed temporary bonding adhesive on the carrier by spin coating and curing, and then using a metal protective layer to protect the temporary bonding adhesive on the front side; bonding the back sides of two heterogeneous gallium arsenide radio frequency chips to the front side of the metal protective layer through an adhesive layer; using a wafer-level plastic packaging process to plastic-package and encapsulate two heterogeneous gallium arsenide radio frequency chips to form a first plastic packaging layer; performing laser or mechanical drilling on the first plastic packaging layer to expose the metal protective layer to form a first plastic packaging through hole; and filling in the first plastic packaging through hole to form a filler. The present invention reduces the chip manufacturing cost and realizes the miniaturization of the chip size. At the same time, the high heat dissipation conductive layer on the back side can effectively enhance the heat dissipation of the chip and improve the performance of the system.

The invention discloses a photoconductive switch, a manufacturing method and a high-voltage-resistant picosecond electric pulse device, relates to the technical field of semiconductor devices and can also be applied to the field of microelectronics, and the photoconductive switch comprises a substrate layer, and a low-temperature gallium arsenide layer, a top insulating layer and a top electrode layer which are sequentially stacked on the substrate layer, wherein the top electrode layer comprises a first pin and a second pin, and the first pin and the second pin are embedded into the low-temperature gallium arsenide layer through the top insulating layer. According to the technical scheme, the electrode with a certain depth is embedded into the gallium arsenide growing at low temperature, so that the current density can be reduced, and the heat dissipation performance and the voltage resistance of the photoconductive switch are enhanced.

The invention discloses an intermediate frequency filter chip based on a gallium arsenide IPD process, which adopts the GaAs IPD process with three metal layers and comprises six resonators, twelve capacitors and three metalized grounding holes. The six resonators are composed of capacitors C1-C6 and inductors L1-L6 which are connected in series / in parallel, the inductors are all of self-built octagonal structures, and wiring is only conducted on the middle layer and the uppermost metal layer; a branch series capacitor Ca-Cc and a main parallel capacitor Cd-Cf respectively form six transmission zeros outside a low-frequency band and a high-frequency band. According to the invention, the characteristics of small size and wide band of the filter chip are realized, the loss is reduced, the in-band flatness is improved, and the filter chip has high frequency selectivity and high out-of-band rejection capability.

The embodiment of the invention discloses a reconstructed wafer, a wafer reconstruction method and a preparation method of a display panel, and the method comprises the steps: removing a first substrate at one side of an epitaxial structure layer of a to-be-segmented wafer to obtain a first intermediate structure, and segmenting the first intermediate structure corresponding to the to-be-segmented wafer with a smaller size into a plurality of wafers, the wafer is bonded with the carrier with a larger size to obtain the reconstructed wafer, so that the small-size to-be-segmented wafer can be reconstructed into the large-size reconstructed wafer, and the size of the reconstructed wafer can meet the requirement of an advanced technological process. Besides, the first substrate is firstly removed, so that wafer defects obtained by wafer segmentation in subsequent steps can be reduced, ion pollution in the subsequent wafer reconstruction process and the preparation process of the display panel after the reconstructed wafer is obtained can be reduced, and the yield of the reconstructed wafer and the display panel can be improved. Toxic gas is easily generated on the first substrate containing gallium arsenide during cutting, and the first substrate is removed in advance, so that the production safety is improved.

The invention discloses a broadband low-noise amplifier, and belongs to the technical field of monolithic microwave integrated circuits. Comprising a current multiplexing structure low-noise amplifier and a balanced low-noise amplifier which are cascaded, the current multiplexing low-noise amplifier comprises a first-stage amplification circuit and a second-stage amplification circuit which are cascaded in sequence, the balanced low noise amplifier comprises two folding Lange couplers and two amplification branches, the two amplification branches are of the same two-stage amplification circuit structure and comprise a third-stage amplification circuit and a fourth-stage amplification circuit which are cascaded and have the same structure; pHEMT (Pseudomorphic High Electron Mobility Transistor) tubes are adopted as amplifying devices in each amplifying circuit, and the broadband low-noise amplifier is integrated on a monolithic gallium arsenide. By combining the current multiplexing technology, the Lange coupler folding technology, the negative feedback technology and the balanced structure, the noise coefficient is effectively reduced, the power consumption is reduced, the layout area is reduced, and the performance of a traditional balanced low-noise amplifier is improved.

According to the pressing plate type spraying process for the high-precision semiconductor equipment, through innovative combination of an intelligent dynamic pressing plate and a pulse alternating spraying mechanism, nanoscale deposition precision control is achieved. The process comprises the following steps: performing plasma activation on the surface of a substrate; scanning the surface topological structure by using a pressure control array driven by the MEMS; a partition pressure distribution diagram and spraying parameters are generated; heating the substrate to a preset temperature; the intelligent dynamic pressing plate is controlled to make contact with the substrate; starting a pulse spraying system; monitoring in real time and dynamically adjusting parameters; and releasing the pressure and cooling after the preset film thickness is reached. According to the process, a pressure control point array with the density of 64 / cm < 2 > is adopted. According to the method, the film thickness control precision (+ / -1 angstrom), the surface uniformity (99.8%) and the material utilization rate (gt; the method is suitable for high-end application scenes of various semiconductor materials such as silicon-based integrated circuits, gallium arsenide devices and silicon carbide power devices, and the key bottleneck problem of a traditional spraying technology is solved.

The invention discloses a reverse four-junction thin film gallium arsenide solar cell for space and a preparation method, and belongs to the technical field of solar cells, the reverse four-junction thin film gallium arsenide solar cell for space adopts a reverse four-junction epitaxial structure, and a composite metal substrate is arranged on the back of an epitaxial layer of the reverse four-junction thin film gallium arsenide solar cell for space. The reverse four-junction thin film gallium arsenide solar cell for the space is characterized in that the epitaxial structure adopted by the reverse four-junction thin film gallium arsenide solar cell for the space can effectively improve the anti-irradiation performance of the thin film solar cell, meanwhile, the composite metal layer can enable the electrical performance of the solar cell not to be affected by bending, and the attachability of the solar cell is improved.

The invention relates to a radio frequency front-end transmitting link and a state detection method thereof, the transmitting link adopts four-stage series power amplification circuits, and the four-stage series power amplification circuits comprise a first-stage power amplification circuit, a second-stage power amplification circuit, a third-stage power amplification circuit and a fourth-stage power amplification circuit; the first-stage power amplification circuit is composed of a first pi attenuator and a low-noise amplification chip and used for radio frequency small signal gain amplification. The second-stage power amplification circuit is formed by cascading a temperature compensation attenuator, a filter and a gallium arsenide power amplifier tube, and the filter is a broadband filter, a tuned filter or a frequency hopping filter; the third-stage power amplification circuit is formed by cascading a numerical control attenuator and a three-stage gallium nitride power amplifier tube; and the fourth-stage power amplification circuit is formed by cascading a second pi-type attenuator and a last-stage gallium nitride power amplifier tube. The method has the advantages of being high in dynamic range and good in adaptability in a software radio system.

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.

The invention relates to a gallium arsenide chip laser processing device and method, the output end of a laser is sequentially provided with a beam expander and a spatial light modulator, the output end of the spatial light modulator is sequentially provided with a first lens, a first reflector and a second lens, and the output light path of the second lens is provided with a second reflector; a processing objective lens is arranged on a reflection light path of the second reflector and is opposite to the gallium arsenide chip on the motion platform; light spots of light beams output by the laser device are amplified and collimated through the beam expander, an effective window of the spatial light modulator is covered, the spatial light modulator loads an aberration correction holographic phase diagram, then the light beams sequentially pass through the first lens, the first reflector, the second lens and the second reflector, and the first reflector and the second reflector are used for changing the light path transmission direction. The first lens and the second lens form a 4f system for transmitting an image to a light inlet of the processing objective lens, and output laser forms a focusing light spot in the gallium arsenide chip for processing, so that the cutting efficiency and the cutting quality are improved.

The invention relates to a surface acoustic wave device (100) comprising a piezoelectric layer (120), an electrode (150A, 150B) embedded in the piezoelectric layer, and a substrate (130) carrying the piezoelectric layer and the electrode, the substrate satisfying the following two conditions: the attenuation of the elastic mode with the electrode in the piezoelectric layer is less than 0.1 dB / lambda; and a velocity ratio between a volumetric elastic mode for cutting the substrate and a basic elastic mode for cutting the piezoelectric layer is less than a predetermined velocity ratio having a value equal to 1, the substrate being selected from the group consisting of gallium arsenide and glass having a Young's modulus of between 60 Gpa and 180 GPa, a Poisson's ratio of between 0.15 and 0.35, and a density of between 2000 kg / m3 and 6000 kg / m3.

The invention discloses a three-junction gallium arsenide solar cell with a quantum dot structure and a manufacturing method of the three-junction gallium arsenide solar cell, belongs to the technical field of semiconductor photovoltaics, and aims to solve the problems that a quantum dot cell is large in stress and has many defects, and voltage and current are difficult to consider at the same time. According to the core technical scheme, in a middle battery base region, a GaAsP stress compensation layer is grown above an InGaAs quantum dot base region with gradient decreasing In components. The gradient quantum dots are used for enhancing long-wave absorption to improve short-circuit current; the open-circuit voltage of the GaAsP layer is increased by utilizing the wide forbidden band characteristic, the thickness of the GaAsP layer is accurately controlled, and the compressive stress of the quantum dot region is balanced by the introduced tensile stress. According to the stress balance design, material defects are greatly reduced, the crystal quality is improved, synchronous boosting of short-circuit current and open-circuit voltage is finally achieved on the basis of high reliability, and the overall efficiency of the battery is remarkably improved.

The invention relates to a light-emitting diode, which comprises a plurality of point-shaped transparent conducting electrodes, a dielectric layer and an epitaxial composite layer, wherein the dielectric layer is arranged around each point-shaped transparent conducting electrode, and the epitaxial composite layer comprises a carbon-doped gallium arsenide epitaxial layer which is arranged on each point-shaped transparent conducting electrode and the dielectric layer and is electrically connected with each point-shaped transparent conducting electrode. According to the invention, the epitaxial structure of the light-emitting diode and the manufacturing process steps thereof can be simplified, the manufacturing process cost is reduced, the overall brightness of the light-emitting diode can be effectively improved, and the forward voltage can be reduced.

The invention provides a CVD diamond heat dissipation structure of an optical chip and a preparation method of the CVD diamond heat dissipation structure, and relates to the technical field of heat sink pieces. The heat sink sheet is arranged on the top packaging material gallium arsenide of the optical module chip; transverse intervals and longitudinal intervals are arranged between the heat sink sheets. And the heat sink sheets form a grid type structure. According to the invention, gallium arsenide is used as a photoetching substrate by means of electronic characteristics and photoelectric characteristics of gallium arsenide, and diamond is used as a heat sink to grow on an optical module chip by means of high thermal conductivity of diamond. The diamond heat sink is added on the optical module chip, so that the heat dissipation requirement of a high-power device can be met, the heat dissipation effect of the chip is remarkably improved, the temperature of the optical module chip is effectively reduced, and the loss of the device is reduced.

The application provides a gallium arsenide chip delamination method. It relates to the technical field of semiconductor testing. The method comprises the following steps: determining a sample to be delaminated; etching the passivation layer by using a plasma etching technology to remove the passivation layer and expose the metal layer; etching the metal layer by using a gold etching solution to remove the metal layer and expose the dielectric layer; etching the dielectric layer by using a plasma etching technology to remove the dielectric layer and obtain a delaminated sample. The method can realize delamination of the gallium arsenide chip by using a physical and chemical fusion method, and is more reasonable for delamination of the gallium arsenide chip and less destructive to the gallium arsenide layer.

The invention provides a method for heteroepitaxial growth of a gallium arsenide material on silicon by introducing laser surface treatment. The method comprises the following steps: growing a gallium arsenide low-temperature layer with a low crystallization degree on a silicon substrate, and crystallizing the surface layer of the gallium arsenide low-temperature layer by adopting a laser surface treatment mode; growing a gallium arsenide medium-temperature layer on the gallium arsenide low-temperature layer after the surface layer crystallization treatment, and purifying the surface layer crystalline state of the gallium arsenide medium-temperature layer by adopting a laser surface layer treatment mode; and growing a gallium arsenide high-temperature layer on the gallium arsenide medium-temperature layer after the surface layer crystalline state purification treatment. Under the condition that the crystallization degree of the whole gallium arsenide epitaxial layer is reserved, the crystallization degree of the local part, namely the upper surface of the epitaxial layer, is improved, the inhibition effect on dislocation is enhanced, and the optimization of the crystal quality of the whole epitaxial structure is realized. The dislocation penetrating to the surface of the whole epitaxial structure during heteroepitaxial growth of the gallium arsenide material on the silicon substrate is remarkably reduced, and a brand new way is opened up for preparing semiconductor photoelectric devices.

The present invention is a method for manufacturing a bonded wafer for a micro-LED, the method includes the steps of epitaxially growing an AlGaInP-based first cladding layer, non-doped active layer, and second cladding layer on a GaAs substrate to form an epitaxial layer, growing a GaP window layer on the second cladding layer, bonding the GaP window layer to a transparent substrate via a thermosetting bonding member, separating the GaAs substrate, isolating the epitaxial layer into micro-LED devices, exposing the second cladding layer or the GaP window layer of the micro-LED device, forming electrodes, adhering the electrodes to a transfer substrate, and irradiating a laser from the transparent substrate side to isolate the micro-LED device from the transparent substrate, in which the GaP window layer has a thickness of 6 µm or more. This provides a method for manufacturing a bonded wafer for an AlGaInP-based micro-LED which improves a yield decrease caused by a crack in a micro-LED device during a LLO step.

The invention provides a photoconductive switch of a comb electrode, which comprises a semi-insulating gallium arsenide substrate layer, a low-temperature gallium arsenide layer and an insulating protective layer, and is characterized in that the low-temperature gallium arsenide layer is formed on the semi-insulating gallium arsenide substrate layer, and the insulating protective layer is arranged on the low-temperature gallium arsenide layer; a switch anode and a switch cathode are respectively formed on the inner side of the low-temperature gallium arsenide layer surface insulation protection layer; a comb-shaped electrode is arranged on the surface of the low-temperature gallium arsenide layer and located at the switch anode. According to the invention, by arranging the comb-shaped electrode structure, a plurality of comb-tooth electrodes which are distributed in a staggered manner are formed in the electrode region, so that the action area of incident light and a semiconductor active region is increased under an illumination condition, and generation and collection of photon-generated carriers are facilitated; meanwhile, the distribution state of an electric field near the electrode is improved, and the possibility of local electric field concentration is reduced; in addition, a low-temperature gallium arsenide material is adopted as the photoconductive layer, the service life of a current carrier is short, and the device is suitable for photoelectric trigger application scenes with requirements for response speed and stability.

The invention provides a solar cell step-shaped isolation groove, a preparation method thereof and a multi-junction gallium arsenide solar cell, the step-shaped isolation groove comprises a wide isolation groove and a narrow isolation groove, the narrow isolation groove is arranged above a lower electrode, the wide isolation groove is arranged above the narrow isolation groove, and the edges of the two sides of the wide isolation groove are located on the opposite outer sides of the edges of the two sides of the narrow isolation groove; the wide isolation groove penetrates through the top cell layer; the depth of the narrow isolation groove penetrates through the middle battery layer and the bottom battery layer. According to the invention, the step-shaped isolation groove is arranged, so that the film material for preparing the antireflection film can enter the isolation groove more easily, and the passivation effect on the isolation groove is improved; by arranging the wide isolation grooves, the top battery does not have a state that the edge is suspended and is not supported, and the mechanical property and the reliability of the battery are improved; and meanwhile, the top cell cannot shield the narrow isolation groove below the top cell, impurities adhered to the narrow isolation groove can be removed more conveniently, and the electrical performance and stability of the solar cell are ensured.

The invention discloses a method for improving terahertz intensity of a photoconductive antenna through laser ablation. A light source, a diaphragm arranged on one side of the light source, an attenuation piece arranged on one side of the diaphragm, a lens arranged on one side of the attenuation piece and a cavity arranged on one side of the lens are included. A light-transmitting hole is formed in the end surface, close to the lens, of the cavity; a sample is mounted at the bottom in the cavity; the material of the sample is crystal orientation lt; 100 gt; the thickness of the intrinsic gallium arsenide material is 350 microns, and the resistivity of the intrinsic gallium arsenide material is 107-108 omega.cm. According to the method for improving the photoelectric characteristic of the gallium arsenide material through laser ablation, the terahertz wave radiation intensity generated by the photoconductive antenna prepared from the material can be effectively improved.