24 results about "Gallium arsenide" patented technology

The application relates to the technical field of semiconductors, in particular to a three-junction composite laminated solar cell and a manufacturing method thereof. The three-junction composite laminated solar cell comprises, in sequence along the direction of incident light, an N electrode, a GaInP top cell, a first tunnel junction, a GaAs middle cell, a second tunnel junction, an OCA optical adhesive bonding layer, a PET substrate, a transparent front electrode, a hole transport layer, a composite perovskite light-absorbing layer, an electron transport layer, a BCP buffer layer and a P electrode. The composite perovskite light-absorbing layer is prepared from (FA 0.7 MA 0.3 )(Pb 0.6 Sn 0.4 )I3, and 1-vinyl-3-ethyl imidazole hexafluorophosphate is added as an additive. The manufacturing method provided by the application can realize reliable combination of electrical and optical properties between a GaAs / perovskite composite laminated cell, and the prepared three-junction composite laminated solar cell has higher light absorption efficiency, reliability and stability.

This invention relates to the field of solar cell technology, specifically to a space-grade gallium arsenide solar cell with a carbon electrode and its fabrication method. The gallium arsenide solar cell, from top to bottom, comprises an antireflection coating, a metal top electrode, a triple-junction GaAs epitaxial layer, and a composite carbon-based back electrode. The composite carbon-based back electrode, from top to bottom, comprises a MoO3 ultrathin interface layer, a V2C MXene current transport layer, and a graphite / carbon black / composite conductive binder composite layer. This solar cell, using a carbon-based electrode as the back electrode, exhibits low cost, high power-to-weight ratio, high conductivity, and high stability, making it suitable for extreme space environments.

Disclosed in the present invention are a laterally monolithically heterogeneously integrated radio frequency chip based on gallium nitride and gallium arsenide, and a preparation method therefor. The chip comprises a backside metal, a substrate, a gallium nitride device epitaxial layer, a gallium nitride device drain electrode, a gallium nitride device gate electrode, a gallium nitride device source electrode, a back via, a gallium arsenide epitaxial transition layer, a gallium arsenide device epitaxial layer, a gallium arsenide device source electrode, a gallium arsenide device gate electrode, and a gallium arsenide device drain electrode, wherein a gallium nitride epitaxial material, a gallium arsenide epitaxial material and radio frequency devices share the backside metal and the substrate; and a trench is formed in a selected region of a heterogeneous-substrate gallium nitride wafer to epitaxially grow a gallium arsenide material, and a gallium arsenide device is processed, so as to realize lateral monolithic heterogeneous integration. The present invention can achieve an extremely small spatial spacing between a gallium nitride radio frequency device and a gallium arsenide radio frequency device, thereby reducing signal loss caused by long-distance transmission at a high frequency and the effect of parasitic parameters, reducing the chip area and the chip volume, and lowering packaging costs.

The application relates to the technical field of semiconductors, in particular to a three-junction composite laminated solar cell and a manufacturing method thereof. The three-junction composite laminated solar cell comprises, in sequence along the direction of incident light, an N electrode, a GaInP top cell, a first tunnel junction, a GaAs middle cell, a second tunnel junction, an OCA optical adhesive bonding layer, a PET substrate, a transparent front electrode, a hole transport layer, a composite perovskite light-absorbing layer, an electron transport layer, a BCP buffer layer and a P electrode. The preparation raw material of the composite perovskite light-absorbing layer is (FA 0.7 MA 0.3 )(Pb 0.6 Sn 0.4 )I3, and 1-vinyl-3-ethyl imidazole hexafluorophosphate is added as an additive. The manufacturing method provided by the application can realize reliable combination of electrical and optical properties between a gallium arsenide / perovskite cell composite laminated cell, and the prepared three-junction composite laminated solar cell has higher light absorption efficiency, reliability and stability.

This invention discloses a back-contact gallium arsenide photovoltaic cell and its fabrication method. The back surface of the cell has alternating first and second contact regions: the first contact region forms a pn junction with the absorber layer through a heavily doped GaAs back contact layer; the second contact region forms a heterojunction with the absorber layer through a transition metal oxide layer, achieving selective collection of another type of charge carrier. The fabrication method includes: epitaxial growth of a multilayer structure, patterned etching of the back surface, deposition of an insulating layer and opening of vias, separate deposition of two types of electrodes, substrate transfer, and deposition of an anti-reflection layer. This invention, through innovative structural design and process integration, solves the problem of bipolar carrier collection in GaAs back-contact cells, realizing a high-efficiency photovoltaic cell without front electrode obstruction, and is particularly suitable for the fabrication of flexible, high-efficiency photovoltaic devices.

This invention relates to the field of solar cell technology, specifically to a gallium arsenide solar cell with ADA-modified PI and its fabrication method. The gallium arsenide solar cell, from bottom to top, comprises a modified PI substrate, a metal bonding layer, an epitaxial active layer, a top electrode, an anti-reflection coating layer, and a bottom electrode. The modified PI substrate is obtained by cyclic thin-coating and pre-crosslinking modification of a PI film substrate with ADA-modified coating solution, and includes a PI film substrate and an ADA-modified layer. This invention's gallium arsenide solar cell uses an ADA-modified PI film substrate, effectively solving the problems of warpage, interlayer failure, and insufficient flexibility of existing flexible GaAs solar cell PI film substrates, thus meeting the environmental resistance requirements of space-use devices.

This invention relates to the field of gallium arsenide-based high-frequency device manufacturing technology, specifically a method and structure for fabricating a Y-shaped gate to reduce gate resistance. The method involves forming a first layer of negative photoresist with an inverted trapezoidal cross-section on a GaAs wafer, depositing a 30nm~80nm sacrificial passivation layer, coating a second layer of negative photoresist, and photolithographically etching out a window. A suspended region is formed through dry etching and O2 plasma etching, followed by metal evaporation and non-destructive lift-off to obtain the Y-shaped gate. This invention fundamentally eliminates the lift-off failure problem caused by the "top-heavy" effect, overcomes the process bottleneck of gate metal thickness, and achieves a significant increase in gold layer thickness, effectively reducing gate resistance. Furthermore, this invention provides a Y-shaped gate structure fabricated by this method, which has high bottom support strength and exhibits no process stress damage in its Schottky contact with the GaAs substrate, significantly improving the high-frequency performance and reliability of the device.

This invention discloses a back-bonded bifacial flexible gallium arsenide solar cell and its fabrication method. The flexible gallium arsenide solar cell includes an electrode system, a first cell sub-unit, a second cell sub-unit, and a bonding structure layer. The bonding structure layer is disposed between the back sides of the first and second cell sub-units, enabling integrated bonding between the back sides of the first and second cell sub-units to form a bifacial flexible gallium arsenide solar cell. The first, second, and bonding structure layers are each connected to the electrode system. This invention, through its unique back-to-back bonding structure, enables the back-bonded bifacial flexible gallium arsenide solar cell to generate electricity effectively on both sides. Under the same illumination area, its total output power is increased, significantly improving space utilization and power density.

The application discloses a preparation method of a flexible gallium arsenide solar cell chip, and the flexible gallium arsenide solar cell chip comprises a substrate and an ohmic contact layer deposited directly on the substrate; wherein the substrate is provided with an N-type GaAs region, the ohmic contact layer is directly deposited on the N-type GaAs region once, the ohmic contact layer is a ZnO thin film, the thickness of the ZnO thin film is 10-100 nm, annealing treatment is performed after the one-time deposition, the annealing temperature is ensured to be not less than 250 DEG C, and the ohmic contact layer forms a low-resistance ohmic contact with the N-type GaAs region. The application solves the problems of high cost, complex process and poor flexibility of a metal ohmic contact layer in the prior art.

Disclosed in the present invention is an AlGaInP yellow-green LED epitaxial wafer with high brightness, low leakage and high reliability. The epitaxial wafer comprises an N-type GaAs buffer layer, an N-type GaInP etch-stop layer, an N-type GaAs ohmic contact layer, an N-type AlGaInP current spreading layer, an N-type electron retardation layer, an N-type AlInP confinement layer, a multiple quantum well layer, a P-type AlInP confinement layer, a P-type GaP current spreading layer and a P-type GaP ohmic contact layer, which are sequentially grown on a GaAs substrate. An electron retardation layer, a graded quantum barrier thickness design, and a magnesium diffusion barrier layer are introduced, so as to effectively suppress electron leakage and magnesium diffusion, thereby reducing non-radiative recombination, and thus significantly improving the luminous efficiency and high-temperature operating stability of LEDs.

The application provides a laminating device and a laminating method, relates to the technical field of laminating, and comprises the following: a rack; a conveying mechanism, the lower side of the conveying belt at the top of the conveying mechanism is provided with a substrate, and the conveying mechanism is used for conveying lower laminating materials; an upper box body, the upper box body is sequentially connected with the rack through a turnover mechanism, a lifting mechanism and a sliding mechanism; a pressing plate, the pressing plate is connected with the upper box body through a first flexible sealing component, the lower end of the upper box body can be connected with the substrate, and a sealed laminating chamber is formed between the pressing plate and the substrate, a temperature control structure is arranged in the pressing plate, the pressing plate is provided with a material fixing part and is used for fixing upper laminating materials; and a vacuum device, the vacuum device is connected with the laminating chamber; and the problems that the conventional photovoltaic module laminating machine cannot meet the automatic laminating requirements of gallium arsenide space photovoltaic modules in the prior art are solved.

The application discloses a preparation method of a multi-layer epitaxial structure test sample of a gallium arsenide solar cell. Four test interfaces can be obtained through twice protection and corrosion, the preparation efficiency is improved, the sample damage probability is reduced by more than 30%, and multiple sample interfaces to be tested can be obtained at a time, so that various test requirements are met. Not only the growth quality of the four epitaxial layers can be visually observed, but also technical parameters such as the thickness of each related layer and the band gap width can be measured in addition to the component of the epitaxial layer and the ion doping concentration.

This invention discloses a broadband high-absorption solar absorber based on a hollow cross-ring structure. The absorber is composed of a periodic array of hollow cross-ring structural units. Each unit, from top to bottom, includes a metallic iron (Fe) resonator layer, a silicon dioxide (SiO₂) dielectric layer, a gallium arsenide (GaAs) layer, and a metallic Fe reflective layer. The metallic iron resonator employs a hollow cross-ring structure design. Through optimized structural design, material selection, and key parameter matching, this invention achieves highly efficient light energy capture over a wide spectral range: an average absorptivity of 98.47% in the 498-1988 nm wavelength range, a continuous bandwidth exceeding 90% at 1490 nm, and a weighted absorption efficiency of 97.96% under the AM1.5 standard solar spectrum, with an energy loss rate of only 2.04%. The excellent absorption performance of this absorber stems from the surface plasmon resonance, gap plasmon resonance, and synergistic coupling effect between the unit structures excited by the hollow cross-ring structure. Meanwhile, the overall structure is only 243 nanometers thick, exhibiting ultra-thin characteristics, high stability, and good fabrication tolerance. This invention can be widely applied in fields of high-efficiency solar energy utilization such as photovoltaic power generation and photothermal conversion, providing new ideas for the development of next-generation high-efficiency solar energy devices and possessing significant engineering application value.

This application discloses an active display control device based on gallium arsenide (GaAs) optoelectronic devices. In this device, the GaAs heterojunction field-effect transistor used in the array driving unit, leveraging the material's high electron mobility and the two-dimensional electron gas structure formed by the heterojunction, can instantaneously control the luminous state of the display pixels. Furthermore, it is electrically connected to each display pixel in a one-to-one correspondence, eliminating signal lag caused by multiplexing. Additionally, the GaAs CMOS logic unit, utilizing the properties of GaAs material, can significantly reduce the signal transmission delay of logic gate circuits. Combined with the high-frequency modulation characteristics of pulse width modulation signals, it effectively improves the smoothness of dynamic image transitions. Regarding high-frequency power consumption control, the GaAs heterojunction field-effect transistor can significantly reduce Joule heat loss and static power consumption during high-frequency switching. The cascaded structure of the array driving unit and the GaAs CMOS logic unit can reduce signal attenuation and distortion at high frequencies, reducing the power consumption of the auxiliary amplifier circuit.

Apparatus and methods for amplifier linearization are disclosed. In certain embodiments, an RF amplifier includes an RF input terminal that receives an RF input signal, an RF output terminal that provides an RF output signal, a gallium nitride field-effect transistor (GaN FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaN FET amplifies the RF input signal. The RF amplifier further includes a gallium arsenide field-effect transistor (GaAs FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaAs FET is operable to linearize the GaN FET.

The present application relates to the technical field of solar cells, in particular to a flexible gallium arsenide solar cell for space and a preparation method thereof, which comprises the following steps: bonding of a gallium arsenide epitaxial layer and a PI substrate; thinning and peeling of a GaAs substrate; preparation of a GZO transparent current collection layer; preparation of a metal electrode; deposition of an anti-reflection film layer; etching of a lower electrode and temporary bonding and peeling; the preparation of the GZO transparent current collection layer comprises magnetron sputtering of a GZO transparent film, LED low-temperature light-assisted annealing treatment and in-situ Ar / O2 mixed plasma cleaning. The present application solves key problems such as flexible substrate compatibility, interface performance optimization and space environment adaptation by the synergistic effect of the design of the GZO transparent current collection layer, LED low-temperature light-assisted annealing and in-situ Ar / O2 plasma cleaning, and is suitable for the fields of aerospace and aviation.

This invention discloses a processing device suitable for gallium arsenide wafers, specifically relating to the field of wafer processing. The device includes a main body, with a waste liquid storage unit fixedly connected to the top of the main body. A storage cavity is formed inside the waste liquid storage unit, and a polishing pad is disposed inside the storage cavity. A rotating head is mounted on top of the polishing pad. A delivery assembly is mounted on top of the waste liquid storage unit, including a limiting arc member sleeved on the outside of the waste liquid storage unit. A blocking arc plate is fixedly connected to one side of the limiting arc member, and the blocking arc plate is disposed inside the waste liquid storage unit. A base is fixedly connected to the top of the limiting arc member. This invention, by setting up the delivery assembly, enables the wafer to fully contact the polishing slurry, avoiding incomplete chemical reactions due to insufficient contact. Furthermore, the use of a diversion method improves the uniformity of polishing slurry dispersion, thereby reducing the rate of polishing slurry delivery and preventing waste due to excessive use of polishing slurry.

The application relates to the technical field of photoelectric detection, and discloses a solar cell photoelectric characteristic loss efficiency detection method and device based on semiconductor multi-junction spectral characteristics, wherein the method is based on the spectral response range of a sub-cell layer of a multi-junction solar cell, and a corresponding excitation light source and a light filtering device are matched. Different laser light sources with different wavelengths are used to excite different sub-cell layers and capture photoluminescence images, the characteristic differences of the multi-junction solar cell before and after irradiation damage are compared, the light-emitting characteristic failure rate and the photoelectric conversion efficiency loss rate of each sub-cell are calculated, and finally the irradiation damage and efficiency loss results of the irradiation-damaged multi-junction solar cell and each sub-cell are obtained. The application realizes nondestructive and non-contact layered detection of the multi-junction solar cell, the detection result can be quantified, the detection device structure is simple and easy to realize in engineering, and the application is especially suitable for irradiation damage detection and efficiency evaluation of a three-junction gallium arsenide solar cell in the field of spaceflight.

The present application relates to the technical field of solar cells, in particular to a flexible gallium arsenide solar cell for space and a preparation method thereof, which comprises the following steps: bonding of a gallium arsenide epitaxial layer and a PI substrate; thinning and peeling of a GaAs substrate; preparation of a GZO transparent current collection layer; preparation of a metal electrode; deposition of an anti-reflection film layer; etching of a lower electrode and temporary bonding and peeling; the preparation of the GZO transparent current collection layer comprises magnetron sputtering of a GZO transparent film, LED low-temperature light-assisted annealing treatment and in-situ Ar / O2 mixed plasma cleaning. The present application solves key problems such as flexible substrate compatibility, interface performance optimization and space environment adaptation by the synergistic effect of the design of the GZO transparent current collection layer, LED low-temperature light-assisted annealing and in-situ Ar / O2 plasma cleaning, and is suitable for the fields of aerospace and aviation.

This invention belongs to the field of solar cell technology, specifically relating to a method for fabricating a multi-junction GaAs solar cell epitaxial structure and the epitaxial structure itself. The method involves the sequential epitaxial growth of the following on a GaAs substrate: an n-type highly doped interconnect layer and a first window layer; an n-i-p-type indium gallium phosphide (IGNP) top cell layer and a back field layer configured with its aluminum composition; a first tunneling junction composed of p-type aluminum gallium arsenide (AGaAs) and n-type AGaAs, with a higher p-type doping concentration than n-type; a second window layer and an n-i-p-type gallium arsenide (GaAs) middle cell layer and a back field layer configured with its indium composition; a second tunneling junction composed of p-type AGaAs and n-type IGNP; a transition transport layer that gradually transitions from n-type IGNP to a high indium composition; a third window layer; an n-i-p-type IGNP bottom cell layer; a back field layer; a highly doped interconnect layer; and a protective layer. The composition-gradient transition layer eliminates lattice mismatch stress and reduces defect density. The asymmetric highly doped design of the tunneling junction balances carrier transport between sub-cells, reduces recombination losses, and improves the photoelectric conversion efficiency and reliability of the cell.

The application discloses a surface treatment method, device, equipment and medium of a gallium arsenide substrate, wherein the surface treatment method of the gallium arsenide substrate comprises the following steps: placing the gallium arsenide substrate in a first solution for washing, wherein the first solution comprises gold chloride and deionized water; and performing laser intermittent irradiation and ultrasonic treatment on the first solution, so that gold ions in the first solution are diffused and the surface of the gallium arsenide substrate is treated. The disclosed scheme improves the process yield of the surface of the gallium arsenide substrate.

The application belongs to the technical field of solar cells, and discloses a PEDOT:PSS / Nafion composite film, a gallium arsenide-based heterojunction solar cell and a preparation method. The solar cell comprises a back electrode, a gallium arsenide substrate, a composite layer, a window layer and a front electrode. The product is obtained by spin coating PEDOT:PSS and Nafion on the gallium arsenide substrate through a spin coating process to form the composite layer composed of the PEDOT:PSS / Nafion composite film, which can reduce the series resistance of the device, accelerate the separation and transportation of carriers, significantly improve the photoelectric conversion efficiency of the device, has high light transmittance and excellent conductivity, and the solar cell combined with the gallium arsenide substrate has higher open-circuit voltage and excellent conversion efficiency. Meanwhile, the product also has a passivation effect, improves the interface properties between the product and the substrate, reduces the recombination of carriers at the interface, and then improves the performance of the semiconductor device.

Methods and systems for low etch pit density gallium arsenide crystals with boron dopant may include a gallium arsenide single crystal wafer having boron as a dopant, an etch pit density of less than 500 cm−2, and optical absorption of 6 cm−1 or less at 940 nm. The wafer may have an etch pit density of less than 200 cm−2. The wafer may have a diameter of 6 inches or greater. The wafer may have a boron concentration between 1×1019 cm−3 and 2×1019 cm−3. The wafer may have a thickness of 300 μm or greater. Optoelectronic devices may be formed on a first surface of the wafer, which may be diced into a plurality of die and optical signals from an optoelectronic device on one side of one of the die may be communicated out a second side of the die opposite to the one side.

Methods and apparatus for processing a substrate. For example, a processing chamber may include: a power source; an amplifier connected to the power source, the amplifier including at least one of a gallium nitride (GaN) transistor or a gallium arsenide (GaAs) transistor, and the amplifier being configured to amplify the power level of an input signal received from the power source to heat the substrate in the processing volume; and a cooling plate configured to receive a coolant to cool the amplifier during operation.