62 results about "Air bridge" patented technology

The invention provides a superconducting quantum chip and a manufacturing method thereof, and relates to the technical field of quantum information, a first superconducting layer and a second superconducting layer in a superconducting structure are communicated by adopting an air bridge, the potential difference and the slot line mode between the first superconducting layer and the second superconducting layer are further eliminated, and the performance of the superconducting quantum chip is improved. The bridge deck width of the bridge deck part provided by the invention is optimally designed, that is, the bridge deck width of the bridge deck part is designed to be gradually reduced in the direction from the joint of the bridge deck part and the first bridge pier part and the joint of the bridge deck part and the second bridge pier part to the middle area of the bridge deck part; according to the invention, the stray capacitance between the air bridge and the superconducting transmission line is reduced, the influence of the stray capacitance on the superconducting quantum chip is improved, the performance of the superconducting quantum chip is further improved, the strength and stability of the bridge surface part are improved, the probability of collapse of the air bridge is reduced, the manufacturing difficulty of the bridge surface part of the air bridge is reduced, and the manufacturing cost is reduced. And the manufacturing process of the air bridge is simplified.

The application discloses a broadband multi-stage Gysel power divider based on an IPD process, comprising a microstrip structure layer, and first and second dielectric substrates and a ground metal layer; the microstrip structure layer adopts a multi-layer nested structure, each layer of the nested structure is formed by cascading multi-stage Gysel power division units, and is arranged on the upper surface and the interior of the first dielectric substrate, so that an integrated layout based on the IPD process is formed, and a planar spiral structure, an air bridge, a parallel plate capacitor, a thin film resistor and a layered ground unit structure are integrated; the planar spiral structure is equivalent to a specific characteristic impedance transmission line, the air bridge structure solves cross interference and suppresses a parasitic capacitor, the parallel plate capacitor structure calibrates equivalent reactance parameters, the thin film resistor effectively improves port isolation and heat dissipation, and the layered ground unit structure strengthens heat dissipation and ground reliability. The application can realize stable power distribution in a wide frequency band, and is suitable for the integration requirements of high-frequency, high-power and small-sized radio frequency front ends.

The application discloses an air bridge preparation method, an air bridge structure, a chip and an air bridge preparation system, and relates to the technical field of micro-nano processing. The method comprises the following steps: forming N mound structures on a substrate, the mound structures are in the shape of a column, the mound structures comprise first surfaces and second surfaces opposite to each other, the first surfaces of the N mound structures are connected with the substrate respectively, N is a positive integer; and preparing an air bridge on the substrate with the N mound structures, the second surfaces of the N mound structures are connected with the air bridge respectively. In the method, on the one hand, the mound structures can play a supporting role on the air bridge, thereby improving the stability of the air bridge; on the other hand, since the mound structures are formed before the air bridge, in the air bridge preparation process, the mound structures, as the formed structures, can support and maintain the air bridge material used for forming the air bridge, thereby guaranteeing the smooth formation of the air bridge.

The present invention provides a bulk acoustic wave resonator, a preparation method, and a bulk acoustic wave filter. The preparation method of the bulk acoustic wave resonator includes: providing a substrate; forming a bottom electrode and a piezoelectric layer on the substrate; forming a sacrificial layer at the edge of the surface of the piezoelectric layer away from the bottom electrode, wherein the sacrificial layer includes at least one of an air bridge structure sacrificial layer and a cantilever structure sacrificial layer; forming an uneven surface on at least part of the surface of the sacrificial layer away from the piezoelectric layer through a surface treatment process to form a first rough surface; forming a top electrode on the surface of the sacrificial layer away from the piezoelectric layer; and releasing the sacrificial layer. The technical solution provided by the embodiment of the present invention effectively consumes the shear waves and clutter entering the air bridge structure or the cantilever structure by providing a rough scattering surface on the air bridge structure or the cantilever structure, thereby improving the Q value of the bulk acoustic wave resonator.

The invention relates to the technical field of semiconductor device manufacturing, in particular to a preparation method of an ultra-low junction capacitance TVS (Transient Voltage Suppressor) protection device. The method comprises the steps that a high-aspect-ratio fin groove array is constructed based on a GaAs substrate, a steep side wall is formed through reactive ion deep etching and a plasma repairing technology, the traditional etching aspect ratio limit is broken through, and volume order of magnitude expansion of a depletion region is achieved; a P < + >-gradient intrinsic layer-N < + > doping structure is formed on a three-dimensional side wall by adopting multi-angle rotating ion implantation, electric field distribution is optimized through a continuous concentration slope, and the problem of advanced breakdown caused by peak electric field concentration is solved; an air bridge electrode process is innovated, suspended interconnection of air dielectric isolation is formed by release of a sacrificial layer, and stray capacitance is thoroughly eliminated; and in combination with a multi-ring field limit terminal and pulse laser local annealing, edge electric field suppression and lattice integrity control are realized. According to the method, the device has ultralow junction capacitance, nanosecond response and high robustness, and a subversive electrostatic protection solution is provided for a high-speed communication system.

The invention relates to a long-distance span air bridge processing method. The processing method comprises the following steps: depositing a first photoresist layer on a substrate material, performing exposure / development, etching the substrate material by adopting a wet method, forming a first table top on the substrate material, and removing the first photoresist layer; according to the same operation, continuously coating the second photoresist layer to the nth table surface; coating an (n + 1) th photoresist layer on the outer side of the nth table top, performing exposure / development, performing metal evaporation, and removing metal and the (n + 1) th photoresist layer on the outer side of the nth table top to complete air bridge metal deposition; and coating an (n + 2) th photoresist layer, performing exposure / development, completely etching the substrate material in the vertical direction below the air bridge, and then removing the (n + 2) th photoresist layer to complete the air bridge manufacturing process. The problem of light resistance deformation caused by long-distance transconductance can be solved, and a long-span air bridge structure is achieved.

The light detector (10) of the present application is provided with a semiconductor substrate (11), a mesa portion (12) formed on a main surface (11a) of the semiconductor substrate (11) in a manner extending along a light waveguide direction (A), a first contact layer (13), a second contact layer (14), a first electrode (15), and an air-bridge wiring (16) electrically connected to the first contact layer (13) and the first electrode (15). When viewed from a direction perpendicular to the main surface (11a) of the semiconductor substrate (11), a length (L1) of the mesa portion (12) in the light waveguide direction (A) is longer than a length (L2) of the mesa portion in a direction perpendicular to the light waveguide direction (A). The air-bridge wiring (16) is drawn out from the first contact layer (13) to one side in the direction perpendicular to the light waveguide direction (A) and is erected between the first contact layer (13) and the first electrode (15).

The invention discloses an air bridge preparation method of a superconducting quantum chip and the superconducting quantum chip, and is applied to the technical field of quantum.The method comprises the steps that a first photoresist layer is arranged on the surface of a substrate of the superconducting quantum chip; performing exposure and development treatment and heating reflux treatment on the first photoresist layer to form a bridge support structure; wherein the photoresist on the surface layer of the bridging structure is denatured in the heating reflux treatment process; carrying out ultraviolet flooding exposure treatment on the substrate of the bridge support structure containing the denatured photoresist according to a preset exposure dose by utilizing an ultraviolet light source; and preparing the air bridge based on the bridge support structure subjected to the ultraviolet flooding exposure treatment. A bridged structure formed after heating reflux treatment is subjected to ultraviolet flood exposure treatment, and a cross-linked structure (such as breaking C-C and C-O cross-linked bonds in colloid) of the modified photoresist is destroyed by utilizing photochemical reaction, so that the solubility of the photoresist in a photoresist removing solution is improved, the subsequent photoresist removing solution is easier to permeate to dissolve the colloid, and the photoresist removing efficiency and the photoresist removing effect are improved.

The present invention discloses a gallium nitride Schottky diode and a method for fabricating the same. The diode comprises a substrate, a gallium nitride channel layer, a gallium oxide barrier layer, and a capping layer. A two-dimensional electron gas layer is formed between the gallium nitride channel layer and the gallium oxide barrier layer. Electrode grooves are provided at both ends of the gallium nitride channel layer to intercept the two-dimensional electron gas layer. The sides of the electrode grooves that contact the two-dimensional electron gas layer are filled with metal electrodes to form a cathode and an anode, respectively, while the other sides are hollowed out to form an air bridge. Both the cathode and the anode are Schottky electrodes. The Schottky diode fabricated by the present invention has the advantages of low parasitic effects, a large nonlinear capacitance range, and a high cutoff frequency.

Disclosed is a low noise amplifier which includes a low amplification circuit. The low noise amplification circuit includes a first source pattern that extends in a first direction, a first gate finger that is spaced apart from the first source pattern in a second direction perpendicular to the first direction, a second gate finger that is spaced apart from the first gate finger in the second direction, a second source pattern that is spaced apart from the second gate finger in the second direction, and an air bridge that makes contact with the first and second source patterns in a third direction perpendicular to a plane defined by the first and second directions and that is spaced apart from the first and second gate fingers in the first direction.

The present application relates to the technical field of semiconductor devices, and specifically discloses a film bulk acoustic resonator and a manufacturing method therefor. The film bulk acoustic resonator comprises a substrate, and a lower electrode, a piezoelectric layer, a thickening layer and an upper electrode which are stacked on the substrate. An overlapping portion of projections of the lower electrode, the piezoelectric layer and the upper electrode on the substrate is an active region. An air wing and an air bridge located on two opposite sides of the active region are formed between the thickening layer and the piezoelectric layer. At a position corresponding to the air bridge, the thickening layer and the upper electrode are recessed towards the side of the piezoelectric layer, so that the thickening layer is in contact with the piezoelectric layer to cause a piezoelectric effect, and the air bridge is divided into a first air sub-cavity and a second air sub-cavity. The present application can effectively reduce the strong parasitic peak introduced by the thickening structure, so that the resonator has better properties.

The invention discloses a superconducting quantum chip and a preparation method thereof. The preparation method of the superconducting quantum chip comprises the following steps: preparing a bottom layer circuit on a substrate; preparing a Josephson junction on the substrate on which the bottom circuit is prepared; spin-coating a first photoresist on the substrate on which the bottom circuit and the Josephson junction are prepared and baking; spin-coating a second photoresist and baking the second photoresist; aligning the first mask with the Josephson junction, and performing exposure and development to form a hollow pattern of the bridge pier in the first photoresist and the second photoresist; pier metal is evaporated on the hollowed-out pattern of the pier through electron beam evaporation; spin-coating sacrificial layer photoresist on the substrate on which the pier metal is evaporated, and baking the sacrificial layer photoresist; aligning a second mask with the Josephson junction, and performing exposure and development to remove a non-air bridge region in the sacrificial layer; etching the global etching oxide layer by using an ion beam, and etching the deposited metal material in a non-air bridge area by using inductively coupled plasma to form an air bridge patch; and removing the photoresist and stripping to obtain the superconducting quantum chip.

The invention provides a bulk acoustic wave resonator, a filter and a duplexer for improving a Q value and a preparation method thereof, and relates to the technical field of bulk acoustic wave resonators. Comprising a substrate, a bottom electrode, a piezoelectric layer and a top electrode which are sequentially stacked in the longitudinal direction, a cavity is formed between the substrate and the bottom electrode, single-protrusion frame structures are arranged between the edges of the two sides of the piezoelectric layer in the transverse direction and the top electrode, and the portions, close to the edges, of the frame structures are arranged in an overhead mode and form an air bridge structure communicated with the outside with the piezoelectric layer. The bulk acoustic wave resonator for improving the Q value aims at solving the problem that an existing single-protrusion and double-protrusion frame structure is poor in Lamb wave leakage suppression effect or large in machining process difficulty, it is guaranteed that the process is simple, Lamb wave transverse energy leakage is effectively suppressed, and therefore the Q value is improved.

The invention discloses a manufacturing method and application of an air bridge and a mask and the mask, and belongs to the field of quantum chip manufacturing. The method for manufacturing the mask comprises the steps that a substrate is provided, a first light resistance layer is formed on the surface of the substrate, the first light resistance layer is patterned and subjected to hot backflow, the first light resistance layer is provided with two windows far away from each other, a bridge support and a supporting layer, the bridge support and the supporting layer are separated by the two windows, and the supporting layer is provided with a first sub-layer and a second sub-layer on the two sides of the bridge support; and fabricating a second photoresist layer on the first sub-layer and the second sub-layer, the second photoresist layer having an undercut opening and communicating with the window. The mask allows the air bridge to be manufactured in a stripping mode in the manufacturing process, so that the manufacturing steps of the air bridge can be reduced, and the manufacturing success rate of the air bridge is also improved.

The invention discloses an air bridge preparation method and device and electronic equipment, and belongs to the technical field of chip preparation. According to the air bridge preparation method, a target metal material is sputtered on the surface of a substrate with a target supporting layer, a target metal layer composed of the target metal material in a target phase state is formed, the target supporting layer is removed, and the air bridge composed of the target metal layer is obtained. According to the air bridge preparation method, the target metal material forming the air bridge is in the target phase state, and the microwave loss of the target metal material in the target phase state is smaller than the preset threshold value, so that the microwave loss of the prepared air bridge can be reduced.

The invention provides a manufacturing method of a packaging structure, and the method comprises the following steps: providing a to-be-packaged product which comprises a substrate layer and an air bridge disposed on the substrate layer; forming a first protective layer on the substrate layer, wherein the first protective layer surrounds the air bridge; patterning the first protection layer; removing a part of the first protection layer around the air bridge to form a notch, wherein one side, deviating from the substrate layer, of the notch is open; and forming a second protection layer on one side, deviating from the substrate layer, of the first protection layer, wherein the second protection layer covers the notch. According to the manufacturing method provided by the invention, the first protection layer is directly formed on the substrate layer, and the second protection layer covering the notch is formed on the first protection layer after the first protection layer is patterned to form the notch, so that the air bridge is effectively protected, and the manufacturing method is simple in process, low in manufacturing cost and high in yield. The original to-be-packaged product is not damaged, and the formed first protection layer and the second protection layer are stable in structure, so that the air bridge can be effectively protected.

The invention discloses an air bridge preparation method and device and electronic equipment, and belongs to the technical field of chip preparation. The air bridge preparation method comprises the following steps: obtaining an initial substrate; a hard supporting layer made of a hard material is formed on the upper surface of the initial substrate, the hardness of the hard material is larger than preset hardness, and the preset hardness is determined by the hardness of the photoresist; forming a target superconducting layer covering the hard supporting layer; and removing the hard supporting layer to obtain the target air bridge. In the air bridge preparation method, the hard support layer is prepared on the surface of the initial substrate by using the hardness material with the hardness greater than the preset hardness, and the target superconducting layer covering the hard support layer is used as the air bridge. The hardness of the hard material is greater than the preset hardness determined by the photoresist, so that when the hard material is used for preparing the hard support layer, the risk of collapse of the support layer in the preparation process can be effectively reduced, and the stability of the air bridge preparation process can be improved.

The invention discloses a chip preparation method and a chip, and the method comprises the steps: sequentially forming a first conductor layer and a first insulating layer on a semiconductor layer; forming a pier structure on the first insulating layer; forming a sacrificial layer between the pier structures; sequentially forming a third insulating layer and a bridge structure on the pier structure; and removing the sacrificial layer to form an air bridge structure, wherein the sacrificial layer is a BARC layer or an amorphous carbon layer. According to the preparation method of the chip, the BARC layer or the amorphous carbon layer is adopted as the sacrificial layer, the BARC layer or the amorphous carbon layer does not affect the structure of the chip structure in the removal process, over-etching of the chip structure is prevented, and an interference source of noise is effectively removed.

The present application relates to the field of radio frequency microwave, and particularly relates to a double-layer annular four-port network radio frequency microwave switch, comprising: a substrate, the substrate is a rectangular plate with double surfaces; a co-planar waveguide structure, the co-planar waveguide structure adopts a three-in-one design, comprising a signal line and ground lines on both sides of the signal line; the co-planar waveguide structure is symmetrically arranged at the center of each side of the substrate; the signal line branch is further provided with a Pad window, a Pad lead and an air bridge structure; an upper electrode, the upper electrode is fixed on the co-planar waveguide through an anchor point, and the upper electrode is a cantilever type straight plate structure containing an array of release holes; a Y-type power divider structure, the Y-type power divider structure is narrow-band cascaded with the co-planar waveguide structure, and is used for accurately distributing an input signal to multiple output channels; a power division port of the Y-type power divider structure is connected with the upper electrode through a double-contact structure; a cascaded through-hole, used for realizing cascaded operation of a double-layer double-pole double-throw switch, ensuring signal integrity and realizing efficient transmission.

The invention discloses a high-power fuel cell cathode plate structure, which comprises a fuel cell cathode plate provided with a diversion trench for air and cooling liquid to flow; the hydrogen public port, the cooling liquid public port and the air public port are all arranged on the inner side of the short edge of the fuel cell cathode plate; the air overturning kidney-shaped hole is formed in the inner side of the air public opening; the air distribution area and the air main flow area are arranged on the front surface of the fuel cell cathode plate; the cooling liquid distribution area, the cooling liquid main flow area and the air gap bridge area are all arranged on the reverse side of the fuel cell cathode plate; the air distribution area, the air main flow area, the cooling liquid distribution area and the cooling liquid main flow area are all provided with a plurality of convex ridges and flow guide grooves. According to the structure, the flow guide grooves for air and cooling liquid to flow are formed in the cathode plate of the fuel cell, so that the problems of overlarge pressure drop, insufficient heat dissipation and non-uniform flow caused by unilaterally increasing the active area of a single fuel cell are solved, the fluid resistance is reduced, and the whole stack power of the fuel cell is improved.

The application belongs to the technical field of radio frequency MEMS, and particularly relates to an X-shaped upper electrode type MEMS single-knife six-pole switch, which comprises a substrate, a microwave transmission line, a switch assembly and an air bridge. The microwave transmission line is arranged on the substrate. The microwave transmission line comprises an input signal line, a power divider, an output signal line and a ground line. The input signal line is arranged in one piece. The output signal line is arranged in six pieces. The input signal line is connected with the power divider. The power divider is connected with the output signal line through the switch assembly. The switch upper electrode of the application adopts an X-shaped double-end fixed beam structure. The anchor point is connected with the straight plate structure through a right-angle curved beam. The length of the upper electrode is indirectly increased. The elastic coefficient of the beam is reduced. The driving voltage is further reduced. The lower electrode top end adopts a semicircular structure. A funnel-shaped gradient structure is adopted at the connection position of the signal line. The two structures can reduce the coupling capacitance between the upper electrode and the lower electrode and improve the isolation of the switch. In addition, the three circular contacts are connected in parallel. The contact resistance is small. The current density is more uniform. The purpose of improving the insertion loss and improving the switch power capacity is achieved.

The invention provides a wafer film pasting device and a use method thereof, the structural design of a wafer carrier and a film pasting assembly is adopted, the film pasting assembly comprises a supporting body, a film clamping groove, a film attaching roller and a telescopic rod, and the specific use method comprises the steps that a wafer is horizontally placed in a containing groove, the film pasting assembly is fixed to the wafer carrier, and the film pasting assembly is fixed to the supporting body; a to-be-attached film is inserted into the film clamping groove, the to-be-attached film is driven to make contact with the top end of the side wall of the containing groove by moving the film clamping groove and the connecting arm downwards, the film is attached to the top end of the side wall through rolling of the film attaching roller, and finally the to-be-attached film is naturally attached to the surface of a wafer through the telescopic operation of overturning the film attaching device, removing the wafer carrier and the telescopic rod. The accuracy and high efficiency of the film pasting process are ensured, meanwhile, the air bridge structure is not extruded by external force during film pasting, and therefore the problem that in the prior art, an air bridge structure is prone to being extruded by external force and collapses, and then the yield is affected is solved.

The present application relates to the technical field of semiconductor device manufacturing, in particular to a preparation method of an ultra-low junction capacitance TVS protection device. The present application relates to the technical field of semiconductor device manufacturing, in particular to a preparation method of an ultra-low junction capacitance TVS protection device. + A gradient intrinsic layer-N + Doped structure, through a continuous concentration slope, an electric field distribution is optimized, and a problem of early breakdown caused by a peak electric field concentration is solved; an air bridge electrode process is innovated, a suspended interconnection isolated by air medium is formed by using a sacrifice layer release, and parasitic capacitance is completely eliminated; a multi-ring field limiting terminal and a pulse laser local annealing are combined, edge electric field suppression and lattice integrity control are realized. The method makes the device have ultra-low junction capacitance, nanosecond-level response and high robustness, and provides a revolutionary electrostatic protection solution for a high-speed communication system.

The air bridge simulation analysis method of a parameterized model, electronic equipment and a storage medium belong to the technical field of wind tunnel test design. In order to realize an air bridge simulation analysis method which is convenient to operate and simple to calculate. The air bridge simulation model parameters are set based on an L-shaped air bridge, including air bridge simulation model overall layout parameters, air bridge simulation model local size parameters, effectiveness detection is performed, and a parameterized air bridge simulation model is constructed; wind tunnel test load parameters are loaded, and parameterized air bridge simulation model verification analysis is performed; sensitive parameters are extracted from simulation model verification analysis results by using a parameter sensitivity analysis method, a sensitive parameter list is obtained, air bridge simulation analysis of the parameterized model is performed, and response surface optimization method is used to optimize simulation analysis results. The method for establishing a parameterized model is used to complete full-automatic establishment of the model by modifying parameters, realize automatic implementation of finite element simulation, and automatically extract calculation results.

The invention relates to a long-distance air bridge for preventing depression of a bridge floor and a preparation method thereof, and the method comprises the steps: enabling GaAs layers and InGaP layers to be alternately arranged for multiple times to form a first layer to an Nth layer, and enabling an Al < x > Ga < 1-x > As layer to be arranged below the Nth layer; depositing a first photoresist layer on the first layer, performing exposure / development, and etching the first layer to form a first mesa; etching the second layer and then removing the first photoresist layer; coating a second photoresist layer, performing exposure / development, etching the third layer to form a second mesa, and etching the fourth layer to remove the second photoresist layer; sequentially forming a third table-board to an a-th table-board according to the same operation; and coating an (a + 1) th photoresist layer on the outer side of the a-th table top, performing exposure / development, performing metal evaporation, removing metal and the (a + 1) th photoresist layer on the outer side of the a-th table top, and sequentially and completely etching the first layer and the Nth layer below the air bridge to complete the air bridge manufacturing process. According to the invention, a long-span air bridge structure is realized, and a window of an etching process is larger.

The invention belongs to the technical field of airplane wind tunnel test model design, and discloses a middle fuselage structure of a large-size low-speed wind tunnel turboprop airplane test model and a design method thereof, the middle fuselage structure adopts a composite design of combining an internal steel skeleton and an external aluminum alloy cover plate, and the internal steel skeleton is made of 30CrMnSiA alloy steel and serves as a main bearing structure; the outer aluminum alloy cover plate is made of 7075 aluminum alloy, and the aerodynamic shape of the middle fuselage is formed. A structure for installing wind tunnel test equipment such as a slip flow test air bridge is arranged on the internal steel framework, and the problems that the internal space of a traditional large-size middle fuselage is small, and the equipment is difficult to install are solved. Meanwhile, the method further comprises the optimal design of detachable upper and lower cover plates, a balance, a supporting rod connecting piece, a split type transition rectification bag and the like, and on the premise that the structural rigidity and strength and the test precision are guaranteed, the machining difficulty is greatly reduced, and the machining period and cost are greatly reduced. The method is suitable for manufacturing and testing the large-size low-speed wind tunnel turboprop aircraft test model.

This invention relates to the fields of radio frequency integrated circuits and advanced semiconductor packaging technology, and particularly to a multilayer spiral inductor structure and its fabrication method based on RDL technology. The fabrication method includes seed layer deposition, photolithography and electroplating to form gradient linewidth coils, alternating dielectric layer deposition, via etching to form vertical interconnect copper pillars, photoresist sacrificial layer process to form air bridges, and silicon nitride passivation packaging. This invention effectively improves the self-resonant frequency bandwidth and reduces conductor and dielectric losses through a fan-shaped topology layout, synergistic optimization of dielectric materials, and three-dimensional interconnect structure design, achieving miniaturized integration and high reliability of high-frequency inductor components.

The application provides a single-balanced mixer circuit based on a carbon nanotube Schottky diode, comprising the following structure: one end of the carbon nanotube Schottky diode is connected with a 180-degree hybrid junction structure, and one end is connected with a fan-shaped open circuit line structure; a radio frequency input impedance matching network is located between a radio frequency input port and the 180-degree hybrid junction; a local oscillator input impedance matching network is located between a local oscillator input port and the 180-degree hybrid junction; the fan-shaped open circuit line structure is located between the carbon nanotube Schottky diode device and a 1 / 4 wavelength high-impedance microstrip line; the 1 / 4 wavelength high-impedance microstrip line is located between the fan-shaped open circuit line structure and an air bridge; the air bridge is transversely arranged on the radio frequency input impedance matching network; a thin film resistor and a plate capacitor are connected on a intermediate frequency output line. The mixer circuit provided by the application can realize lower conversion loss in a high frequency band, and greatly reduces the parasitic capacitance of the Schottky diode device and the substrate loss of the passive device.

The application discloses a broadband waveguide-ground coplanar waveguide transition structure based on a double-dipole antenna, and belongs to the technical field of terahertz waves, which comprises an input end waveguide, a rectangular metal cavity, a terahertz integrated chip and an output end waveguide; the terahertz integrated chip comprises a substrate, an integrated structure, a back gold layer and two first dipole antenna transition sections; the integrated structure comprises two coplanar waveguide center conductive strips, a first coplanar waveguide ground layer, two second coplanar waveguide ground layers, a plurality of air bridges and four antenna structures; the antenna structure and the first dipole antenna transition section in the corresponding same end region form a pair of dipole antennas, and there are totally four pairs of dipole antennas. In the application, the transition section for connecting the coplanar waveguide ground layer in the traditional on-chip dipole antenna is placed in the back gold layer, so that the area occupied by the dipole antenna is greatly reduced, the electromagnetic energy coupling efficiency is improved, the bandwidth of the transition structure is expanded, the structure is simple, easy to process, and has a good application prospect.

The application provides a high-brightness LED module, comprising: a plurality of LED pixel units arranged in an array on a CMOS driving circuit substrate; wherein a first surface of an N-type epitaxial layer is formed with a light-emitting roughening structure; a metal air bridge structure is connected between the plurality of N-type epitaxial layers and extends on the sidewall and surface of a cathode column; a photoresist structure is arranged in an array with a plurality of fluorescent structure units in the photoresist structure; each fluorescent structure unit comprises: a mirror layer, a fluorescent structure and a lens structure; the mirror layer is formed on the sidewall of the fluorescent structure; the lens structure is formed at the top end of the corresponding fluorescent structure; wherein the fluorescent structure in the fluorescent structure unit is bonded to the light-emitting roughening structure in the LED pixel unit. The technical scheme solves the problem of improving the light gathering degree and the chip light-emitting brightness, and simultaneously improving the resolution of the LED module.