25 results about "Lateral overgrowth" patented technology

A heterogeneous epitaxial structure formed on a SiC (silicon carbide) substrate. An intermediate layer comprising AlN is formed overlying the SiC substrate. The surface of the intermediate layer comprises AlN formed by lateral epitaxial growth. The lateral epitaxial growth merges to form the surface comprising a MELO layer (merged epitaxial lateral overgrowth). The intermediate layer includes a carbon layer underlying the MELO layer. At least one device layer comprising GaN (gallium nitride) is formed overlying the surface of the intermediate layer in which one or more semiconductor devices are formed. The carbon layer is heated to fracture portions of the intermediate layer to separate the SiC substrate from the intermediate layer. The SiC substrate is not consumed by the separation thereby allowing perpetual reuse in semiconductor wafer processing.

The invention relates to a method for producing an electronic component. The method comprises: forming a first semiconductor layer of a first material on a substrate of a second material, wherein the first material differs from the second material; forming a dielectric structure on the first semiconductor layer, wherein the dielectric structure has a plurality of openings, and in the openings the first semiconductor layer is exposed; epitaxially forming a second semiconductor layer on the first semiconductor layer, which in the openings is exposed, and at least in a region above the dielectric structure, wherein the second semiconductor layer comprises or is formed from the first material; and forming a third semiconductor layer on or above the second semiconductor layer in a first region above the openings of the dielectric structure and in a second region above the dielectric structure. The method also comprises: forming a sacrificial structure on the second semiconductor layer; forming the third semiconductor layer on the sacrificial structure; and removing the sacrificial structure such that the third semiconductor layer is separated from the second semiconductor layer.

The invention concerns an optoelectronic device comprising a hole injection channel with inclined sidewalls extending through the active layer and an underlying first n-doped layer, such that charge carriers from a second p-doped layer arranged above the active layer are injected both vertically and laterally into the underlying active layer. Improved mobility of holes and a resultant higher rate of recombination results in improved quantum efficiency. The dimensions and location of the hole injection channel are controllable, allowing greater uniformity of performance. A method of manufacturing such an optoelectronic device based on an epitaxial lateral overgrowth process and an optoelectronic arrangement comprising such optoelectronic devices are also disclosed.

A heterogeneous epitaxial structure formed on a SiC (silicon carbide) substrate. An intermediate layer comprising AIN is formed overlying the SiC substrate. The surface of the intermediate layer comprises AIN formed by lateral epitaxial growth. The lateral epitaxial growth merges to form the surface comprising a MELO layer (merged epitaxial lateral overgrowth). The intermediate layer includes a carbon layer underlying the MELO layer. At least one device layer comprising GaN (gallium nitride) is formed overlying the surface of the intermediate layer in which one or more semiconductor devices are formed. The carbon layer is heated to fracture portions of the intermediate layer to separate the SiC substrate from the intermediate layer. The SiC substrate is not consumed by the separation thereby allowing perpetual reuse in semiconductor wafer processing.

A method for manufacturing an electronic component is provided.The method comprises: forming a first semiconductor layer on or above a substrate having a second semiconductor layer laterally adjacent to a dielectric structure, by means of an epitaxial lateral overgrowth method such that the first semiconductor layer laterally overgrows the dielectric structure from the second semiconductor layer; wherein the first semiconductor layer and the second semiconductor layer comprise or are formed from a semiconductor material; forming a third semiconductor layer on or above the first semiconductor layer such that the first semiconductor layer and the third semiconductor layer have a common interface, wherein the third semiconductor layer is configured to have a light-generating layer structure of the vertical surface emitter; and removing the substrate and removing at least part of the first semiconductor layer.

The invention relates to a silicon carbide platform and its fabrication by silicon carbide-on-silicon epitaxy. A method of manufacturing a silicon carbide platform includes providing a substrate including a silicon seed layer having a (001) lattice plane and a top surface parallel to the (001) lattice plane; and forming a silicon carbide epitaxial layer directly on the top surface of the silicon seed layer by epitaxial growth. In some embodiments, the silicon carbide platform may be formed using a silicon-on-insulator substrate. In some embodiments, the silicon carbide epitaxial layer may be grown on a mask layer by epitaxial lateral overgrowth. In some embodiments, the silicon carbide platform may include an additional layer, such as a III-V semiconductor layer disposed on and bonded to the silicon carbide epitaxial layer. In some embodiments, the silicon carbide epitaxial layer may be buried between two other layers.

The invention discloses a high-In-component gallium nitride-based LED epitaxial structure and device and a preparation method thereof, and belongs to the technical field of semiconductor device manufacturing. The epitaxial structure comprises a patterned InGaN template substrate, an epitaxial transverse overgrowth InGaN layer, an n-type semiconductor layer, a V-pits stress release layer, a multi-quantum well active region, a first p-type layer, an electron blocking layer and a second p-type layer from bottom to top. According to the epitaxial structure, the dislocation gathering position of a bottom layer template can be regulated and controlled, uniform distribution of space low stress of an epitaxial layer is promoted, and growth of a subsequent high-quality high-In-component LED epitaxial layer is facilitated, in the preparation method, on one hand, in-situ surface treatment is carried out on a quantum well region, impurity peaks related to defects can be relieved, and the light emitting purity of a device is guaranteed; and on the other hand, preparation of a small-size high-In-component GaN-based LED device can be realized in a low-dislocation and low-stress region, the risk of electric leakage is reduced, and the reliability of the device is improved.

A method of fabricating a semiconductor device, comprising: forming a growth restrict mask on or above a III-nitride substrate, and growing one or more island-like III-nitride semiconductor layers on the III-nitride substrate using the growth restrict mask. The III-nitride substrate has an in-plane distribution of off-angle orientations with more than 0.1 degree; and the off-angle orientations of an m-plane oriented crystalline surface plane range from about +28 degrees to about −47 degrees towards a c-plane. The island-like III-nitride semiconductor layers have at least one long side and short side, wherein the long side is perpendicular to an a-axis of the island-like III-nitride semiconductor layers. The island-like III-nitride semiconductor layers do not coalesce with neighboring island-like III-nitride semiconductor layers.

A method of fabricating a silicon carbide platform includes providing a base comprising a silicon seed layer having a (001) crystal lattice plane and a top surface parallel to the (001) crystal lattice plane, and forming a silicon carbide epitaxial layer by epitaxial growth directly on top of the silicon seed layer. In some embodiments, a silicon-on-insulator substrate may be used to form the silicon carbide platform. The silicon carbide epitaxial layer may, in some embodiments, be created by epitaxial lateral overgrowth over a mask layer. The silicon carbide platform may, in some embodiments, include additional layers, e.g., a III-V semiconductor layer disposed on and bonded to the silicon carbide epitaxial layer. The silicon carbide epitaxial layer may, in some embodiments, be buried between two other layers.

A merge layer of silicon carbide (SiC) or gallium nitride (GaN) is formed overlying a substrate. The substrate comprises SiC or GaN. A surface of the merge layer comprises an epitaxial layer formed by epitaxial lateral overgrowth. One or more epitaxial layers are formed overlying the merge layer. The surface of the merge layer is configured to reduce a propagation of defects from the substrate to the one or more epitaxial layers. A plurality of semiconductor devices are formed in or on the oner or more epitaxial layers.

The invention relates to a method of manufacturing a stacked structure comprising a layer of semiconductor material adhered to a substrate, comprising: manufacturing a heterostructure by:forming an interlayer made of a two-dimensional material on a growth substrate (1);patterning the interlayer with a plurality of openings to form a patterned interlayer (3);growing a semiconductor material on the patterned interlayer (3) by epitaxial lateral overgrowth to form a continuous epitaxial layer (4) on the patterned interlayer;forming a first assembly by bonding the heterostructure with a handle substrate (6), the continuous epitaxial layer being located at the bonding interface;separating the first assembly at the level of the patterned interlayer (3) so as to obtain a second assembly resulting from the transfer of the continuous epitaxial (4) layer from the heterostructure towards the handle substrate (6). Figure pour l’abrégé : Figure 7

A method for planarizing the surface on an epitaxial lateral overgrowth (ELO) layer, resulting in obtaining a smooth surface with island-shaped group-III nitride semiconductor layers. The island-shaped group-III nitride semiconductor layers are formed by stopping their growth before the ELO layers coalesce with each other. Then, a growth-limiting mask is removed before growing at least some group-III nitride device layers. Removing the mask reduces the excessive gas supply to the side facets of the island-shaped group-III nitride semiconductor layers, which helps to obtain a smooth surface on the island-shaped group-III nitride semiconductor layers. The method also avoids the compensation of the p-type layer by decomposed n-type dopants (such as silicon and oxygen atoms) from the mask.

The invention relates to a method of manufacturing a stacked structure comprising a layer of semiconductor material bonded to a substrate, comprising: the fabrication of a heterostructure by: forming an intermediate layer made of a two-dimensional material on a growth substrate (1); shaping the intermediate layer with a plurality of openings to form a shaped intermediate layer (3); growing a semiconductor material on the shaped intermediate layer (3) by epitaxial lateral overgrowth to form a continuous epitaxial layer (4) on the shaped intermediate layer; the formation of a first assembly by bonding the heterostructure to a manipulation substrate (6), the continuous epitaxial layer being located at the bonding interface;the separation of the first set at the level of the modeled intermediate layer (3) so as to obtain a second set resulting from the transfer of the continuous epitaxial layer (4) from the heterostructure to the manipulation substrate (6). Figure for the abstract: Figure 7;

The invention concerns an optoelectronic device manufactured on a growth template based on an epitaxial lateral overgrowth process. Modification of existing ELO processes allow processing of optoelectronic devices exhibiting high efficiency and characterized by low defect density.

The invention relates to a method for producing a stacked structure comprising a layer of semiconductor material bonded to a substrate, which comprises: producing a heterostructure by: • forming an intermediate layer made of a two-dimensional material on a growth substrate (1); patterning the intermediate layer with a plurality of openings to form a patterned intermediate layer (3); growing a semiconductor material on the patterned intermediate layer (3) by epitaxial lateral overgrowth to form a continuous epitaxial layer (4) on the patterned intermediate layer; forming a first assembly by bonding the heterostructure to a handling substrate (6), the continuous epitaxial layer being located at the bonding interface; separating the first assembly at the patterned intermediate layer (3) so as to obtain a second assembly resulting from transferring the continuous epitaxial layer (4) from the heterostructure to the handling substrate (6).

The invention concerns an optoelectronic device configured to achieve uniform charge carrier injection into the active region through a plurality of cavities with controllable position, dimensions, and distribution density. The plurality of cavities is formed through partial coalescence of lateral growth fronts in a facet controlled epitaxial lateral overgrowth (FACELO) process prior to device heterostructure deposition.

A method for fabricating a semiconductor device includes forming a growth-limiting mask on or above a group III nitride substrate, and growing one or more island-shaped group III nitride semiconductor layers on the group III nitride substrate using the growth-limiting mask. The group III nitride substrate has an in-plane off-angle orientation distribution of more than 0.1°, and the off-angle orientation of the m-plane oriented crystalline surface plane is within a range of about +28° to about -47° toward the c-plane. At least one long side and one short side of the island-shaped group III nitride semiconductor layer is perpendicular to the a-axis of the island-shaped group III nitride semiconductor layer. The island-shaped group III nitride semiconductor layer is not merged with neighboring island-shaped group III nitride semiconductor layers.

A method of forming two semiconductor wafers from a single reuseable semiconductor wafer is disclosed. The two semiconductors can be used for wafer processing or to generate new semiconductor wafers. A patterned layer is formed in a silicon carbide (SIC) substrate. The patterned layer includes a heatable material. An epitaxial layer is grown by epitaxial lateral overgrowth overlying the patterned layer to form a surface overlying the SiC substrate. At least one epitaxial layer by epitaxial vertical overgrowth is grown overlying the epitaxial layer. The heatable material is heated by one or more lasers to fracture or weaken the patterned layer. The epitaxial layer and the at least one epitaxial layer comprises a SiC epitaxial substrate. The SiC substrate is separated from the SiC epitaxial substrate.

To provide a small-sized light-emitting diode fabricated via comfortable regrowth.SOLUTION: A method for fabricating and transferring high quality and manufacturable light-emitting devices, such as small-sized light-emitting diodes (μLEDs), using epitaxial lateral overgrowth (ELO) and isolation methods. III-nitride ELO layers are grown on a host substrate using a growth restrict mask, and III-nitride device layers are grown on wings of the III-nitride ELO layers. The resulting devices are isolated from the host substrate while attached by a connecting link comprising an epitaxial or non-epitaxial bridge. A regrowth is performed on selected mesas of the device layers to realize improved devices with help of the bridge. The bridge is broken, and the devices are then plucked from the host substrate and placed on a display panel.SELECTED DRAWING: Figure 1

Two or more IGBTs (insulated gate bipolar transistors) formed in or on a 4H silicon carbide (SiC) A-plane <1120> substrate of a first type. A merge layer is formed in the SiC substrate. The merge layer comprises an epitaxial layer of the first type formed by on-axis epitaxial lateral overgrowth. At least one epitaxial layer is formed overlying a surface of the merge layer. The at least one epitaxial layer is of a second type and at least 25 microns thick. The at least one epitaxial layer is formed by vertical epitaxial overgrowth. The at least one epitaxial layer is at least 25 microns thick and is a drift layer for the two or more IGBTs. An exfoliation process is configured to separate the SiC substrate at the merge layer from the two or more IGBTs. The SiC substrate is prepared and reused to form other semiconductor devices.

A semiconductor die having one or more devices such as Schottky Barrier Diodes, transistors, passive devices, power transistors, photonic devices, light emitting diodes, lasers, or RF devices. The semiconductor die has a layer comprising a patterned layer merged with an epitaxial layer. One or more epitaxial layers are grown on or overlying a first surface of the layer. The one or more devices are formed in or overlying the one or more epitaxial layers. The layer and the one or more epitaxial layers are single crystal. The layer comprises silicon carbide. In one embodiment, the patterned layer is patterned by etching. The epitaxial layer is grown by epitaxial lateral overgrowth such that lateral fronts of the epitaxial layer merges with the patterned layer. A metal layer couples to a second surface of the layer. The one or more epitaxial layers comprises silicon carbide, gallium nitride gallium arsenide, or indium phosphide.

A method of growing a wafer scale, low defect density, strain relaxed template (SRT) for III-nitride-based devices, such as LEDs, LDs, FETs and heterostructure FETs. The SRT uses at least one highly defective III-nitride thin layer as a decomposition layer (DL), such as a thermally decomposed InGaN underlayer. Above the DL, a strain relaxed III-nitride-based layer is grown as a decomposition stop layer (DSL), which can be GaN, low In composition InGaN, or low Al composition AlGaN. The strain relaxed III-nitride-based layer is patterned and etched, with a first III-nitride-based film regrown on the patterned and etched strain relaxed III-nitride-based layer, wherein the first III-nitride-based film is coalesced by lateral overgrowth. One or more second III-nitride-based layers are grown on the first III-nitride-based film, with the second III-nitride-based layers' strain being at least partially relaxed.

A method of manufacturing a silicon-carbide platform comprises providing a base comprising a silicon seed layer having a (001) crystal lattice plane and a top surface parallel to the (001) crystal lattice plane and forming a silicon-carbide epitaxial layer by epitaxial growth directly on the top surface of the silicon seed layer. A silicon-on-insulator substrate may be used to form the silicon-carbide platform in some implementations. The silicon-carbide epitaxial layer may be grown by epitaxial lateral overgrowth over a mask layer in some implementations. The silicon-carbide platform may comprise additional layers, such as a Ill-V semiconductor layer disposed on and bonded to the silicon-carbide epitaxial layer in some implementations. The silicon-carbide epitaxial layer may be buried between two other layers in some implementations.

A method for flattening a surface on an epitaxial lateral overgrowth (ELO) layer, resulting in obtaining a smooth surface with island-like III-nitride semiconductor layers. The island-like III-nitride semiconductor layers are formed by stopping the growth of the ELO layers before they coalesce to each other. Then, a growth restrict mask is removed before at least some III-nitride device layers are grown. Removing the mask decreases an excess gases supply to side facets of the island-like III-nitride semiconductor layers, which can help to obtain a smooth surface on the island-like III-nitride semiconductor layers. The method also avoids compensation of a p-type layer by decomposed n-type dopant from the mask, such as Silicon and Oxygen atoms.

A method for producing high-quality, manufacturable apertures for light-emitting elements such as vertical-cavity surface-emitting lasers (VCSELs) using epitaxial lateral overgrowth (ELO). Strips comprising island-shaped III-nitride semiconductor layers are grown on a substrate using a growth-limiting mask, and the island-shaped III-nitride semiconductor layers are fabricated into a light-emitting resonant cavity having a minimum length across the strip. The apertures of the resonant cavity are also fabricated along the minimum length of the strip on the wing regions of the ELO. Distributed Bragg reflectors (DBRs) are fabricated as reflectors of the resonant cavity on the bottom and top of the ELO wing regions.