665results about How to "Warpage suppression" patented technology

A semiconductor manufacturing apparatus A semiconductor manufacturing apparatus comprises a hot plate which heats a sapphire substrate; a support table having a support plate disposed with being spaced away from the hot plate by a predetermined interval, and support portions which respectively support the sapphire substrate with being spaced by a predetermined interval between the hot plate and the support plate and support the sapphire substrate in such a manner that back surfaces of the hot plate and the sapphire substrate are opposite to each other; an elevating device which moves the support table up and down; and a shielding cover which externally blocks off spacing defined between the hot plate and the sapphire substrate and spacing defined between the sapphire substrate and the support plate.

The substrate processing apparatus according to the present invention is aimed to stably and efficiently perform a deposition process on a substrate W. The substrate processing apparatus supports the substrate W in a position facing a heater portion and thus rotates a holding member holding the substrate W. Furthermore, the heating portion houses a SiC heater and a heat reflecting member in an internal portion of a quartz bell jar made of transparent quartz, and depressurizes an internal space of a processing vessel and an internal space of the quartz bell jar at the same time; thereby allowing the thickness of the quartz bell jar to be thinner, and thus improving thermal conductivity of heat from the SiC heater and preventing contamination by the SiC heater.

The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113, and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101. The interconnect component 101 has a constitution where an interconnect layer 103, a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component.

A susceptor 24 includes a heater 38 disposed in a planar state, upper and lower ceramic-metal composites 40A and 40B disposed so as to sandwich the heater 38 from above and from below, and a ceramic electrostatic chuck 28 for attracting and holding an object to be treated, W. The electrostatic chuck is joined to an upper surface of the upper ceramic-metal composite 40A. The electrostatic chuck 28 has nearly the same coefficient of linear thermal expansion as that of the upper ceramic-metal composite 40A. Thus, peeling or cracking of the electrostatic chuck 28 due to the difference in thermal expansion and contraction between the electrostatic chuck 28 and the upper ceramic-metal composite 40A can be prevented.

In one embodiment of the present invention, there is provided a semiconductor device including a first semiconductor element mounted, through flip-chip bonding, on the element mounting surface of a first wiring substrate, and a resin layer that coats substantially the entire element mounting surface of the first wiring substrate. The first semiconductor element has two opposite surfaces. One surface faces the element mounting surface of the first wiring substrate, and the other surface is not coated by the resin layer.

A nitride semiconductor substrate including (a) a supporting substrate, (b) a first nitride semiconductor layer having a periodical T-shaped cross-section, having grown from periodically arranged stripe-like, grid-like or island-like portions on the supporting substrate, and (c) a second nitride semiconductor substrate covering said supporting substrate, having grown from the top and side surfaces of said first nitride semiconductor layer, wherein a cavity is formed under the second nitride semiconductor layer.

A protective layer having a periodically arranged stripe-like, grid-like or island-like apertures is formed on the supporting substrate. The first nitride semiconductor layer is laterally grown from the exposed portion of the substrate. The growth is stopped before the first nitride semiconductor layer covers the supporting substrate. Thus, the first nitride semiconductor layer has a periodical T-shaped cross-section. Then, the protective layer is removed and the second nitride semiconductor layer is grown from the top and side surface of the first nitride semiconductor layer to cover the substrate.

There is provided a collective printed circuit board including a plurality of printed circuit boards each having a mounting unit on which a semiconductor element is mounted at an upper-surface central portion, and a frame having a plurality of through holes having sizes to surround the mounting portion. Upper-surface peripheral edge portions of the printed circuit boards and a through-hole peripheral portion of the frame are bonded to each other such that the mounting units are exposed from the through holes.

An electronic component mounting base board has an insulating substrate provided with a conductor circuit and a mount portion for an electronic component, and a heat slug adhered to the insulating substrate, wherein the heat slug is comprised of a flat main body and a projection portion extending vertically from a side face of the main body, and provided with a slit deforming portion absorbing deformation of the insulating substrate.

An interconnecting substrate is provided with a base insulating film having a sunken section in a bottom surface thereof, a first interconnection provided in the sunken section, a via hole formed in the base insulating film, and a second interconnection which is connected to the first interconnection via a conductor within the via hole and is formed on a top surface of the base insulating film, wherein the interconnecting substrate comprises a first interconnection pattern formed of the first interconnection which comprises at least a linear pattern which extends along a second direction orthogonal to a first direction, and a warpage-controlling pattern which is provided in the sunken section in the bottom surface of the base insulating film and is formed in such a manner as to suppress a warpage of the interconnecting substrate toward a bottom side on both sides of the first direction.

The present invention relates to a self-rolling pressure-sensitive adhesive sheet, comprising a shrinkable film layer which is contractible in at least one axial direction; a restriction layer restricting a contraction of the shrinkable film layer, the restriction layer being disposed on a side of the shrinkable film layer; and a pressure-sensitive adhesive layer disposed on the side of the restriction layer which is opposite to the side on which the shrinkable film layer is disposed, the self-rolling pressure-sensitive adhesive sheet being a releasable pressure-sensitive adhesive sheet, in which the pressure-sensitive adhesive layer or the pressure-sensitive adhesive layer after an adhesiveness decreasing treatment has a pressure-sensitive adhesive power (180° peeling, against a silicon mirror wafer, tensile speed: 300 mm/min) of 6.5 N/10 mm or less, and in which the self-rolling pressure-sensitive adhesive sheet rolls up in one direction from an end to form one tubular roll or rolls up from two opposing ends toward a center of the two opposing ends to form two tubular rolls, when the self-rolling pressure-sensitive sheet is stimulated to induce the contraction of the shrinkable film layer. The self-rolling pressure-sensitive adhesive sheet can be very easily peeled off from an adherend without causing a damage or a contamination on the adherend, even when it is adhered to an adherend of a relatively low strength.

A semiconductor device includes: a semiconductor chip mounted on a mounting substrate; a first resin filling a gap between the chip and the substrate; a frame-shaped stiffener surrounding the chip; a first adhesive for bonding the stiffener to the substrate; a lid for covering the stiffener and an area surrounded by the stiffener; and a second resin filling a space between the stiffener and the chip. A thermal expansion coefficient of the second resin is smaller than that of the first resin. The first resin includes an underfill part filling a gap between the chip and the substrate and a fillet part extended from the chip region.

A method of manufacturing a wiring board includes: forming a first insulating layer on a supporting board; mounting at least one reinforcing member on the first insulating layer; mounting at least one semiconductor chip on the first insulating layer; forming a second insulating layer on the reinforcing member and the semiconductor chip; and forming a wiring on the second insulating layer, the wiring being connected to the semiconductor chip.

A probe card is provided that is capable of accurately ensuring the flatness and the parallelism with respect to a predetermined reference surface. A point (Q) of application of force applied from a leaf spring (17) that presses a portion near an edge portion of a surface of a probe head (15) from which a plurality of probes projects over an entire circumference in a direction of a substrate to the probe head (15) is positioned inside of an outer edge of the probe head (15), and a point (P) of application of force applied from the retainer (16) that presses a portion near an edge portion of a space transformer (14) over an entire circumference in the direction of the substrate to the space transformer (14) is positioned inside of an outer edge of the space transformer (14).

One side of a substrate film 11 is coated with a coating composition containing (A) a reactive particle produced by chemically bonding an organic compound having at least one polymerizable unsaturated group in its molecule to an inorganic oxide particle, (B) a monomer or oligomer of an organic compound having at least two polymerizable unsaturated groups in its molecule, (C) an organic compound with a weight average molecular weight of at least 1500 and having at least one polymerizable unsaturated group in its molecule, and, if desired, (D) a siloxane compound having a dimethylsiloxane skeleton, and the coating composition is cured by irradiation with ionizing radiation to form a hard coat layer 12 with a thickness of 2 to 20 μm. This provides a hard coat film having adequate surface hardness and suppressed warpage.

The present invention provides a polarizing film or a polarizer that has an elastic modulus of at most about 3500 N/mm² and suppresses occurrence of warping, the polarizing film is obtained by adsorbing a dichroic material in a polyvinyl alcohol-based film 20 μm in thickness and stretching the tilin. The polarizing film has a transmittance of at least 43% and a polarization degree of at least 98%. A transparent protective layer is laminated on at least one surface of the polarizing film to form a polarizing plate.

A wiring board includes: a semiconductor chip; an insulating layer in which the semiconductor chip is embedded; a wiring connected to the semiconductor chip; and reinforcing layers for reinforcing the insulating layer, the reinforcing layers respectively formed on a front face side of the insulating layer and a rear face side of the insulating layer.

The invention belongs to the technical field of construction engineering and provides a secondary lining integral formworking construction method for a tunnel with a super-large cross section. The method includes a main line which includes bogie designing and manufacturing, track laying, assembling and adjusting, bogie front and back position adjusting and locking, plug formwork erecting, formwork center line elevation adjusting, concrete pouring, curing, formwork removing and next formwork constructing; in the main line, surveying and setting out, waterproof board laying, rebar manufacturing and mounting, rebar checking and accepting and plug formwork erecting are performed; in the main line, concrete raw material selecting, concrete mix proportion optimizing, mix proportion onsite checking, concrete agitating and concrete pouring are performed; in the main line, formwork bogie locking device checking and concrete pouring are performed; in the main line, curing and roughened joint treating are performed. By integration of specially-made assembly frame and large formwork, the integral formwork bogie is formed, and one-time pouring forming of secondary lining concrete is guaranteed.

The invention provides a preparation method for a BiFeO3 target material. The preparation method for the BiFeO3 target material comprises the following steps: carrying out grinding, ball milling, preburning, re-ball milling, granulation and screening for the mixture of bismuth oxide Bi2O3 and ferric oxide Fe2O3 to obtain the target material; and then carrying out batch dropping, baking, heating with pressure, heat insulation and cooling for the target material. The invention also provides a method for preparing a film through the BiFeO3 target material. The method comprises the following steps: selecting a Pt/TiO2/SiO2/p-Si substrate; preparing the BiFeO3 film through a radio frequency magnetron sputtering method; and finally carrying out the annealing treatment of the prepared BiFeO3 film. The target material has the advantages of no impurity phase, levelness and compactness. The film prepared through the target material has a compact and even surface, better crystallinity, no impurity phase, low drain current, saturated electric hysteresis loop, good fatigue characteristic, and good repeatability.

The invention discloses a preparation method of a low stress state composite substrate for GaN growth. The preparation method comprises that a GaN monocrystal epitaxial layer is prepared on a sapphire substrate; a stress compensation layer is deposited at the back side of a thermally and electrically conductive transfer substrate of high welding point; bonding dielectric layers of high welding point are prepared at the surfaces of a GaN epitaxial wafer and the transfer substrate respectively; the GaN epitaxial wafer is bonded to the thermally and electrically conductive substrate by the high-temperature diffusion bonding technology; and the composite substrate with high temperature stability and low stress state for GaN growth is obtained. According to the composite substrate of the invention, homoepitaxy can be realized and a vertical structural device can be directly prepared as a traditional composite substrate, the low stress state and high-temperature stability can be also realized, and the quality of subsequent GaN epitaxial growth and chip preparation can be effectively improved.

The present invention provides a semiconductor device comprising a lower substrate having at least one wiring pattern formed of a plurality of wirings, a semiconductor chip positioned above the lower substrate and electrically connected to the wirings, an intermediate member which seals the semiconductor chip in columnar form and substantially, and an upper plate which substantially covers a whole upper surface of the intermediate member. A thermal expansion coefficient of the upper plate and a thermal expansion coefficient of the lower substrate are set substantially identical.