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Circuit substrate for packaging semiconductor device, method for producing the same, and method for producing semiconductor device package structure using the same

a semiconductor device and circuit substrate technology, applied in the direction of transportation and packaging, layered products, chemical instruments and processes, etc., can solve the problems of reducing the performance of a semiconductor circuit, failures, or breakages, and the diameter of solder bumps is so large, so as to achieve high productivity, prevent degradation, and high productivity

Inactive Publication Date: 2005-07-28
ONO MASAHIRO +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This solution enables reliable, stress-free connections between semiconductor devices and circuit substrates, allowing for miniaturization and high productivity with reduced risk of damage or failure, while maintaining the integrity of semiconductor device performance.

Problems solved by technology

However, a diameter of solder bumps is so large that an electrode arrangement for mounting with area array arrangement has been limited to an electrode pitch of about 250 μm, if necessity of miniaturizing processes of substrates and package reliability are considered.
This force may damage a semiconductor circuit or may cause failures, or breakage, of A1 interconnections on the semiconductor substrate.
In packaging by using this method, the conductive resin in its entirety is cured while the semiconductor substrate is being pressed with a large force so as to be brought into direct contact with the input / output terminal electrodes of the substrate, so that stress occurring between electrodes facing each other produces residual stress within the semiconductor substrate, thereby reducing performance of a semiconductor circuit.
In particular, pressure exerted on the bump electrodes at a time of mounting may cause the input / output terminal electrodes of the circuit substrate to be deformed into fracture during via hole filling of the substrate connected to the electrodes, resulting in faulty connections in the circuit substrate.
In the packaging technique disclosed in Japanese Patent Publication No. 8-037206, there has been a problem in that bonding of a large number of ball bumps to adhesive layers reduces reliability because small pieces of a conductive sheet punched from a conductive adhesive sheet must be handled.
While loads during packaging are partially applied only to the vicinity of the electrodes, thereby reducing damage to a semiconductor device, an increase in pressure for ensuring bonding may cause a risk with regard to destructing via holes beneath pad electrodes on a circuit substrate because bump electrodes apply pressure to the pad electrodes and stress the pad electrodes.
Another problem is that the conductive adhesive sheet is very weak in terms of adhesive strength for joining the semiconductor device to the circuit substrate, thereby resulting in reducing reliability of a semiconductor package.
Though the bumps might be deformed so as to collapse and bonding could be thereby reinforced, there is a danger that such a deformation might result in damage to the semiconductor chip as described above.

Method used

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  • Circuit substrate for packaging semiconductor device, method for producing the same, and method for producing semiconductor device package structure using the same
  • Circuit substrate for packaging semiconductor device, method for producing the same, and method for producing semiconductor device package structure using the same
  • Circuit substrate for packaging semiconductor device, method for producing the same, and method for producing semiconductor device package structure using the same

Examples

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embodiments

Embodiment 1

[0098]FIG. 11 shows a schematic section of a package structure for a semiconductor device 5 used in a test that will be described below, i.e., a structure in which bump electrodes of the semiconductor device 5 are mounted on input / output terminal electrodes of a circuit substrate, with junction layers between, and which structure is reinforced with a sealing resin.

[0099] In Embodiment 1, Au bumps formed as the bump electrodes by performing a wire bonding method were mounted on the input / output terminal electrodes of the circuit substrate through conductive adhesive as the junction layers, and sealing with an epoxy sealing resin was executed.

[0100] In conventional example 1, Ni—Au electroless plated bumps were used as bump electrodes, solder was used as junction layers, and an ultraviolet curing epoxy resin was used as a sealing resin.

[0101] In each of Embodiment 1 and conventional example 1, a package structure for an n-channel MOS transistor was produced, and deteri...

embodiment 2

[0111] Packaging tests were conducted with use of a circuit substrate of the invention. A circuit substrate having a glass-epoxy main body (FR4) was used, and the package structure shown in FIGS. 2A and 2B was tested. An epoxy resin film having a thickness of 50 μm was attached to a surface of the main body of the circuit substrate, including top surfaces of input / output terminal electrodes.

[0112] As bump electrodes of a semiconductor device, Au bumps with a size of its pointed head being 20 square μm were formed according to a wire bonding method. In a mounting structure, semiconductor device 5 had the bump electrodes on a chip pressed against and connected to the input / output terminal electrodes of the circuit substrate having the resin film previously bonded to the main body thereof, and the structure was reinforced by sealing resin filled into a space between the resin film and the chip. Tests were conducted with a variation of loads for pressing the bump electrodes of the semi...

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Abstract

The invention is intended for providing a semiconductor package structure which prevents degradation in characteristics of a semiconductor device, and breakage of interconnections, when the semiconductor device is packaged on a circuit substrate. In the package structure having the semiconductor device mounted on the circuit substrate, bump electrodes of the semiconductor device are placed on input / output terminal electrodes of the circuit substrate and are electrically and mechanically connected thereto by bonding with a conductive adhesive, and the semiconductor device is bonded and fixed to the circuit substrate by a resin film formed previously on a surface of a main body of the circuit substrate. The structure does no damage to a semiconductor functional part and to interconnections, and allows mounting with a lower load as compared to structures using conventional anisotropic conductive films and the like.

Description

[0001] This application is a divisional of U.S. Ser. No. 10 / 030,739, filed Jan. 11, 2002, which is a National Stage of International Application No. PCT / JP01 / 03922, filed May 11, 2001.TECHNICAL FIELD [0002] The present invention relates to a circuit substrate to have mounted thereon a semiconductor device and a method of producing the same. The invention also relates to a method of mounting a semiconductor device, with use of such a circuit substrate. BACKGROUND ART [0003] As one of techniques for mounting semiconductor devices on a circuit substrate, a flip chip mounting method has been known. In this method, bump electrodes are formed on a surface of a semiconductor chip on the same side that a functional element thereof is formed, and the bump electrodes are connected through an adhesive layer to input / output terminal electrodes arranged on a circuit substrate. In this method, the bump electrodes are formed of gold (Au), nickel (Ni) or the like by plating, and for an adhesive lay...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/56H01L21/60H01L23/498H05K3/32
CPCH01L21/563H01L23/49811H01L24/27H01L24/31H01L24/81H01L24/83H01L2224/1134H01L2224/13111H01L2224/13144H01L2224/16225H01L2224/73203H01L2224/73204H01L2224/81193H01L2224/81801H01L2224/83101H01L2224/83192H01L2224/838H01L2924/01005H01L2924/01013H01L2924/01015H01L2924/01027H01L2924/01029H01L2924/0103H01L2924/01033H01L2924/01046H01L2924/01047H01L2924/0105H01L2924/01051H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/0781H01L2924/09701H01L2924/14H05K3/321H01L24/29H01L2224/32225H01L2224/2919H01L2924/01006H01L2924/014H01L2924/0665H01L2224/29499H01L2924/07811H01L2224/83851H01L2224/29082H01L2224/73104H01L2924/13091Y10T156/1056Y10T428/24983Y10T428/24917H01L2924/00H01L2924/3512H01L24/13H01L24/16H01L2224/05568H01L2224/05573H01L2224/1329H01L2224/13318H01L2224/13339H01L2224/13344H01L2224/13347H01L2224/13355H01L2224/13357H01L2224/1336H01L2224/13364H01L2224/13369H01L2224/13386H01L2224/1339H01L2224/13444H01L2224/2929H01L2224/81101H01L2924/00014H01L2924/12042H01L2924/15787H01L2224/29347H01L2224/29344H01L2224/29339H01L2224/29355H01L2224/29357H01L2224/2936H01L2224/29364H01L2224/29369H01L2224/29318H01L2224/29444H01L2224/05599
Inventor ONO, MASAHIROSHIRAISHI, TSUKASA
Owner ONO MASAHIRO
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