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373results about How to "Improve interface properties" patented technology

Semiconductive metal oxide thin film ferroelectric memory transistor

The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2. The present invention ferroelectric transistor can be a metal-ferroelectric-semiconductive metal oxide FET having a gate stack of a top metal electrode disposed on a ferroelectric layer disposed on a semiconductive metal oxide channel on a substrate. Using additional layer of bottom electrode and gate dielectric, the present invention ferroelectric transistor can also be a metal-ferroelectric-metal (optional)-gate dielectric (optional)-semiconductive metal oxide FET.
Owner:SHARP KK

Semiconductive metal oxide thin film ferroelectric memory transistor

The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2. The present invention ferroelectric transistor can be a metal-ferroelectric-semiconductive metal oxide FET having a gate stack of a top metal electrode disposed on a ferroelectric layer disposed on a semiconductive metal oxide channel on a substrate. Using additional layer of bottom electrode and gate dielectric, the present invention ferroelectric transistor can also be a metal-ferroelectric-metal (optional)-gate dielectric (optional)-semiconductive metal oxide FET.
Owner:SHARP KK

High-multiplying power lithium ion battery and preparation method thereof

The invention discloses a high-multiplying power lithium ion battery and a preparation method thereof. The lithium ion battery comprises a cathode plate, an anode plate, a composite diaphragm and an electrolyte solution, and the surfaces of the diaphragm are coated with composite conductive layers; each composite conductive layer is composed of a bonding agent, a conductive agent and micropores; the cathode plate and the anode plate are each of a full-tab structure. The preparation method comprises the steps that the diaphragm coated with the composite conductive layers, the cathode plate and the anode plate are subjected to a winding process to prepare a wound core, and the wound core is subjected to the processes of packaging, baking, liquid injecting, hot-cold pressing, forming and capacity grading to prepare the high-multiplying power lithium ion battery. According to the high-multiplying power lithium ion battery and the preparation method thereof, by improving the characteristics of the interfaces between the diaphragm and cathode and anode membranes and optimizing the structural design of the battery, the bonding performance of the contact interfaces between the diaphragm and the cathode and anode plates is improved, the lithium ion transfer resistance between the different interfaces is decreased, the electronic conductivity of the cathode and anode plates is enhanced, the porosity and the air permeability of the composite diaphragm are improved, wetting of the electrolyte solution to the diaphragm is improved, the retaining capacity of the electrolyte solution in the battery is improved, the high-multiplying power performance of the lithium ion battery is greatly improved, the high-multiplying power discharge capacity retention rate is increased by 10% or above compared with the prior art, and the high-multiplying power lithium ion battery is suitable for industrialized production.
Owner:CENT SOUTH UNIV

VDMOS transistor and preparation method thereof

The invention discloses a VDMOS transistor and a preparation method thereof and belongs to the field of semiconductors. The VDMOS transistor comprises a first conduction type substrate, a first conduction type epitaxial layer, a second conduction type injection region, a first conduction type highly doped source region and a grid structure, the second conduction type injection region and the first conduction type highly doped source region are arranged in the epitaxial layer, and the grid structure comprises a grid insulating layer, a semi-insulating polycrystalline silicon layer, a silicon oxynitride layer and a polycrystalline silicon layer. The grid insulating layer is arranged above a drift region of the epitaxial layer, the semi-insulating polycrystalline silicon layer is arranged above the grid insulating layer, the silicon oxynitride layer is arranged above a channel region, and the polycrystalline silicon layer is covered on the semi-insulating polycrystalline silicon layer and the silicon oxynitride layer. A heat nitriding silicon oxynitride layer is introduced into the preparation method, a traditional silica layer which is used as a gate medium layer on a channel is replaced, and the semi-insulating polycrystalline silicon layer is added on an oxide layer which is arranged above the drift region of the epitaxial layer. The VDMOS transistor and the preparation method thereof can obviously reduce grid-drain capacitance and achieve overcoming the defects that insulating performance of the grid insulating layer is poor, current leaking of a grid electrode is increased, and degeneration of the VDMOS performance is unreliable.
Owner:SOUTH CHINA UNIV OF TECH

Silicon carbide-based composite foamed ceramic of multilayer hole rib structure and preparation method thereof

The invention discloses a silicon carbide-based composite foamed ceramic of a multilayer hole rib structure and a preparation method thereof. The preparation method comprises the following steps: uniformly mixing silicon carbide, micro alumina powder, silicon powder, ammonium lignosulfonate, polycarboxylate and water so as to prepare slurry I; uniformly mixing micro alumina powder, a silicon source polycarboxylate and water so as to prepare slurry II; then dipping polyurethane sponge in the slurry I, and successively carrying out extruding or slurry centrifugation, drying and heat preservation at 600 to 850 DEG C for 0.5 to 3 h so as to obtain a presintered body of silicon carbide foamed ceramic; subjecting the presintered body of silicon carbide foamed ceramic to vacuum dipping in the slurry II and successively carrying out slurry centrifugation and drying so as to obtain a green body of silicon carbide-based composite foamed ceramic; and carrying out heat preservation at 1300 to 1500 DEG C in an air atmosphere for 2 to 4 h so as to prepare the silicon carbide-based composite foamed ceramic of the multilayer hole rib structure. The preparation method has the characteristics of simple process and low cost; and the prepared silicon carbide-based composite foamed ceramic of the multilayer hole rib structure has high mechanical strength, good thermal shock resistance and excellent high-temperature anti-oxidation performance.
Owner:WUHAN UNIV OF SCI & TECH

High-frequency and low-noise gallium nitride transistor structure with high electronic mobility

The invention relates to a high-frequency and low-noise gallium nitride transistor structure with high electronic mobility. The structure comprises a substrate, an aluminium nitride nucleating layer arranged on the substrate and a gallium nitride cushioning layer arranged on the aluminium nitride nucleating layer; the substrate, the aluminium nitride nucleating layer and the gallium nitride cushioning layer are sequentially overlapped from bottom to top; the high-frequency and low-noise gallium nitride transistor structure with the high electronic mobility is characterized in that an InGaN inserting layer for improving roughness of a component interface, an aluminium nitride inserting layer for improving a potential barrier, an AlGaN isolating layer, an AlGaN electronic providing layer, an AlGaN potential barrier layer as well as a source electrode, a grid electrode and a drain electrode which are respectively in ohm connection with the AlGaN potential barrier layer are sequentially overlapped on the gallium nitride cushioning layer. The high-frequency and low-noise gallium nitride transistor structure has the beneficial effects that two-dimensional electronic gas is better bound in a potential well, therefore, scattering of the two-dimensional electronic gas caused by impurities in a channel layer is reduced, and a saturated rate and a mobility ratio of the two-dimensional electronic gas are increased, and a noise performance of a device is improved, particularly a high-frequency noise performance.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Fabrication method for transistor with composite gate dielectric GaN-based insulating gate and high electron mobility

The invention discloses a fabrication method for a transistor with a composite gate dielectric GaN-based insulating gate and high electron mobility, mainly aims to solve the problem of low reliability a similar device. The fabrication method comprises the steps of manufacturing a source electrode, a drain electrode and an electric isolating region of an active region on an epitaxial wafer, and enabling an SiN passivation layer to be grown; photoetching and etching a gate slot region in the SiN passivation layer; enabling an AlN dielectric layer to be grown on the gate slot and the SiN passivation layer, and oxidizing the AlN dielectric layer into an AlON composite gate dielectric layer through thermal oxidization or plasma auxiliary oxidization process; manufacturing a gate electrode on the gate dielectric layer; enabling an SiN protection layer to be grown on the gate electrode and the gate dielectric layer out of the gate electrode region; photoetching and etching a metal interlinked open pore region in the SiN protection layer; and manufacturing a metal interlinking layer on the interlinked open pore region and the unopened and non-etched SiN protection layer to complete the manufacturing of the device. By adoption of the fabrication method, the interface characteristic of the device is improved, the reliability of the device is improved, and the device can be used as an efficient microwave power device.
Owner:XIDIAN UNIV

Manufacturing method of lithium ion battery containing gel electrolyte

The invention belongs to the technical field of a lithium ion battery, and particularly relates to a manufacturing method of a lithium ion battery containing gel electrolyte. The manufacturing method comprises the steps of preparation of a micro-pore isolating diaphragm plate, preparation of a cell, pouring of the electrolyte, after-treatment and the like. Compared with the prior art, the manufacturing method provided by the invention adopts a two-step method to polymerize gel; a good cathode pole sheet/electrolyte interface and a good anode pole sheet/electrolyte interface are formed on the cell by a pre-gelling step; in a formation process, a cathode activity material and an anode activity material can be sufficiently activated; the lithium ion battery is pressurized in a heating process after the formation is completed, so that air bubbles generated in the formation process of the battery and existing between the cathode pole sheet/electrolyte interface and the anode pole sheet/electrolyte interface can be removed; and an interface gap can be smaller, thereby being beneficial to the generation of the cathode pole sheet/electrolyte interface and the anode pole sheet/electrolyte interface. Therefore, the battery has better electrochemical performance.
Owner:DONGGUAN AMPEREX TECH
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