Grid structure from material with high dielectric constant and preparing technique

Abstract

Oxidizing surface of silicon chip grows a very thin silicon oxynitride layer as a buffer of interface between material with high dielectric constant and silicon substrate in order to insulate diffusion between impurity element in material with high dielectric constant and silicon substrate. Carrying out nitrogen treatment for surface of material with high dielectric constant or depositing a thin layer of silicon nitride covers material with high dielectric constant. The nitrogen treated surface or deposited thin layer as interface layer between material with high dielectric constant and polysilicon blocks off penetration from boron P+ polycrystal. In the invention , grid structure is in sandwich type. The invention is applicable to not more than 65 Nano CMOS technique.

Description

technical field

[0001] The invention belongs to the technical field of integrated circuit manufacturing technology, and in particular relates to a high dielectric constant material gate structure and a preparation technology thereof. Background technique

[0002] With the rapid development of integrated circuit technology, the device size becomes smaller and smaller, especially when the CMOS process technology enters below 65 nanometer technology, the conventional silicon oxide gate has become thinner than its reliable physical limit thickness, thus oxidation Transistors fabricated with silicon gates will have very large gate leakage currents and cause CMOS transistors to lose their switching characteristics. Therefore, in order to continue to utilize the well-developed large-scale CMOS production process technology, people must use a high-dielectric constant (high-k) material to replace the traditional silicon oxide gate, increasing the gate thickness (but equivalent A sil...

Images