239 results about "Voltage doubler" patented technology

A first charge pump includes a collection of voltage adder stages. The first voltage adder stage receives an input voltage VCC and in response to a clock signal provides a first voltage signal alternating between 2*VCC and VCC. The Nth voltage adder stage receives an input voltage VCC and a first voltage signal from the preceding stage, and provides a second voltage signal alternating between N*VCC and VCC. The capacitors included within each adder stage are required to sustain a maximum voltage of VCC. In an alternate embodiment the first charge pump may be combined with one or more voltage doubler stages to produce even higher output voltages.

An envelope tracking power supply has a multiple-output DC / DC converter, a switch bank, an output voltage selector and an output filter. The DC / DC converter has an alternating current generating portion and a full rectifying portion. The alternating current generating portion, typically a LC circuit, can receive an input voltage and operate at zero voltage switching. The full rectifying portion includes at least one secondary winding and one voltage doubler output. Each voltage doubler has a first transistor, a second transistor, a first capacitor and a second capacitor. The transistors used as rectifier devices allow currents to flow bi-directionally and sink and source the currents from and to output capacitors to keep their voltage balance. Secondary windings and output capacitors are connected in series respectively. A switch bank selects a desired voltage from the series connected capacitors and connects it to the output filter. The switch bank receives an envelope tracking command from the voltage selector and provides a step voltage to the output. The output voltage is changed at switching speed to track a high bandwidth envelope signal.

This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.

A half-bridge inverter is used for a high frequency alternating current power supply to be connected to a primary side of a contactless power transformer, and a voltage-doubler rectifier is used to convert a secondary-side alternating current output of the contactless power transformer into a direct current.

This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.

This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.

A switching power supply circuit ready for a wide range and including a power factor improving function is disclosed which can achieve reduction in cost, reduction in size and weight of the circuit and reduction of the power loss by reducing the number of converter sections with respect to the number of stages in a starting order of secondary side DC output voltages. A plurality of switching converters (101), (102) are of the composite resonance type wherein a partial resonance voltage circuit is combined with a switching converter of the current resonance type according to a half-bridge connection system. Changeover control is performed such that a rectification circuit serves as a voltage doubler rectification circuit at an AC voltage equal to or lower than 150 V, but serves as a full-wave rectification circuit at another AC voltage equal to or higher than 150 V. Power factor improvement is implemented by feeding back the voltages of outputs of the converters to a rectification current path by a power factor improving transformer (VFT) and interrupting the rectification current by means of a rectification diode to expand the

A multi stage voltage pumping circuit includes a plurality of voltage pumping stages each operated by a first clock signal and a second clock signal for raising a voltage level of an inputted voltage; and a plurality of charge storing means each connected to outputs of the plurality of voltage pumping stages respectively except for a last voltage pumping stage in order to store charge, wherein each of the plurality of voltage pumping stages is a cross coupled voltage doubler and an output of a previous voltage pumping stage is connected to an input of a next voltage pumping stage.

This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.

This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.

A multi-level rectifier is presented that is suitable for use at high frequencies, including into MHz range such as in the 6.78 MHz band used for wireless power transfer. Depending on the amplitude of the input waveform, the rectifier can be operated in different modes. For lower input levels, the rectifier acts as a voltage doubler. For higher input levels, the impedance of the rectifier can be varied based on the input level. The rectifier is a synchronous rectifier with a front section and a back section, where the impedance is varied by changing the phase of the control signal of the back section relative to that of the front section.

A driver circuit provides a driving signal to the power stage of a switched mode power supply in correspondence with a pulse width modulated duty cycle. A voltage doubler circuit including a bucket capacitor and plural switches is arranged to successively couple the bucket capacitor to the input power source and to the driver circuit. The voltage doubler circuit thereby provides the driving signal to the driver circuit having a voltage approximately double the corresponding voltage of the input power source. The voltage doubler circuit discharges the bucket capacitor into the driver circuit to provide the driving signal in correspondence with a first portion of the pulse width modulated duty cycle, and the voltage doubler circuit recharges the bucket capacitor in correspondence with a second portion of the pulse width modulated duty cycle. The power switch comprises an internal capacitance, wherein charge stored in the bucket capacitor is transferred to the internal capacitance of the at least one power switch during the first portion of the pulse width modulated duty cycle. Remaining charge in the internal capacitance of the power switch is recycled back to the bucket capacitor during the second portion of the pulse width modulated duty cycle.

In one embodiment, a voltage rectifier circuit for a radiation generator is provided. The voltage rectifier circuit is configured to be used in a voltage multiplier circuit and a voltage doubler circuit. The voltage rectifier circuit comprises at least one first printed circuit board and at least one second printed circuit board coupled to each other using a plurality of connectors. Further, each printed circuit board comprises, a first terminal, a second terminal, a third terminal, a diode assembly externally connected between the first terminal and the second terminal and a capacitor assembly embedded between the second terminal and the third terminal.

A new scheme of Schottky FPGA (SFPGA) IC solution is proposed. The chip is organized by embedded analog, memory, and logic units with on chip apparatus and software means to partitioning, altering selected portions of hardware. The process means is based on the combined Schottky CMOS (SCMOS, U.S. Pat. No. 6,590,800) and Flash technology. The circuit means is based on SCMOS-DTL gate arrays. Software means is based on the C++ procedures with levels of LUT. The SFPGA device supports GHz low power ASIC mixed signal product applications with embedded analog, logic, and memory array units. Several multiplexing schemes are disclosed, which accommodate tasks to vary the Vt and transmission line transmission of selected transistor or IO nets, and therefore their analog and digital device properties. A voltage doubler and supply booster and a Digital-Analog-Digital-Translator (DADT) apparatus are also disclosed in accordance with the present invention. Accordingly, the present invention includes control schemes to field program basic circuit element or any critical nets, and to alter the functionality of certain predetermined circuit units, and update array interconnections, accessing stored protocols, algorithms in all chips in the embodiment subsystem of a SFPGA chip sets.

A first charge pump includes a collection of voltage adder stages. The first voltage adder stage receives an input voltage VCC and in response to a clock signal provides a first voltage signal alternating between 2*VCC and VCC. The Nth voltage adder stage receives an input voltage VCC and a first voltage signal from the preceding stage, and provides a second voltage signal alternating between N*VCC and VCC. The capacitors included within each adder stage are required to sustain a maximum voltage of VCC. In an alternate embodiment the first charge pump may be combined with one or more voltage doubler stages to produce even higher output voltages.

The present invention constitutes a control circuit which permits the dimming of the illumination emitted from a fluorescent lamp. A controllable source of alternating current power is converted to direct current utilizing a conventional diode bridge and power filter. The direct current signal is converted to a high frequency alternating current signal using a self-oscillating inverter circuit. The output of the inverter circuit is coupled to a resonance circuit. The lamp will be turned on when the output of the resonance circuit is increased until it exceeds the minimum voltage specified for the selected fluorescent lamp. A voltage doubler circuit powers the fluorescent lamp and permits the fluorescent lamp to be dimmed or otherwise remain illuminated when the input alternating power is reduced below that specified for normal operation of the fluorescent lamp.

An analog control application specific integrated circuit (ASIC) apparatus for a high voltage power supply (HVPS) in an image for apparatus, and a method for controlling the HVPS are provided. The HVPS includes a transformer transforming an AC signal to a high voltage signal and a voltage doubler outputting a DC high voltage for the HVPS. The ASIC includes an analog control circuit configured as a one-chip ASIC that converts a predetermined DC level signal to a high frequency switching signal using a switching component and outputs the converted high frequency switching signal to a primary winding of the transformer. If the high voltage output signal output from the voltage doubler is not feedbacked, the switching component high frequency switches a received driving signal of a gate driver, and outputs the high frequency switched signal to the transformer.

A power supply for an ion engine comprises a multiphase alternator and a power converter comprising a voltage multiplier coupled to each phase of the alternator. Each voltage multiplier comprises one or more staged voltage doublers. The alternator phases may be coupled to each other in a Y configuration such that no common return line is required, and each phase of the alternator provides equal amounts of constant power in a balanced, sequential flow. The converter corrects for the alternator's inherent internal reactance, thereby minimizing the required output of the alternator and reducing the overall power required of the system. A controllable impedance can be inserted into a low voltage portion of the multiplier for selectably varying the output voltage and power of the supply.

A power supply circuit for a dimmer switching device includes a voltage doubler circuit, a filter circuit, a switching power supply, and a linear regulator circuit. In one embodiment, the voltage doubler circuit includes a first stage having a first capacitor and a first diode, and a second stage having a second capacitor and a second diode. The switching power supply may include a feedback circuit, and may be a non-isolated power supply. In an embodiment, the dimmer device is variable between an OFF position and a full ON position, and the circuit is effective to provide power for operation of the switching power supply while the dimmer device is in the full ON position.

The present invention constitutes a control circuit which permits the dimming of the illumination emitted from a fluorescent lamp. A controllable source of alternating current power is converted to direct current utilizing a conventional diode bridge and power filter. The direct current signal is converted to a high frequency alternating current signal using a self-oscillating inverter circuit. The output of the inverter circuit is coupled to a resonance circuit. The lamp will be turned on when the output of the resonance circuit is increased until it exceeds the minimum voltage specified for the selected fluorescent lamp. A voltage doubler circuit powers the fluorescent lamp and permits the fluorescent lamp to be dimmed or otherwise remain illuminated when the input alternating power is reduced below that specified for normal operation of the fluorescent lamp.

The invention belongs to the technical field of energy capture, and particularly discloses a static threshold eliminating and dynamic threshold eliminating combined type voltage-doubler rectifier. According to the voltage-doubler rectifier, the static threshold eliminating technology and the dynamic threshold eliminating technology are combined, the equivalent threshold of a rectifier tube is changed through direct current bias so as to increase the positive-direction breakover current of the rectifier tube, and the rectifier tube is switched off with anti-phase radio-frequency signals so as to reduce the reverse leakage current of the rectifier tube. According to the voltage-doubler rectifier, high-efficiency power conversion under ultralow radio-frequency power input can be realized, good impedance matching within the bandwidth of wide input power can be realized, and then energy transmission efficiency within a wide power band is improved. When the voltage-doubler rectifier is applied to the fields such as radio frequency identification (RFID), label reading and writing sensitivity can be improved greatly, and then system sensitivity is improved.

The circuit of voltage multiplier with programmable output, which compares the feedback voltage of the output with a reference voltage, whether the pumping circuit functions to pump the output voltage or not is controlled by a clock generator so as to sustain the output voltage within a prescribed range, moreover, by using a voltage regulator to supply a stable output voltage to the load.

An envelope detector circuit, suitable for use in RFID tags, includes a voltage doubler circuit and a biasing voltage generating circuit which comprises components matched respectively to rectifying components of the voltage doubler circuit. A rectifying component of this voltage doubler circuit is formed by a transistor controlled by the biasing voltage generating circuit which provides a biasing voltage to a control gate of this transistor, the biasing voltage generating circuit being arranged so as to permit a determined forward biasing current to flow through the transistor and further rectifying elements of the voltage doubler circuit. This embodiment provides fast, highly sensitive detection of envelope waveforms in input signals. Thanks to the matched rectifying components, efficiency variations due to variations in manufacturing process can be eliminated. The envelope detector circuit is further arranged for maintaining a stable detection independent of variations in temperature.

A new scheme of Schottky FPGA (SFPGA) IC solution is proposed. The chip is organized by embedded analog, memory, and logic units with on chip apparatus and software means to partitioning, altering selected portions of hardware. The process means is based on the combined Schottky CMOS (SCMOS, U.S. Pat. No. 6,590,800) and Flash technology. The circuit means is based on SCMOS-DTL gate arrays. Software means is based on the C++ procedures with levels of LUT. The SFPGA device supports GHz low power ASIC mixed signal product applications with embedded analog, logic, and memory array units. Several multiplexing schemes are disclosed, which accommodate tasks to vary the Vt and transmission line transmission of selected transistor or IO nets, and therefore their analog and digital device properties. A voltage doubler and supply booster and a Digital-Analog-Digital-Translator (DADT) apparatus are also disclosed in accordance with the present invention.Accordingly, the present invention includes control schemes to field program basic circuit element or any critical nets, and to alter the functionality of certain predetermined circuit units, and update array interconnections, accessing stored protocols, algorithms in all chips in the embodiment subsystem of a SFPGA chip sets.

A high efficiency converter for ZVS {zero voltage switching} is disclosed above which can reduce drain-source voltage of switch (MOSFET), heighten adapter efficiency and eliminate need of input voltage doubler circuit by means of making the converter to act in ZVS for wide range of whole input voltage where the converter is particularly featured by comprising high side switch (SWH) and low side switch (SWL) making a closed circuit with input voltage and each making a switching action that is opposite to each other according to output signal of external driver, first capacitor connected in series between the above SWH and SWL, a transformer that induces primary side voltage to secondary side according to switching action of the above SWH and SHL, and a rectifier that rectifies output voltage of secondary side of the above transformer while moreover the converter comprises a diode connected to the above first capacitor in parallel, first and second feedback diodes respectively connected to the above SWH and SWL in parallel, and second capacitor connected to primary coil of the above transformer in series.

A ballast for a vehicle metal halide lamp is simplified using a DC-AC one-step-boost high frequency ballast system. To satisfy requirements specific to a metal halide lamp, a discharge developing capacitor is installed on a primary side of a transformer in parallel with a DC power supply, ensuring discharge development after a breakdown. To reduce the size and increase the operating voltage of the transformer, a booster circuit and voltage-doubler circuit are installed on the primary side and secondary side of the transformer, respectively. To reduce the size of the transformer and achieve a stable discharge, the ballast frequency is swept within a range between the specified minimum frequency and maximum frequency so that the center frequency is from 80 kHz to 120 kHz, and the same frequency is unsustained for more than 10 msec.

A system to control an asynchronous tri-phase motor where said system comprises: at least one filter directly coupled to the current of the Alternative Current (AC) line; a rectifier which rectifies the line current, a doubler which reduces the curl, elevates the voltage and delivers a voltage in Direct Current, a braking resistance which helps to dissipate energy when the system is in braking mode, a shunt resistance, which helps to measure the current which flows from the V-line between the doubler and the IGBT module, a source, which adapts the voltage which the microcontroller consumes and peripheries (operational amplifiers, detectors, etc.), a line regulator to remove curls and line noise, a microcontroller to process, admit and emit control signals, a potential module which emits a PWM train pulse with a frequency determined by the microcontroller towards the IGBT module when the microcontroller indicates such, an IGBT module, which receives the PWM pulse train adapting and coupling them to an H bridge, to thus allow the flow of high voltage in DC emanating from the doubler towards the electric motor, a retro-feeding line towards the microcontroller to measure current, a velocity detector coupled mechanically to the motor and which sends a signal or pulse train towards the microcontroller; as well as the acceleration or braking methods consistent in the measurement of the slip S of said tri-phase motor.