35 results about "Analog multiplier" patented technology

The invention discloses a method for effectively simulating general quantum computing based on a classical circuit network, and relates to the technical field of quantum computing simulation, and the method comprises the following specific steps: converting data into a voltage signal through input voltage coding, constructing a single-bit gate and a two-bit gate by using an operational amplifier and an analog multiplier, and constructing a single-bit gate and a two-bit gate; according to the invention, the general quantum computation is simulated by a classical circuit network, an n-bit unitary matrix is decomposed and reconstructed by means of input voltage coding quantum state and voucher / two-bit gate modular design, and the high-efficiency simulation of general quantum computation is realized. Quantum gate linear transformation is reproduced, quantum calculation universality is achieved, voltage signals and data are converted through a reflection formula, signal distortion is avoided, multi-level gate circuit cascading is supported, and a flexible and stable platform is provided for quantum algorithm verification and the like.

The present invention discloses a four-quadrant analog multiplier circuit and a control method based on a memristor. The analog multiplier circuit based on a memristor mainly includes a sign conversion circuit, an external control circuit, a memristor control circuit, a Cascode current mirror circuit composed of NMOS transistors, and a Cascode current mirror circuit composed of PMOS transistors. Among them, the Cascode current mirror circuit composed of NMOS transistors and the memristor control circuit form a first-quadrant memristor analog multiplier circuit, and the Cascode current mirror circuit composed of PMOS transistors and the memristor control circuit form a second-quadrant memristor analog multiplier circuit. The sign conversion circuit mainly converts the input signal into a signal in the first and second quadrants and inputs the signal into the corresponding quadrant memristor analog multiplier circuit. After receiving a positive input signal, the external control circuit outputs the control voltage required by the memristor analog multiplier circuit. Compared with the existing analog multiplier circuit, the memristor analog multiplier has higher linearity and accuracy, and the circuit structure and operation process are relatively simple.

This application discloses a precision capacitance sensing system, comprising a modulation signal source, a sensitive probe, a differential transformer bridge, a signal amplification link, an analog multiplier, and a low-pass filter circuit, all connected in sequence. It also includes a demodulation reference signal source, the output of which is connected to the second input of the analog multiplier. The demodulation reference signal source is used to generate a multi-frequency combination demodulation reference signal, which is composed of a fundamental frequency component and at least two harmonic components superimposed. This invention also discloses a precision capacitance sensing method. By employing a specially designed demodulation reference signal, this application ensures that the system output remains constant within a continuously varying range of the demodulation phase difference, thereby achieving complete insensitivity to phase difference fluctuations and effectively overcoming the performance bottleneck that has long constrained high-precision capacitance sensing.

The invention discloses a voltage frequency converter with a transfer function in inverse proportion. Comprising the following steps: an integrator buffers an input voltage and generates a ramp voltage which linearly rises or falls along with time; the voltage comparator compares the ramp voltage output by the integrator with zero voltage to generate a trigger pulse; the monostable trigger generates a rectangular pulse signal with a fixed pulse width, and the output pulse is used for controlling a post-stage switched capacitor charge pump; the charge control and reset unit is used for resetting the integrator to realize charge balance; the switched capacitor charge pump samples an input voltage, performs voltage-charge conversion, injects a charge packet in direct proportion to the input voltage into a summation point of the integrator, and outputs the frequency of the whole converter at the same time. According to the invention, the output pulse frequency is accurately inversely proportional to the input voltage value and does not need to depend on complex digital calculation or a low-precision analog multiplier / divider.

The invention belongs to the technical field of avionics testing and signal simulation, and discloses an LVDT analog simulation circuit and a signal simulation method thereof, and the LVDT analog simulation circuit comprises a main control module, a communication interface module, an excitation signal processing module and a sensor signal simulation output module. The main control module receives an external displacement setting instruction through the communication interface; the excitation signal processing module comprises a DAC unit and an excitation conditioning unit and is used for generating amplitude control voltage and conditioning an external LVDT excitation signal; the sensor signal simulation output module serves as a core and comprises a difference value control unit, a sum value control unit, a summation unit and a differencing unit, a conditioned excitation signal and amplitude control voltage are synthesized through an analog multiplier and an operational amplifier circuit, and finally three-phase differential signals (a high end, a low end and a center tap) simulating a real LVDT sensor are output. A mechanical LVDT is replaced by a full-electronic mode, high-precision, programmable and flexible simulation of displacement signals is achieved, the device is particularly suitable for occasions needing high-reliability LVDT interface testing and verification such as an aviation flight control system, and the device has the advantages of being low in cost, high in flexibility and easy to integrate automatic testing.

A new circuit element is introduced which is a regulated power source (RPS) capable of delivering a controlled power into an uncontrolled load. In a first embodiment, a switching power supply controls power delivery rate by setting a peak inductor current or by controlling switching frequency. In a second embodiment, an analog multiplier circuit is placed into a feedback loop of an operational amplifier so power is delivered or absorbed responsive to a power control signal. Applications that exist for a first RPS embodiment include maintaining a solar panel at its MPP (maximum power point), combining the DC outputs of solar panels receiving unequal illumination, transfer of power to batteries or inverters and energy transfer using timed power delivery. Applications for a second embodiment also include temperature control and high bandwidth AC and DC precision power sourcing and sinking.

A first integer value is split into a first coarse value and a first fine value, and a second integer value is split into a second coarse value and a second fine value. An analog multiply and accumulate (MAC) operation is performed on the first and second coarse values to produce a first analog output signal, an analog MAC operation is performed on the first coarse value and the second fine value to produce a second analog output signal, an analog MAC operation is performed on the first fine value and the second coarse value to produce a third analog output signal, and an analog MAC operation is performed on the first and second fine values to produce a fourth analog output signal. The first, second, third and fourth analog output signals are converted to first, second, third and fourth digital signals by first, second, third and fourth channels, respectively.

The analog signal processing system of the photoetching machine comprises a transconductance circuit used for receiving a current signal output by a current type sensor and converting the current signal into a voltage signal; the differential circuit is used for receiving the voltage signal and a reference power supply voltage output by a reference power supply circuit and carrying out differential operation to output a differential voltage; an analog multiplier circuit for multiplying the differential voltage by an output gain to obtain an analog multiplication output signal whose frequency spectrum is transferred to a predetermined carrier frequency; the band-pass filter is used for filtering low-frequency noise in the analog multiplication output signal to obtain a first filtering signal; and the digital multiplier circuit is used for multiplying the first filtering signal by a digital reference signal with the same frequency and phase as the output gain to obtain a digital multiplication output signal. In this way, the signal can be transferred to the predetermined carrier frequency to realize physical noise isolation, and noise energy is suppressed through modulation-multiplication-demodulation.

The application provides a low-power-consumption and high-precision magnetic resonance signal phase closed-loop control method and system, which comprises the following steps: first, a magnetic field excitation signal is generated by a DDS chip to excite alkali metal atoms in an atomic cell to generate two orthogonal reference signals for extracting phase information of a magnetic resonance signal; then, the magnetic resonance signal and the reference signal are simultaneously sent into an analog multiplier, and low-pass filtering is performed to extract the phase information of the magnetic resonance signal; then, phase compensation is performed to suppress phase lag and drift in the system; finally, PID control is performed to change the output frequency of the DDS chip to realize closed-loop control of the phase. The technical scheme of the application is used to solve the technical problem that the overall power consumption of the prior art is large and it is difficult to meet the application requirement of the atomic magnetometer in a low-power-consumption engineering environment.

A memory device includes a sub-block with strings and a local bitline. A gate of a sense transistor is coupled with the local bitline. Control transistors provide a data read path between a read source line and the sense transistor and between the sense transistor and a global bitline. The device includes boost transistors, each coupled between the local bitline and a respective string. Control logic causes a voltage to be applied to a wordline associated with a first memory cell of a string and to a boost wordline to pull local bitline up and causes a bitline voltage, which represents a digital value, to be applied to global bitline. Control logic causes a current to be read out through the read source line from the first memory cell. An amount of the current depends on the digital value and represents an analog multiplier of a multiply and accumulate calculation.

The utility model relates to the field of RFID technology, specifically is a kind of high-frequency label FSK signal demodulation circuit that can realize high-frequency RFID label long-distance reading, it is characterized by being equipped with envelope detection circuit, active band-pass filter amplification circuit, phase shift circuit, analog multiplier circuit, low-pass filter amplification circuit and comparison decision circuit, wherein, envelope detection circuit receives data from antenna and data is sent into active band-pass filter amplification circuit, and one way output of active band-pass filter amplification circuit will received data send into analog multiplier circuit, and another way of active band-pass filter amplification circuit will received data send into phase shift circuit.

The invention provides a method for intensifying ion adsorption type rare earth ore in-situ leaching based on a chaotic circuit. According to the method, the in-situ leaching efficiency of ion adsorption type rare earth is improved by taking an adjustable chaotic voltage signal as an electric mining electric signal. Specifically, chaotic voltage is connected to a graphite pole rod to form a chaotic circuit path of a lower cathode and an upper anode; and carrying out in-situ leaching on the leachate, and collecting enriched liquid. The chaotic circuit is a nonlinear voltage sequence, and a direct current signal is changed into a chaotic signal through an analog multiplier and an operational amplifier.

The application discloses a sine wave phase-locked loop circuit, system and oscilloscope realized by frequency pulling effect, wherein the sine wave phase-locked loop circuit comprises an oscillator, a phase loop, an amplitude loop, an analog multiplier and a coupling network; the phase loop comprises a phase discriminator, a first proportional integral circuit and a voltage-controlled oscillator, and the amplitude loop comprises a detection circuit and a second proportional integral circuit; signals output by the phase loop and the amplitude loop are multiplied by the analog multiplier, a waveform with adjusted frequency and amplitude is obtained, the waveform is coupled into the oscillator through the coupling network, and the frequency of the oscillator is pulled. The sine wave phase-locked loop circuit provided by the application can output a sine wave with very low harmonic component, no error between a phase and an amplitude and preset values of a microcontroller, can be used for designing a stable trigger circuit and an efficient frequency spectrum analysis function for a virtual oscilloscope, and greatly reduces cost. The application can be widely applied to the technical field of phase-locked loop circuits.

An electromagnetic wave musical sound sensing control system comprises an electromagnetic wave transceiver, a microcontroller, a band-pass filter, a down-conversion module, an audio power amplifier and a loudspeaker. The system is based on the FMCW radar principle, and the distance between the hand and the radar is linearly mapped into an intermediate frequency signal; carrying out splicing processing on intermediate frequency signals of data truncation between Chirp through a missing segment backfilling algorithm based on template matching, and eliminating time domain discontinuity; after 20kHz band-pass filtering, the intermediate frequency is down-converted to a range which can be perceived by human ears of 20Hz-20kHz by using an analog multiplier and a low-pass filter, and a loudspeaker is driven to produce sound; pitch changes in real time along with the gesture distance, and non-contact audio interaction is achieved; the system has the advantages of real-time response, continuous and natural tone and simple structure, and is suitable for scenes of music interaction, education, rehabilitation and the like.

This invention discloses a high-speed analog multiplier circuit, belonging to the field of integrated circuit signal processing. It improves high-frequency performance by dynamically adjusting the tail current through a frequency detection network. This network amplifies the differential signal V2 via a differential-to-single-ended converter, then attenuates high-frequency components through a low-pass RC filter. The comparator output controls the substrate bias voltage of the tail current source. As the frequency of V2 increases, the substrate bias voltage increases, utilizing the NMOS substrate bias effect to lower the threshold voltage, thereby increasing the tail current and compensating for high-frequency gain attenuation. Two alternative solutions are provided: a parallel transistor and a self-biased tail current source. This circuit has a simple structure, significantly extends the multiplier bandwidth, and is suitable for high-speed communication and signal processing systems.

An analog machine learning architecture uses modular analog multiplier-accumulator (AMAC) elements of fixed size to form a machine learning (ML) system with increasing feature map size. A single 3×3×64 AMAC array is arranged to provide a three layer ML architecture with first layer 3×3×64, second layer 3×3×128, and third layer 3×3×256 using arrangements of single 3×3×64 AMACs arranged in parallel, where the bias of each AMAC is separately established in a unique interval of time.

The utility model relates to a system for quickly and accurately sampling the output power of high-frequency surgical equipment, which comprises a current sampling module, a voltage sampling module, a power sampling module, a DSP (Digital Signal Processor) module and a feedback control module, wherein the current sampling module and the voltage sampling module are respectively used for acquiring current information and voltage information of target equipment; the current sampling module and the voltage sampling module respectively output current information and voltage information to the DSP processor module and the power sampling module; the output of the power sampling module is connected with the DSP processor module; and the DSP processor module controls target equipment through the feedback control module. According to the system for rapidly and accurately sampling the output power of the high-frequency surgical equipment, current and voltage are rapidly sampled, hardware calculation is carried out through the high-speed analog multiplier, a power value is rapidly obtained, feedback control is rapidly carried out through the DSP, and constant-current, constant-voltage and constant-power three-ring closed-loop control is rapidly and accurately achieved.

The application relates to a constant-amplitude digital-axial angle converter and a working method thereof. The digital-axial angle converter comprises a zero-crossing comparator, a sine function generator, an angle value register, an angle operation unit, a first multiplier unit, a second multiplier unit, a first digital-analog converter and a second digital-analog converter. The constant-amplitude digital-axial angle converter has no correlation in amplitude between an input reference signal and an output coupling signal, realizes isolation of signal acquisition and signal transmission, guarantees signal transmission, adopts a digital mode to realize the digital-axial angle converter, and improves an analog angle change rate. The application reduces the demand for an analog multiplier, uses more general digital components, reduces cost, reduces an effective link, and greatly improves a digital operation rate by using a table lookup method to calculate sine and cosine values.

A first integer value is split into a first coarse value and a first fine value, and a second integer value is split into a second coarse value and a second fine value. An analog multiply and accumulate (MAC) operation is performed on the first and second coarse values to produce a first analog output signal, an analog MAC operation is performed on the first coarse value and the second fine value to produce a second analog output signal, an analog MAC operation is performed on the first fine value and the second coarse value to produce a third analog output signal, and an analog MAC operation is performed on the first and second fine values to produce a fourth analog output signal. The first, second, third and fourth analog output signals are converted to first, second, third and fourth digital signals by first, second, third and fourth channels, respectively.

The present application relates to a kind of vibration velocity demodulation systems of laser doppler vibrometer, the laser doppler vibrometer includes laser vibration measurement and laser ranging two modes, the probe of laser vibration measurement mode is converted into beat frequency electric signal after the frequency shift laser interference signal collected and exports, including high-precision heterodyne conditioning circuit, the down-conversion module with multiplier, high-speed ADC circuit and high-speed acquisition and demodulation module, its down-conversion module includes analog multiplier, first switch, second switch and the measurement channel of different down-conversion frequency suitable for low vibration speed, the first input end of analog multiplier is connected after the intermediate frequency signal processed by high-precision heterodyne conditioning circuit, other end is connected with second switch.This application simultaneously provides the vibration velocity demodulation method for realizing the vibration velocity demodulation system of the described.

A memory device includes a sub-block with strings and a local bitline. A gate of a sense transistor is coupled with the local bitline. Control transistors provide a data read path between a read source line and the sense transistor and between the sense transistor and a global bitline. The device includes boost transistors, each coupled between the local bitline and a respective string. Control logic causes a voltage to be applied to a wordline associated with a first memory cell of a string and to a boost wordline to pull local bitline up and causes a bitline voltage, which represents a digital value, to be applied to global bitline. Control logic causes a current to be read out through the read source line from the first memory cell. An amount of the current depends on the digital value and represents an analog multiplier of a multiply and accumulate calculation.

The application discloses a mobile phone screen controllable low-power consumption display debugging circuit and method in the technical field of mobile phone screens, which comprises an input signal adjusting module, a temperature compensation module and a signal correction module, the signal correction module comprises an analog multiplier U, an impedance matching module and a feedback circuit, the output end of the analog multiplier U is electrically connected with the input end of the impedance matching module, the output end of the impedance matching module is electrically connected with the feedback circuit, the output end of the feedback circuit is electrically connected with the input end of an RC low-pass filter, and the output end of the RC low-pass filter is electrically connected with the input end of a signal conversion module. The application adjusts the output electric signal through a second operational transconductance amplifier, carries out multiplication operation through an analog multiplier to offset the output drift characteristics of a digital-to-analog converter, thereby eliminating color deviation and display distortion, realizes frequency modulation by multiplying the input electric signal with a feedback signal, suppresses high-frequency noise and reduces the risk of screen display distortion.

An analog or mixed-signal ASIC implements and trains a neural-network model entirely in the analog domain. Weights and activations are encoded as pulse frequencies. Forward propagation is performed by analog multipliers, while reverse-propagation error signals are conveyed through reverse directional nodes and error neurons that inject pulse-based corrections upstream, eliminating digital gradient arithmetic. Variable analog weight-storage elements—including field-effect transistors, switched-capacitor arrays, and phase-change memory—are updated in real time. Additional features include flash-ADC calibration with temperature compensation, auto-associative pattern completion, stochastic-computing variants, dynamic gate-array reconfiguration, and optional wireless telemetry. Continuous on-edge learning is achieved at ultra-low power for sensor-rich edge-AI applications.

The invention relates to the technical field of medical instruments, in particular to a signal modulation circuit and high-frequency plasma surgical equipment, and the signal modulation circuit comprises an analog switch, a slope control resistor, a coupling capacitor and a variable gain operational amplifier; the analog switch is driven by a low-frequency PWM signal, when the level of the low-frequency PWM signal is a high level, the analog switch connects the coupling capacitor with a high-frequency signal, and when the level of the low-frequency PWM signal is a low level, the analog switch enables the coupling capacitor to be grounded through the slope control resistor. According to the invention, the use of an analog multiplier is omitted through a new circuit form, so that the hardware cost is effectively reduced; even if phase truncation occurs, the voltage can be in smooth transition, and high-frequency noise is suppressed; the signal amplification consistency of the driving part is higher, the distortion is lower, and a post-stage load can be directly driven; by means of safety measures, the situation that operation continuity is affected by frequent mistaken shutdown of equipment can be avoided, it is ensured that energy is cut off immediately when real overload occurs, and treatment safety and system reliability are balanced fundamentally.

The invention provides a distributed hardware control top-speed charging and discharging system of a flywheel energy storage rotor, and relates to the technical field of flywheel energy storage. Comprising a flywheel rotor, a main power circuit, a power grid, a rotating speed-voltage slope generator, an analog multiplier, a hysteresis current controller, a charging and discharging mode switching unit, a rapid charging and discharging enabling module and a power grid state synchronization module. The flywheel rotor, the main power circuit and the power grid are sequentially connected with the flywheel rotor, and the rotating speed-voltage slope generator, the analog multiplier, the hysteresis current controller and the charging and discharging mode switching unit are sequentially connected. Power grid alternating current is converted into direct current adaptive to a motor through a power grid state synchronization module, the motor is driven to drive a flywheel to rotate in an accelerated mode, electric energy is converted into kinetic energy of a flywheel rotor, and charging is completed; when the actual current exceeds the hysteresis band, kinetic energy of the flywheel rotor is converted into electric energy through a hysteresis current controller, the electric energy is input into a power grid, and discharging is completed.

An analog multiplier circuit for performing multiply and scaling operations comprises a differential amplifier, at least two storage circuits, a summing circuit; and an exponentiating circuit. In response to receiving a first control signal, receiving as input an analog signal output by the differential amplifier and storing a value derived from the analog signal. In response to receiving a second control signal, outputting a storage analog signal derived from the stored value. The summing circuit receives storage analog signals from the storage circuits, and outputs an analog signal substantially proportional to a sum of the input storage analog signals.

The invention discloses a high-speed analog multiplier circuit, belongs to the field of integrated circuit signal processing, and improves high-frequency performance by dynamically adjusting tail current through a frequency detection network. According to the network, after an input signal V is subjected to differential-to-single-ended amplification, a high-frequency component is attenuated through low-pass RC filtering, and a comparator outputs a control tail current source substrate bias voltage. When the Vfrequency is increased, the substrate bias voltage is increased, and the threshold voltage is reduced by using the NMOS substrate bias effect, so that the tail current is increased, and the high-frequency gain attenuation is compensated. Meanwhile, two alternative schemes of a parallel triode and a self-bias tail current source are provided. The circuit is simple in structure, remarkably expands the bandwidth of the multiplier, and is suitable for high-speed communication and signal processing systems.

The application discloses a photovoltaic device and power generation system based on dual working mode ASIC chip control safety. The power optimizer in the photovoltaic system has two working modes of MPPT maximum power tracking and safety. In the MPPT maximum power tracking working mode of the ASIC chip, the output voltage and current of a photovoltaic module are collected, then the output power of the photovoltaic module is calculated through an analog multiplier, and a maximum power tracking unit adjusts the duty cycle to realize tracking of the maximum power of the photovoltaic module. Meanwhile, the ASIC chip mode control circuit realizes that when an emergency fault such as a short circuit between photovoltaic strings in the power generation system or a short circuit of each photovoltaic string connected to a bus of a photovoltaic inverter occurs, all the power optimizers in the power generation system in front of the short circuit fault are switched to the safety working mode, all the photovoltaic power generation units connected to the power optimizers stop outputting voltage and power, and system safety is realized.

The utility model belongs to a kind of measurement circuit of full electronic board transformer phase difference, comprising: the alternating current power supply of providing primary voltage to transformer, the direct current power supply of power supply for digital circuit, primary sampling circuit, secondary sampling circuit, filter circuit, analog multiplier, processor and display. The alternating current power supply provides voltage to transformer primary, by primary sampling circuit and secondary sampling circuit, the primary and secondary voltage of transformer is sent into the input end of analog multiplier after filtering by filter circuit, the output signal is sent to processor, analog signal is converted into digital signal, and the amplitude of positive and negative half wave of comparison signal is passed through, the phase difference of primary and secondary is accurately calculated, to show in display in the form of number, to be able to accurately measure the phase of transformer in full electronic interlocking circuit board, improve the yield of product batch production.

A kind of ultrasonic sensor based on partial discharge, comprising: sequentially connected with ultrasonic signal input module, three-stage amplification circuit module, band-pass filter circuit module, frequency reduction circuit module, low-pass filter circuit module and output module.The working principle is: input module converts the high-frequency ultrasonic wave generated by partial discharge into weak electric signal;After signal amplitude is significantly improved by three-stage amplification circuit, by band-pass filter circuit, out-of-band noise is filtered out, and effective discharge frequency band signal is retained;Frequency reduction circuit converts ultrasonic signal into low-frequency signal by mixing frequency with LC frequency reduction through analog multiplier;Further purification is carried out by low-pass filter circuit, and finally converted into audible sound by output module.The present application integrates signal acquisition and processing functions, solves the problem of external equipment in prior art, and has the advantages of high sensitivity, strong anti-interference ability, convenient on-site rapid and intuitive detection.