73results about "Parametric amplifiers" patented technology

The present invention includes an organic device that can be integrated in a multilayer board made of organic material. The passive devices can be integrally fabricated on a circuit board in either surface mount device (SMD) or ball grid array (BGA) form. Alternatively, the passive device can be constructed in a stand alone SMD or BGA/chip scale package (CSP) form to make it mountable on a multilayer board, ceramic carrier or silicon platform in the form of an integrated passive device. The passive device includes side shielding on two sides in the SMD form and four sides in the BGA/CSP form. The side shielding can be external or in-built.

An on-chip Josephson parametric converter is provided. The on-chip Josephson parametric converter includes a Josephson ring modulator. The on-chip Josephson parametric converter further includes a lossless power divider, coupled to the Josephson ring modulator, having a single input port and two output ports for receiving a pump drive signal via the single input port, splitting the pump drive signal symmetrically into two signals that are equal in amplitude and phase, and outputting each of the two signals from a respective one of the two output ports. The pump drive signal excites a common mode of the on-chip Josephson parametric converter.

The invention discloses a digital phase lock amplifier which comprises a signal passage (1), a reference passage (2) and a signal processor (3), wherein the signal passage (1) is connected with the signal processor (3) through an analog to digital converter (4); the signal processor (3) comprises a frequency measurement module (31), a phase detection discriminator (32), a Cordic generator (33), and a first low pass filter (34) and a second low pass filter (34'). The reference passage (2) forms two paths to output to the signal processor (3) through a signal shaping circuit module (22); one path of the reference passage (2) is input to the Cordic generator (33) through the frequency measurement module (31), and the other path of the reference passage (2) is input to the Cordic generator (33) through a phase shifting module (7) and the phase detection discriminator (32); and the sine and cosine signals output by the Cordic generator (33) are multiplied by the input signal of the signal passage (1) respectively, and are output through the first and second low pass filters (34 and 34') and digital to a first D/A converter (5) and a second D/A converter (5') in sequence. Compared with the prior art, the digital phase lock amplifier has the advantages of high precision, wide frequency band and stable data, and improves the phase precision and eliminates the frequency nonlinearity of an analog channel.

A circuit includes an input terminal adapted to receive an input voltage, a MOSFET having its drain terminal and its source terminal connected together, a first switching arrangement configured to be controlled by a first clock signal and adapted to selectively couple the gate terminal to the input terminal, and a further switching arrangement configured to be controlled by a further clock signal in timing relationship with the first clock signal and adapted to selectively couple the source terminal and a first voltage which is capable of pulling carriers out of a channel when the first switching arrangement is not coupling the input terminal to the gate terminal.

Two-pump optical parametric devices (OPDs), and methods of operating the same, generate desired output signals and idlers having reduced stimulated Raman scattering (SRS) noise levels. When the two-pump OPD is used as a two-pump optical parametric amplifier (OPA), the pumps are polarized perpendicular to each other, and the lower-frequency sideband (signal or idler) is polarized parallel to the lower-frequency pump (perpendicular to the higher-frequency pump). The desired output may be an amplified signal or a generated idler. When the two-pump OPD is used as a two-pump optical frequency converter (OFC), the pumps can be polarized parallel to one another, in which case the signal and idler are both perpendicular to the pumps, or perpendicular to one another, in which case the lower-frequency sideband (signal or idler) is polarized parallel to the lower-frequency pump (perpendicular to the higher-frequency pump).

A narrow line width optical parametric oscillator (OPO) (10) is used a pump for a tunable optical parametric oscillator to enable it to produce a mid and long wavelength IR output over a wide 5-20 micron bandwidth. The pumping OPO (10) is then set up to be non-colinearly phase matched. To enable the pumping OPO (10) to exhibit the narrow line width, it is seeded with a narrow line width seeding source. The result is output energy having an extremely narrow 4 nanometer line width. The narrowness of the pumping OPO (10) output is derived first by using noncolinear phase matching in the pumping OPO (10) and secondly by using seeding in the pumping of the pumping OPO (10).

A slow wave structure for coupling RF energy with an electron beam comprises a co-propagating RF section including a plurality of pins having a uniform separation from the plane of an electron beam axis. An output aperture is positioned a half wavelength from a reflection section comprising a change in depth of the pintles, such that RF energy reflected by the change in pintle depth is added to the RF energy traveling with the electron beam. One or more rows of pintles are removed in the region of the output aperture to enhance coupling to the output aperture. The device may include a beam shaper for shaping the electron beam to surround the pintles, and the beam shaper and pintles may share common channels which are longitudinal to the electron beam axis. The slow wave structure may operate in forward and backward wave modes, and may be used in conjunction with other structures to form amplifiers and oscillators.

The invention relates to a biphase digital phase-locking amplifier (as shown in chart 1) and a digital domain synchronous phase-locking algorithm of the biphase digital phase-locking amplifier. The biphase digital phase-locking amplifier can be used for detecting weak current signals, and realize the functions of automatic filtering tracking and synchronous phase-locking. The biphase digital phase-locking amplifier can solve the problems that the volume of the existing phase-locking amplifier is large, the temperature excursion exists, and the speed is slow when the existing phase-locking amplifier is connected with a computer to carry out automatic measurement and control. The biphase digital phase-locking amplifier has the technical characteristics that the weak current signals pass through a 9-step RLC (radio link control) mixed type high-pass filter by a precise I/V conversion circuit, and is then connected with two low-noise instrument amplifiers, the connecting modes of which are different; the rear ends of the instrument amplifiers are respectively connected with an 8-step RLC mixed type high-pass filter, and a differential signal is formed by signals output by two low-pass filters. Meanwhile, reference signals pass through a 90-degree phase shifter of a phase-locking loop to output two TTL square waves, the phase difference of two phases of which is 90 degrees. Signals of three paths are collected by a data acquisition card, and are then transmitted to a PC (personal computer) machine. The biphase digital domain synchronous phase-locking algorithm (as shown in chart 2) provided by the invention is applied on the PC machine to carry out signal processing and filtering.

The present invention relates to a method for forming a photoresist-laminated substrate including: preparing a laminated substrate having an insulating substrate and a metal layer; coating with an aerosol of metal nanoparticles on the metal layer; laminating a photoresist film on the metal layer coated with the aerosol of metal nanoparticles. The method of the present invention is a environmentally friendly method since an aerosol of metal nanoparticles is used, differentiated from the conventional wet process.

The invention discloses a lock-in amplifier of an analog-digital mixed structure and a lock-in amplification method of the lock-in amplifier. The lock-in amplifier comprises an input signal processing system, a reference signal generation system, an analog processing system, an analog-to-digital conversion system and a digital processing system, wherein the first output end and the second output end of the reference signal generation system output two paths of sine wave reference signals which are mutually orthogonal; the analog processing system comprises two analog multipliers and an analog low-pass filter; the digital processing system comprises two digital low-pass filters and a digital operational unit. According to the lock-in amplifier, an aliasing signal is allowed to exist in a signal detection process; through the combination of the analog low-pass filter and the digital low-pass filters, an interference signal in an input signal can be effectively filtered, and a high-frequency interference signal and the aliasing signal are filtered, so that various frequency signals can be detected, the signal to noise ratio is effectively improved, hardware requirements are reduced, and the production cost is lower; the lock-in amplifier can be widely applied to the field of weak signal measurement.

The invention belongs to the technical field of the detection of weak signals and particularly relates to a lock-in amplifier circuit for detecting terahertz pulse signals. The lock-in amplifier circuit comprises a photoelectric detector used for detecting the terahertz pulse signals, a pre-amplification module, a phase shift module and a phase-sensitive detection module. The lock-in amplifier circuit is characterized in that: signals to be detected which are acquired by the photoelectric detector are processed by the pre-amplification module and are connected to one input end of the phase-sensitive detection module; reference signals after the phase shifting operation by the phase shift module are connected to the other input end of the phase-sensitive detection module; the output end ofthe phase-sensitive detection module outputs signals; the pre-amplification module comprises a band-pass filter circuit and a second-order amplifying circuit which are sequentially connected; the phase shift module consists of a CD-951V4 chip and peripheral circuits of the CD-951V4 chip; and the phase-sensitive detection module consists of a CD552-R3 chip and periphery circuits of the CD552-R3 chip. The lock-in amplifier circuit can detect microvolt-level low-voltage signals with the noise of millivolt level, and is suitable for small-signal and intensive-background noise occasions such as signals acquiring of terahertz time-domain spectrometer, wherein the signal-to-noise ratio of output signals reaches over 50:1.

The invention provides a phase-locking amplifier, which comprises a signal conditioning unit, a phase demodulation unit and a digital-analog sampling unit, wherein the signal conditioning unit performs phase reversion, filtering and pressure partition on an input signal to be detected; the phase demodulation unit multiplies signals output by the signal conditioning unit and a reference signal phase-shifting unit; and the digital-analog sampling unit performs digital-analog conversion on the signal output by the phase demodulation unit to obtain a digital signal and feeds the digital signal back to the reference signal phase-shifting unit. The phase-locking amplifier also comprises the reference signal phase-shifting unit which is used for adjusting the phase of an input reference signal according to the digital signal fed back by the digital-analog sampling unit. Compared with the prior phase-locking amplifier, the phase-locking amplifier provided by the invention is provided with the reference signal phase-shifting unit to count the input reference signals simultaneously according to different phase clocks, thus the phase resolution is multiplied.

The invention discloses a digital dual-phase lock-in amplifier based on a DSP (Digital Signal Processor) and LabVIEW, belongs to the field of weak signal detection, and aims to solve the problem of poor detection effect on weak sinusoidal signals of known frequencies submerged in noises in existing medium and low-level dual-phase lock-in amplifiers. The digital dual-phase lock-in amplifier comprises a signal conditioning module, a DSP module and a LabVIEW software module, wherein the signal conditioning module is used for inputting tested signals into the DSP module after amplification, low-pass filtering and direct-current biasing; the DSP module is used for sampling the conditioned tested signal to obtain a tested signal sequence, generating a sinusoidal reference signal sequence and a cosine reference signal sequence having the same frequency as the tested signals, multiplying the sinusoidal reference signal sequence and the cosine reference signal sequence with the tested signal sequence respectively, and transmitting results of two multiplying operations; and the LabVIEW software module is used for receiving the results of the two multiplying operations, performing the low-pass filtering on the results to obtain stable direct-current constants, solving amplitudes and phases of the tested signals according to the direct-current constants, and displaying the amplitudes, phases and waveforms of the tested signals. The digital dual-phase lock-in amplifier is used for detecting the weak signals submerged in the noises.

The invention discloses a digital phase locking amplifier and a digital phase locking control method. The digital phase locking amplifier comprises a pre-amplifier and a micro-processor. The pre-amplifier is used for amplifying a tested analogue signal, inputting the tested analogue signal into an analogue-digital converter, converting the amplified tested analogue signal into a digital signal, and inputting the digital signal into the micro-processor through a Px interface. The micro-processor is used for controlling the gain of the pre-amplifier through a Py interface according to the amplitude of the digital signal, processing the digital signal, detecting the digital signal with the pre-set frequency in the digital signal, and outputting the digital signal with the pre-set frequency through a Pz interface. The control method comprises the following steps: the micro-processor controls the analogue-digital converter to sample the tested analogue signal according to the speed which is 4M times of that of the pre-set frequency F0, represented in the equation of fs=4M*f0, so as to obtain a sampling signal; the micro-processor downwardly samples the sampling frequency fs=4M*f0 to 4*f0; two orthogonal components RS and RC of the tested analogue signal are calculated according to the sampling signal; and the amplitude A and the phase angle of the tested analogue signal can be obtained by calculation.

The present invention disclosure a multi-stage bidirectional optical amplifier that amplifies counter-propagating signals at the same time. The multi-stage bidirectional optical amplifier in accordance with the present invention comprises two single-stage bidirectional optical amplifiers(30a, 30b), two multiple reflection suppression means(28a, 28b) and a mid-stage component(42).

Disclosed is a method and apparatus for amplitude modulation of an RF transmit signal using pulse width modulation to control an amount of energy within each period. The apparatus includes a signal processing circuit with an input port for receiving of information indicative of a carrier frequency and modulation data. The signal processing circuit has a first output port and a second output port for providing of output signals having a phase relationship therebetween. A power amplifier is provided for receiving the output signals and for generating a pulse width modulated signal in dependence thereon.

The invention discloses an active scanning orthogonal vector digital phase-locked amplifier. The active scanning orthogonal vector digital phase-locked amplifier comprises a signal conditioning module, a signal acquisition module, a data processing and modulating signal/scanning signal module, a communication module and a liquid crystal display module. The signal conditioning module is used for performing preprocessing such as pre-amplifying, notching and anti-aliasing filtering, and the preprocessed signal is cached in a caching and input signal processing module FPGA chip after A/D high-speed data acquisition, and then stored in an external memory. Two synchronous frequency-doubling reference signals are generated inside the FPGA and then put into an orthogonal vector digital demodulation (DILA) processing unit with a signal to be tested, and a harmonic signal is output after DILA operation. The harmonic signal data are communicated with an upper computer by virtue of network transmission or a serial manner, or output by virtue of a USB. The modulating and scanning signal module inside the FPGA chip generates modulating and scanning signals.

A switched capacitor amplification circuit configuring an analog signal processing circuit newly includes switch circuits in a second switch circuit section, and a bias circuit in a bias circuit section. Switch circuits in a first switch circuit section are controlled by a pulse wave, are fixedly switched off during a pre-blanking period (PB period), and are switched on/off during a normal period other than the PB period such that the switched capacitor amplification circuit performs a sampling operation. The switch circuits in the second switch circuit section are controlled by a pulse wave, are switched on/off during the PB period such that the switched capacitor amplification circuit performs a sampling operation, and are fixedly switched off during the normal period other than the PB period.