178results about "Pulse generation by super conductive devices" patented technology

A computation node comprises an input, an output, a bistable node, comprising an input and an output, the output configured to have at least two equilibrium output voltages, a first buffer circuit, having an input and an output, the buffer input connected to the bistable node and the buffer output connected to the computation node, the buffer circuit configured to provide a first output voltage when a voltage at the buffer input is below a threshold, and a second output voltage when the voltage at the buffer input is above the threshold, and a current conveyor node having an input connected to the computation node and an output connected to the bistable node, the current conveyor configured to hold its input at a constant voltage and mirror current received at the input into the input of the bistable node. A network of resistively-coupled computation nodes is also described.

Systems and methods for optimizing a pipeline are described. A system can generate at least one pair of single flux quantum (SFQ) clock signals based on a stream of SFQ pulses. Each pair of SFQ clock signals can include a first SFQ clock signal and a second SFQ clock signal that is out of phase with the first SFQ clock signal. The second SFQ clock signal can have the same frequency as the first SFQ clock signal. The system can define, for each pair of SFQ clock signals, a first clock cycle and a second clock cycle based on the first SFQ clock signal and the second SFQ clock signal. The second clock cycle can be greater than the first clock cycle. The system can assign the first and second clock cycles to different stages of a pipeline based on delays by the different stages.

A device for generating a qubit control signal includes: a first signal envelope generator circuit including a first multiple of signal sources, in which an output of each signal source of the first multiple of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, in which the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit includes a first qubit control signal.

One example includes a superconducting analog-to-digital converter (ADC) system. The system includes a control line configured to propagate an interrogation pulse and a superconducting quantum interference device (SQUID) comprising a first Josephson junction and a second Josephson junction. The SQUID can be configured to receive an input current. The first Josephson junction can be configured to trigger to provide a first pulse in response to the interrogation pulse and a first polarity of the input current and the second Josephson junction can be configured to trigger to generate a second pulse in response to the interrogation pulse and a second polarity of the input current. The system further includes an output stage configured to propagate the first pulse to an output to indicate the first polarity of the input current.

A device comprises a control circuit configured to control a plurality of quantum bits. The control circuit comprises a digital-to-analog converter circuit and switching circuitry coupled to an output of the digital-to-analog converter circuit. The switching circuitry is responsive to switch control signals to selectively connect the output of the digital-to-analog converter circuit to one or more of a plurality of signal paths to generate control signals to control the plurality of quantum bits.

A tunable coupler system includes an input line configured to receive an input current and a signal line configured to provide a signal line current. The tunable coupler system further includes a first superconducting quantum interference device (SQUID) inductively coupled to the input line and the signal line, and a second SQUID inductively coupled to the input line and the signal line. In addition, the tunable coupler system includes a control line inductively coupled to the first SQUID and the second SQUID. The first SQUID and the second SQUID are configured to couple the input current in the input line to the signal line to form the signal line current. A coupling strength between the input line and the signal line is determined based on a control current in the control line.

A memory output circuit for selectively propagating proximate memory output data in a memory array of superconducting memory cells includes multiple datum inputs adapted to operably receive corresponding memory state signals from physically adjacent bit lines in the memory array, and at least one logic gate configured to implement logical OR functionality. The logic gate includes multiple inputs, for receiving at least a subset of the datum inputs operatively coupled thereto, and an output for propagating at least one datum output signal. The memory output circuit further includes at least one delay element operatively coupled to a corresponding one of the datum inputs. The delay element is configured to generate an output signal operably connected to a corresponding one of the inputs of the logic gate, the output signal generated by the delay element being a temporal sequence of at least a subset of the memory state signals supplied thereto delayed by a prescribed delay value.

The invention relates to a superconducting electrical switch. The switch comprises two parallel branches of superconducting material in a loop, and a magnetic field generator which generates a time-varying magnetic field through the loop in a direction generally parallel to the axis of the loop. The magnetic field generator is selectively activated and de-activated to switch the electrical switch between a low-resistance state and a higher-resistance state. In the low-resistance state, there is no magnetic field through the loop and transport current flows through the loop. In the higher-resistance state, a magnetic field through the loop induces a screening current such that the sum of the transport current and the screening current is substantially equal to the critical current or is greater than the critical current of the superconducting material. The switch may be used in, for example, a rectifier or fault current limiter.

Methods and systems for classical processing in a quantum controller.

Disclosed herein is a new paradigm for qubit control using clock multipliers and dual sampling rate direct synthesis to avoid Nyquist zone gaps while covering a wide spectrum without using any synthesizer that compromises the phase noise. This system and method for multi-Nyquist direct synthesis qubit control using clock multipliers and double sampling rate is scalable to thousands of RF channels synchronized to the picosecond level.

Disclosed are a method and an apparatus for generating a qubit control signal, wherein a main pulse and a DRAG pulse used to control a superconducting quantum computer are generated with low power and without a memory. The method comprises the steps of: generating a first sine curve having a first phase obtained by multiplying an angular velocity by a predetermined time of each period, the angular velocity being obtained by adding a first angular velocity of a center frequency and a second angular velocity at a predetermined time of each period; and generating a second sine curve having a second phase obtained by multiplying an angular velocity by a predetermined time, the angular velocity being obtained by subtracting the second angular velocity from the first angular velocity. The DRAG pulse is generated through an operation of adding the first sine curve and the second sine curve.

Techniques are described for operating a qubit controller to generate a signal to apply to a qubit using a tunable coupler that controls the amplitude of at least part of the signal. The qubit controller may comprise a plurality of digital-to-analog converters that each convert digital values to an analog waveform. The qubit controller may further comprise a plurality of tunable couplers each coupled to a respective DAC that adjusts the amplitude of the analog waveform from the respective DAC. The tunable couplers thereby produce a plurality of analog waveforms, which may be combined to produce a signal to apply to the qubit. In some embodiments, the tunable couplers may each be configured to receive a respective control signal that dictates the scaling factor which that tunable coupler applies to the analog waveform.

A superconducting controller for a superconducting qubit to execute high fidelity quantum gates using magnetic flux drive. The controller comprises: an inductance forming an inductive loop and configured to be inductively coupled to a qubit with a small mutual inductance; a pulse shaping circuit configured to apply a current pulse with a predefined shape across the inductance. The pulse shaping circuit comprises: a superconducting circuit configured to output single flux quanta (SFQ) pulses and a digital counter circuit configured to produce the shape of the current (magnetic flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current across the inductance by one SFQ pulse at a time.

One example includes a superconducting data input system. The system includes an inductive coupler that generates first and second bias currents in response to receiving a current pulse. The system also includes a first clocked receiver configured to generate a first superconducting data signal having a first data state in response to the first bias current at a first phase of a clock signal, and a second data state in response to not receiving the first bias current at the first phase of the clock signal. The system further includes a second clocked receiver configured to generate a second superconducting data signal having the first data state in response to the second bias current at a second phase of the clock signal different from the first phase, and having the second data state in response to not receiving the second bias current at the second phase of the clock signal.

One example includes a data alignment system. The system includes a first coupling circuit configured to receive a return-to-zero (RTZ) input pulse and to generate a first single flux quantum (SFQ) pulse in response to the RTZ input pulse being aligned with a phase window of a first clock signal. The system also includes a second coupling circuit configured to receive the RTZ input pulse and to generate a second SFQ pulse in response to the RTZ input pulse being aligned with a phase window of a second clock signal, the first and second clock signals being opposite in phase. The system further includes an alignment circuit that is configured to generate an output SFQ pulse that is aligned to one of the first and second clock signals in response to receiving at least one of the first and second SFQ pulses.

Pulse-generator-based reciprocal quantum logic (RQL) bias-level sensors are fabricated on an RQL integrated circuit (IC) to sample AC or DC bias values provided to operational RQL circuitry on the RQL IC. The bias-level sensors include pulse generators having strengthened or weakened bias taps (transformer couplings to RQL AC clock resonators or DC bias lines) as compared to bias taps of Josephson transmission lines in the operational RQL circuitry, or Josephson junctions (JJs) with larger or smaller critical currents as compared to JJs in the operational RQL circuitry. Pulse generators with weakened bias taps or larger JJs can have lower limits of their operational ranges placed near an optimal bias point at the centroid of the operating region of the operational RQL circuitry. The bias-level sensors can be staged by relative strength to indicate whether a provided bias value is an improvement when varied over a range.

A device for generating a qubit control signal comprises: a first signal envelope generator circuit comprising a first plurality of signal sources, wherein an output of each of the first plurality of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, wherein the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit comprises a first qubit control signal.

Voltage waveform (V S1 (t), V F1 A method for generating voltage pulses (V1(t), V2(t)) includes: - providing an optical signal (CLB1) including one or more optical pulse sequences (OPAT1, OPAT2); - distributing the optical pulses (OPAT1) to a plurality of photoelectric conversion units (OEU1, OEU2) via optical waveguides (CWG1, CWG2); - using the photoelectric conversion units (OEU1, OEU2) to convert the optical pulses (OPAT1, OPAT2) into electrical driving current pulses (EPAT1); and - generating voltage pulses (V1(t), V2(t)) by driving a Josephson junction (JJ1) with the electrical driving current pulses (EPAT1).

Shift register elements of a phase-mode bit-addressable sensing register sample varied AC or DC bias values provided to operational RQL circuitry on the RQL IC via clock resonators or DC bias lines. The shift register can be constructed of phase-mode D flip-flops and JTLs as data and clock lines. A method of using the sensing register includes shifting in a data bit pattern while a bias parameter (e.g., AC amplitude, DC value, or phase) is set to a nominal value; stopping the logical clock that controls the shifting of values through the sensing register, varying the bias parameter value, inputting one assertion SFQ pulse or reciprocal pulse pair into the logical clock, restoring the bias parameter to the nominal value, restarting the logical clock to shift out an output data bit pattern, and observing the output data bit pattern to determine the effect of the bias parameter value change.

A device comprises a control circuit configured to control a plurality of quantum bits. The control circuit comprises a digital-to-analog converter circuit and switching circuitry coupled to an output of the digital-to-analog converter circuit. The switching circuitry is responsive to switch control signals to selectively connect the output of the digital-to-analog converter circuit to one or more of a plurality of signal paths to generate control signals to control the plurality of quantum bits.

One example includes a superconducting analog-to-digital converter (ADC) system. The system includes a control line configured to propagate an interrogation pulse and a superconducting quantum interference device (SQUID) comprising a first Josephson junction and a second Josephson junction. The SQUID can be configured to receive an input current. The first Josephson junction can be configured to trigger to provide a first pulse in response to the interrogation pulse and a first polarity of the input current and the second Josephson junction can be configured to trigger to generate a second pulse in response to the interrogation pulse and a second polarity of the input current. The system further includes an output stage configured to propagate the first pulse to an output to indicate the first polarity of the input current.

A flux switch system is disclosed. The system (50) includes an input stage (52) configured to provide an interrogation pulse. The system also includes a plurality of flux loops (62, 64) configured to receive an input current (IIN). Each of the flux loops includes a Josephson junction (J1, J2) configured to trigger to generate an output pulse in response to a first polarity of the input current and to not trigger to generate no output pulse in response to a second polarity of the input current opposite the first polarity. The system further includes an output stage (54) configured to propagate the output pulse to an output (INTout) of the flux switch system.

The present invention relates to a quantum magnetic field receiving device including a superconducting quantum interference device (SQUID) or a superconducting quantum interference filter (SQIF) and an electrostatic gating circuit configured to apply electrostatic fields to Josephson Junctions of the SQUID or SQIF.

A system for generating a clock signal for a light quantum computing system includes a pump photon source configured to generate a plurality of pump photon pulses having a first repetition rate; a waveguide optically coupled to the pump photon source; and a photon pair source optically coupled to the first waveguide. The system also includes a photodetector optically coupled to the photon pair source and configured to generate a plurality of electrical pulses in response to detecting at least a portion of the plurality of pumped photon pulses having a first repetition rate; and a clock generator coupled to the photodetector and configured to convert the plurality of electrical pulses into a plurality of clock signals having a first repetition rate.

Autonomous stabilization of a GKP code by parametric comb modulation of microwave frequencies A microwave-range quantum superconducting circuit includes an energy-tunable Josephson junction element (8) connected to a portion of a linear passive circuit (6) exhibiting several resonant modes, the first-form Foster decomposition of which across the Josephson junction element (8) includes a target resonant mode having an impedance Z greater than 13 kOhms and a pulsation w.The energy of said Josephson junction element (8) is adjustable and modulated by at least two respective pulse trains in which the pulses are separated by a duration of 2π / w and have a width less than one-tenth of this duration, the amplitude of the pulses within each respective pulse train being modulated by a respective sinusoidal carrier and the pulse trains are shifted in pairs respectively by a duration Δt such that |sin(w*Δt)| is 13 kOhms / Z, so that the resonant mode of pulsation w stabilizes in one of two GKP states encoding a qubit. Fig.2.

An apparatus and a method for facilitating a first frequency filtering and a second frequency filtering together with non-reciprocal frequency conversion for electromagnetic isolation.

A Josephson memory array and logic circuits use quasi-long-Josephson-junction interconnects to propagate signals at fast speeds and low energy expense, while permitting for memory arrays as dense fabrics of relatively simple unit cell sub-circuits, which include π Josephson junctions, connected together by the interconnects. Each of the unit cell sub-circuits can be configured as a looped or linear arrangement. The unit cell sub-circuits and interconnects provide a fast, dense memory technology for reciprocal quantum logic (RQL), suitable for low-level caches and other memories collocated with an RQL processor.

A device for generating a qubit control signal includes: a first signal envelope generator circuit including a first multiple of signal sources, in which an output of each signal source of the first multiple of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, in which the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit includes a first qubit control signal.

Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.

A superconducting controller for superconducting quantum bits is used for implementing a high-fidelity quantum gate through magnetic flux driving. The controller comprises an inductor which forms an inductance loop and is used for being coupled with a low-mutual-inductance quantum bit inductor; and a pulse shaping circuit for applying a current pulse having a predetermined shape to the inductor. The pulse shaping circuit includes: a superconducting circuit for outputting a single flux quantum (SFQ) pulse; and a digital counting circuit for generating the shape of the current (flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current of the inductor by one SFQ pulse at a time.