135 results about "Zero resistance" patented technology

An exercise device having many advantageous features is described, including the ability to provide a user selected resistance from nearly zero resistance to the user's full body weight, the ability to easily adjust between exercises and between users, and the ability to balance the device between reconfigurations to provide for ease-of-use. The device includes an inelastic adjustable length member with two arms and a grip at both ends, and a centrally located anchor that provides for a distribution of the length between the arms. In one embodiment, the exercise device is compact and can be removably attached to a door frame. When grabbing each of the grips and uniformly pulling away from the anchor, the arms of the device center on the anchor.

A method, device and system is disclosed for rapidly and safely discharging remaining energy stored in an electrochemical battery 104 in the event of an internal short circuit or other fault. In its best mode of implementation, if a sensor 116 detects one or more parameters such as battery temperature 204 or pressure 206, exceeding a predetermined threshold value 334, the terminals 144 of the battery or cell are intentionally short-circuited external to the battery through a low or near zero resistance load 150 which rapidly drains energy from the battery 104. The rate energy is drained via the external discharge load 150 may be controlled with an electronic circuit 136 responsive to factors such as state of charge and battery temperature. Devices such as piezoelectric and Peltier devices 300, may also be used as emergency energy discharge loads.

The invention concerns a capacitive touch system comprising: an active stylus (800) configured so as to continuously emit a signal a capacitive touch device (200) configured to be in a reset phase (1000), followed by a finger touch sensing phase (2000), the finger touches being sensed exclusively during the finger touch sensing phase (2000). The capacitive touch device (200) is configured to sense the signal from the active stylus (800) during the reset phase (1000). The capacitive touch device (200) comprises at least one charge sensor (208, 213) comprising a charge sensor amplifier (305) comprising an input (CSi) and an output (csaout), and a switch (Sw1) between this input (CSi) and this output (csaout). The charge sensor amplifier (305) is arranged for conveying the signal of the active stylus (800) through a non-zero resistance value (Ron) of the switch (Sw1) during the reset phase (1000).

Source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits. During sensing the source of a memory cell is erroneously biased by a voltage drop across the resistance and results in errors in the applied control gate and drain voltages. This error is minimized when the applied control gate and drain voltages have their reference point located as close as possible to the sources of the memory cells. In one preferred embodiment, the reference point is located at a node where the source control signal is applied. When a memory array is organized in pages of memory cells that are sensed in parallel, with the sources in each page coupled to a page source line, the reference point is selected to be at the page source line of a selected page via a multiplexor.

Techniques are presented for dealing with possible source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits of a non-volatile memory. The error is caused by a voltage drop across the resistance of the source path to the chip's ground when current flows. For this purpose, the memory device includes a source potential regulation circuit, including an active circuit element having a first input connected to a reference voltage and having a second input connected as a feedback loop that is connectable to the aggregate node from which the memory cells of a structural block have their current run to ground. A variation includes a non-linear resistive element connectable between the aggregate node and ground.

Source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits. During sensing the control gate voltage of a memory cell is erroneously biased by a voltage drop across the resistance. This error is minimized when the current flowing though the ground loop is reduced. A method for reducing source line bias is accomplished by read/write circuits with features and techniques for multi-pass sensing. When a page of memory cells are being sensed in parallel, each pass helps to identify and shut down the memory cells with conduction current higher than a given demarcation current value. In particular, the identified memory cells are shut down after all sensing in the current pass have been completed. In this way the shutting down operation does not disturb the sensing operation. Sensing in subsequent passes will be less affected by source line bias since the total amount of current flow is significantly reduced by eliminating contributions from the higher current cells. In another aspect of sensing improvement, a reference sense amplifier is employed to control multiple sense amplifiers to reduce their dependence on power supply and environmental variations.

The invention discloses a radiation semiconductor package, comprising a substrate which is provided with a plurality of welding pads and grounding pads on the surface, semiconductor chips which are arranged on the substrate and electrically connected with the welding pads, passive components which are arranged on the welding pads of the substrate, zero resistance passive components or metal blocks which are arranged on the grounding pads of the substrate, and radiation fins which can be arranged on the zero resistance passive components or metal blocks, wherein, the radiation fins are electrically connected with the zero resistance passive components or metal blocks, and are electrically coupled with the grounding pads of the substrate to form a ground, thereby providing an EMI blackout effect, preventing the problems of increased cost of structure process and material consumption generated when the prior heat conductive structure provided with a supporting part is arranged on the substrate through the supporting part, and preventing the problem of arrangement of electronic components on the substrate restricted by the arrangement of the supporting part.

A heat dissipation semiconductor package is disclosed according to the present invention. The heat dissipation semiconductor package comprises: a substrate that has a plurality of solder pads and at least one ground pad; a semiconductor chip that is mounted on the substrate and electrically connects to the solder pads; a plurality of passive elements that are mounted on the solder pads of the substrate; at least one metal bump or passive element of zero resistance, which are mounted on the at least one ground pad of the substrate; and a heat sink, which is capable of being mounted on the passive elements, and the at least one passive element of zero resistance or the metal bump, and the heat sink is electrically connecting to the at least one passive element of zero resistance or the metal bump, and then is further electrically coupling with the at least one ground pad of the substrate to form a ground return circuit, thus provides a shielding effect on electromagnetic interference (EMI).

A superconducting switching amplifier embodying the invention includes superconductive devices responsive to input/control signals for clamping the output of the amplifier to a first voltage or to a second voltage. The amplifier includes a first set of superconducting devices serially connected between a first voltage line and an output terminal and a second set of superconducting devices serially connected between the output terminal and a second voltage line. The first set and the second set of devices are operated in a complementary fashion in response to control signals. When one of the first and second sets is driven to a superconducting (zero resistance) state the other set is driven to a resistive state. In accordance with the invention, the devices of each set are laid out in a pattern and driven in a manner to enable all the devices of each set to be driven to a selected state at substantially the same time. In one embodiment, the devices in each set are superconducting quantum interference devices (SQUIDs). Four sets of superconductive devices may be interconnected to function as a differential switching amplifier. The operating voltage applied to an amplifier may be varied to provide additional shaping of the output signal.

The invention relates to an on-line detection method for ceramic zero resistance insulators on an alternating current transmission line based on infrared thermal imaging, and belongs to the field of power transmission. The invention aims to provide an on-line detection method for ceramic zero resistance insulators with safety, economy, high efficiency and high accuracy. The invention adopts the technical proposal that when a ceramic insulator string has a zero resistance insulator, the spread voltage of other insulators is boosted, the reactance of the whole insulator string is reduced, the leakage current of the insulator string is increased, and the heating difference of the good insulators and the zero resistance insulators is increased. By shooting thermal field images of the insulator string through a high-precision infrared imaging instrument, adopting image processing technology to extract axial temperature distribution curves of the insulator string, and utilizing the difference of the axial temperature distribution curves of the adjacent insulators, the method achieves accurate judgment of the state of the insulators. The method can be used for zero resistance detection for the ceramic insulators on the alternating current transmission line in grade of 110KV and above voltage, and is applied to lightening workload of detection greatly and improving secure operation level of a power system.

The invention discloses a thin layer liquid membrane measuring and controlling method of metal thin liquid membrane corrosion and an electrolytic bath device thereof. The thin layer liquid membrane measuring and controlling method of the metal thin liquid membrane corrosion comprises a method for measuring and controlling the thickness of an open liquid membrane and the thickness of a closed liquid membrane together and a method for separately measuring and controlling the thickness of the open liquid membrane. The electrolytic bath device adopted by the thin layer liquid membrane measuring and controlling method of metal thin liquid membrane corrosion comprises a screw micrometer, an external thread insulating rod, a platinum probe, an internal thread insulating tube, an electrode platform, an annular electrode, a circular electrode, an auxiliary electrode, an electrode loading platform, a container, a reference electrode and a zero-resistance ampere meter. The method is suitable for researching the corrosion electrochemical behavior of substrate metal in an environment that the open liquid membrane is related to the closed liquid membrane; simultaneously, the thickness of the open liquid membrane can be measured and controlled separately, so that the method is also suitable for researching the corrosion electrochemical behavior of substrate metal in an environment of the single thin layer liquid membrane.

The invention relates to a zero resistance insulator detection method on the basis of a finite element database, which comprises the following steps of: by utilizing finite element analysis software, establishing a model database of a typical power transmission line tower and a corresponding insulator string; and carrying out electric field analysis on an insulator string model in the model database by the finite element analysis software, adopting a non-contact electric field test method when carrying out field testing on a zero resistance insulator, comparing a field test result with a finite element calculating result and effectively identifying whether the zero resistance insulator exists in the line insulator string and a specific position thereof. According to the invention, the zero resistance insulator detection method is on the basis of the finite element emulation calculation; the electric field distribution conditions of various towers and insulator strings can be mastered; part of test work is replaced with calculation; and the workload is lower. Meanwhile, the non-contact electric field test method can be used as the zero resistance insulator detection method; the specific position of the zero resistance insulator can be identified; and the zero resistance insulator detection method has the advantages that workers do not need to climb the tower to work, power does not need to be switched off to carry out detection, the zero resistance insulator detection method is safe and reliable and the like.

A resistance exercise device is disclosed for an amputee which includes a support assembly configured to engage the stump portion of an amputated limb. The support assembly includes a pair of circumferential support cuffs. The support assembly includes inelastic adjustable bands with the support cuffs attached to the end thereof. The harness assembly is connected to a centrally located anchor, having a spacing member, that provides for a distribution of the user's weight between the arms. The device allows the user to selectively adjust the exercise load from nearly zero resistance to the user's full body weight.

Apparatus for boosting the signal between a cell phone (14) and a cell site (16), which includes an amplifier (64) that continually operates at a fixed gain. A power detector (72) controls an attenuator (62) that can be switched to pass the amplified signal through an attenuator (74) of moderate resistance, or through an attenuator (60) of zero resistance so the power output is boosted within the limits allowed under cell phone system standards.

The invention relates to an atmospheric environment corrosion testing device for a high sulfur natural gas purification plant, which is mainly for solving the problems that an atmosphere corrosion exposure test is long in period and low in speed, and electrochemical test data has large difference with actual condition in the prior art. The atmospheric environment corrosion testing device for the high sulfur natural gas purification plant comprises a zero-resistance galvanometer (1), a fixing bracket (2), a zero-gravity test block (3), a double-electrode primary battery anode strip (4), an insulating bolt (5), an insulating layer (6), a double-electrode primary battery cathode strip (7), an insulating diagram (8) and electrode leading-out ends (9), wherein the electrode leading-out ends (9) are respectively led out from the double-electrode primary battery anode strip (4) and the double-electrode primary battery cathode strip (7), and the electrode leading-out ends (9) are connected with the zero-resistance galvanometer (1) through lead wires, so that a double-electrode primary battery is integrally formed. By adopting the technical scheme, the problems can be well solved, and the atmospheric environment corrosion testing device can be applied to the atmospheric environment corrosion test for the high sulfur natural gas purification plant.

The present invention provides a method for realizing magnetic suspension state through adoption of a closed loop constant current high-temperature superconducting coil which takes places of the novel superconductive suspension mode of high-temperature superconductor materials. The high-temperature superconductor materials are wound on a coil framework through a certain winding method (a drying winding method and a wet winding method), a closed loop structure is formed by employing the superconduction welding technology; and the closed loop high-temperature superconducting coil (1) is disposed in the low-temperature container and is located at the upper portion of a high-intensity magnetic field source, and field cooling enters the superconducting state. The superconducting coil has zero resistance property in the superconducting state, the induced current forms a constant current state in the closed loop high-temperature superconducting coil and maintains the interaction between an induced magnetic field and the high-intensity magnetic field source so as to realize passive and self-stable suspension similar to the high-temperature superconductor materials suspension.

The invention discloses an atmospheric corrosivity on-line monitoring system and method. The system comprises a corrosion galvanic couple. The corrosion galvanic couple comprises an anode plate and a cathode plate arranged in parallel. The anode plate and the cathode plate are arranged in a conductive solution. The anode plate and the cathode plate are respectively connected to outgoing lines. The outgoing lines are connected to a zero resistance galvanometer. The zero resistance galvanometer transmits the measured corrosion current to an atmospheric corrosion monitoring server. The atmospheric corrosion monitoring server carries out analysis and processing through the received corrosion current value from the corrosion galvanic couple and acquires an atmospheric corrosivity level at any time point through comparison with a preset standard.

A sectional golf tee is provided comprising a lower tee half which is made of a rigid material for penetrating the ground, and an upper tee half which is mechanically and/or magnetically mated to the lower tee half along a common longitudinal axis to elevate a golf ball with a loose cord keeping the halves within a retrieving distance. To an omnidirectional hitting impact at the ball the upper tee half is totally compliant by its physical separation from the lower tee half overcoming the mechanical and/or magnetic attraction with zero resistance to the club movement.

Source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits. During sensing the source of a memory cell is erroneously biased by a voltage drop across the resistance and results in errors in the applied control gate and drain voltages. This error is minimized when the applied control gate and drain voltages have their reference point located as close as possible to the sources of the memory cells. In one preferred embodiment, the reference point is located at a node where the source control signal is applied. When a memory array is organized in pages of memory cells that are sensed in parallel, with the sources in each page coupled to a page source line, the reference point is selected to be at the page source line of a selected page via a multiplexor.