203results about "Logic circuits using superconductive devices" patented technology

A superconducting quantum-bit device based on Josephson junction has a charge as a first principal degree of freedom assigned to writing and a phase as a second principal degree of freedom assigned to reading. The device comprises a Cooper-pair box comprising first and second Josephson junctions defining a charge island of the Cooper-pair box closing up onto a superconducting loop. A read circuit comprises a read Josephson junction JL inserted into the superconducting loop and having a Josephson energy Ej at least 50 times greater than the Josephson energy of each of the first and second Josephson junctions.

A computer program product with computer program mechanism embedded therein is provided. The mechanism has instructions for initializing a quantum system, which includes a plurality of qubits, to an initialization Hamiltonian HO. The system is capable of being in one of at least two configurations at any give time including HO and a problem Hamiltonian HP. Each respective first qubit in the plurality of qubits is arranged with respect to a respective second qubit in the plurality of qubits such that the first respective qubit and the second respective qubit define a predetermined coupling strength. The predetermined coupling strengths between the qubits in the plurality of qubit collectively define a computational problem to be solved. The mechanism further comprises instructions for adiabatically changing the system until it is described by the ground state of the problem Hamiltonian HP and instructions for reading out the state of the system.

A structure comprising (i) a first information device, (ii) a second information device, (iii) a first coupling element and (iv) a second coupling element is provided. The first information device has at least a first lobe and a second lobe that are in electrical communication with each other. The second information device and has at least a first lobe and a second lobe that are in electrical communication with each other. The first coupling element inductively couples the first lobe of the first information device to the first lobe of the second information device. The second coupling element inductively couples the first lobe of the first information device to the second lobe of the second information device.

A superconducting readout system includes a computation qubit; a measurement device to measure a state of the computation qubit; and a latch qubit that mediates communicative coupling between the computation qubit and the measurement device. The latch qubit includes a qubit loop that includes at least two superconducting inductors coupled in series with each other; a compound Josephson junction that interrupts the qubit loop that includes at least two Josephson junctions coupled in series with each other in the compound Josephson junction and coupled in parallel with each other with respect to the qubit loop; and a first clock signal input structure to couple clock signals to the compound Josephson junction.

An architecture for a quantum processor may include a set of superconducting flux qubits operated as computation qubits and a set of superconducting flux qubits operated as latching qubits. Latching qubits may include a first closed superconducting loop with serially coupled superconducting inductors, interrupted by a split junction loop with at least two Josephson junctions; and a clock signal input structure configured to couple clock signals to the split junction loop. Flux-based superconducting shift registers may be formed from latching qubits and sets of dummy latching qubits. The devices may include clock lines to clock signals to latch the latching qubits. Thus, latching qubits may be used to program and configure computation qubits in a quantum processor.

Superconducting single flux quantum circuits are disclosed herein, each having at least one Josephson junction which will flip when the current through it exceeds a critical current. Bias current for the Josephson junction is provided by a biasing transformer instead of a resistor. The lack of any bias resistors ensures that unwanted power dissipation is eliminated.

Systems and methods for copying the classical state of a source qubit to a target qubit are provided. These techniques may be used to read out the states of an array of qubits.

A first qubit having a superconducting loop interrupted by a plurality of Josephson junctions is provided. Each junction interrupts a different portion of the superconducting loop and each different adjacent pair of junctions in the plurality of Josephson junctions defines a different island. An ancillary device is coupled to the first qubit. In a first example, the ancillary device is a readout mechanism respectively capacitively coupled to a first and second island in the plurality of islands of the first qubit by a first and second capacitance. Quantum nondemolition measurement of the first qubit's state may be performed. In a second example, the ancillary device is a second qubit. The second qubit's first and second islands are respectively capacitively coupled to the first and second islands of the first qubit by a capacitance. In this second example, the coupling is diagonal in the physical basis of the qubits.

A coupling system to couple a first and a second qubit in response to a state of the coupling system that may be set by two input signals.

Routing and distribution of radio-frequency (RF) signals is commonly achieved in the analog domain. However, improved performance and simplified circuit architectures may be obtained by first digitizing the RF signal, and then carrying out all routing in the digital domain. A new generation of scalable digital switches has been developed, which routes both the data and clock signals together, this being necessary to maintain the integrity of the digitized RF signal. Given the extremely high switching speeds necessary for these applications (tens of GHz), this is implemented using Rapid-Single-Flux-Quantum (RSFQ) logic with superconducting integrated circuits. Such a digital switch matrix may be applied to either the receiver or transmitter components of an advanced multi-band, multi-channel digital transceiver system, and is compatible with routing of signals with different clock frequencies simultaneously within the same switch matrix.

Systems and methods for reading out the states of superconducting flux qubits may couple magnetic flux representative of a qubit state to a DC-SQUID in a variable transformer circuit. The DC-SQUID is electrically coupled in parallel with a primary inductor such that a time-varying (e.g., AC) drive current is divided between the DC-SQUID and the primary inductor in a ratio that is dependent on the qubit state. The primary inductor is inductively coupled to a secondary inductor to provide a time-varying (e.g., AC) output signal indicative of the qubit state without causing the DC-SQUID to switch into a voltage state. Coupling between the superconducting flux qubit and the DC-SQUID may be mediated by a routing system including a plurality of latching qubits. Multiple superconducting flux qubits may be coupled to the same routing system so that a single variable transformer circuit may be used to measure the states of multiple qubits.

Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.

A superconducting logic cell includes at least one quantum phase-slip junction (QPSJ) for receiving at least one input and responsively providing at least one output, each QPSJ being configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, where the presence and absence of the quantized charge in the form of a constant area current pulse in the output form two logic states, and the at least one QPSJ is biased with a bias voltage. The superconducting logic cell further includes at least one Josephson junction (JJ) coupled with the at least one QPSJ to perform one or more logic operations.