119 results about "Double balanced mixer" patented technology

A high performance radio frequency receiver includes a low noise amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to a current; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The in-phase and quadrature pulses have a duty cycle of 20-35%. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. Decreased die size, current drain, cost, and complexity, as well as improvements in gain, 1 / f noise, noise figure, sensitivity, and linearity may result.

A low noise multi-loop radio frequency synthesizer is disclosed for the read channel in a hard disk drive, and for RF wireless communications local oscillator applications. The frequency synthesizer receives an input reference signal having a frequency fR, into a fine tune phase locked loop and into a coarse tune phase locked loop. Driven by the input reference signal, the fine tune PLL outputs a fine tune signal with a frequency fR.P, where P is an integer, while the coarse tune PLL, also driven by the same input reference signal, outputs a coarse tune signal with a frequency fR.A, where A is an integer. A translation phase locked loop has a unity multiplication factor and is driven by the fine tune signal output. The frequency synthesizer finally has a Gilbert cell double balanced mixer coupled between the coarse tune and the translation phase locked loops, wherein the Gilbert cell mixer combines the coarse tune signal and the output signal of the translation phase locked loop and couples the mixed signal into the translation phase locked loop. The translation loop outputs a signal with a frequency which is proportional to the linear sum of the coarse tune signal and the fine tune signal.

Phase noise detection systems for a device under test (DUT) are provided that can be embedded within a chip. According to one embodiment, the embedded phase noise detection system can include an active delay line cell, a phase shifter, and a phase detector. The active delay line and phase shifter separately receive the output signal of the DUT. The phase detector can include a double-balanced mixer followed by an active RC filter. The double-balanced mixer receives, as input, the outputs from the active delay line and phase shifter and can produce different dc voltages proportional to the difference from the input phase quadrature. An auto-adjustment circuit can also be included to help the input signal from the phase shifter to the mixer maintain quadrature.

A doubly balanced upconverter mixer includes a local oscillator balun circuit comprising juxtaposed foil elements on opposite sides of an insulated substrate with electrical interconnections between the foil elements. An IF balun circuit also comprises series tuned and parallel tuned foil elements on opposite sides of the substrate in juxtaposition to each other. A diode switching network interconnects the baluns. A local oscillator signal is connected to the foil elements of the local oscillator balun circuit, an RF signal is coupled to one foil element of the IF balun circuit and an IF signal is taken from the other foil element of the IF balun circuit. Another embodiment incorporates MESFET type switches, the gates of which are supplied directly with a symmetrical local oscillator signal. This arrangement eliminates the need for the local oscillator balun.

A high performance radio frequency receiver includes an isolated transconductance amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to multiple electrically isolated currents; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. IIP2 calibration of the in-phase and quadrature channels may be optimized using the isolated transconductance amplifier.

A double balanced mixer for mixing an RF input signal with a local oscillator signal to provide at an output an intermediate frequency signal with a high third order intercept point. A first and second local oscillator balun receives a local oscillator signal. A first and second RF balun receives a RF signal. A first mixer is coupled to the first local oscillator balun and the first RF balun. A second mixer is coupled in parallel with the first mixer. The second mixer is coupled to the second local oscillator balun and the second RF balun. The parallel coupled mixers provide an intermediate frequency signal. A first intermediate frequency balun is coupled to the first mixer and a second intermediate frequency balun is coupled to the second mixer. The mixer also has increased isolation.

The present invention describes active double-balanced mixers. The mixers use an isolation and matching section that provides RF section input matching and superior isolation between the LO and RF port. The mixers can be implemented using an inexpensive semiconductor processing technology, obviating the need for matching inductors and facilitating a low-cost, low-power fully integrated wireless receiver.

A double balanced mixer has a DC detection circuit connected to receive the output of the mixer core. The detected level is applied to adjust the duty cycle of the transistors of the mixer core. In one example, this adjusting level is added to the local oscillator signals that are applied to the core. In another example, the level is applied to adjust the threshold of the transistors of the mixer core. In a further example, the duty cycle of the local oscillator signals is adjusted before it is applied to the mixer core Also provided is an input stage for a double balanced mixer core, which comprises a transistor having a low pass filter as a feedback circuit.

The invention provides a digital PLL (Phase-Locked Loop) based phase noise measuring device. The digital PLL based phase noise measuring device comprises a frequency power measuring unit, a phase discrimination unit, a filtering unit, a DC (Direct Current) bias compensation unit, a low-noise amplification unit, an acquisition, frequency discrimination and phase discrimination unit, a digital loop filtering unit, a phase discrimination constant detection unit, a self-adaptive digital gain control unit, a reference source unit, and a signal processing and displaying unit. According to the digital PLL based phase noise measuring device, a double-balanced mixer is adopted as a phase discriminator, the phase noise of a measured source is extracted through a digital PLL, the specific noise extraction mode is divided into frequency mixer phase discrimination and digital delay line frequency discrimination, and DC caused by a loop circuit is counteracted through a DC bias compensation circuit, so that too big DC after amplification, induced ADC saturation and induced loop lock-losing are prevented. The implementation scheme of the digital PLL based phase noise measuring device is simple, totally excellent phase noise measuring sensitivity can be realized, the realized analysis frequency spectrum range is also very wide, and phase noise testing demands of most signal sources can be satisfied.

The mixer circuit is a singled ended input to a double balanced high dynamic range mixer with only two base-emitter junctions across the supply. It provides for the use of bondwires to off chip ground as DC block and DC feed elements. The single ended input and differential output balanced mixer is well suited for the input stage of an integrated radio receiver—off chip circuitry is usually single ended, but on chip circuits are usually differential. No off chip differential RF circuits or baluns are required which reduces off chip component count and improves radio performance. The mixer circuit has lower LO drive requirements because of the DC coupled LO port. This results in better radio performance and a smaller die area because of the DC coupled IF port.

A frequency converters used in communications receivers. Such frequency converters can be used for converting a signal from a Radio Frequency (RF) to a low frequency suitable for processing such as demodulation. The inventors have made the unexpected discovery that when the gates of the MESFETs of a double-balanced mixer are left open-circuited and allowed to self-bias, the drop in mixer linearity at high LO power levels is reduced thereby increasing the LO power range of operation. This invention can be used as an improved scale-down mixer as well as an upconverter mixer.

The present invention relates to a single side band modulator for splitting a signal into a first split signal and a second split signal 90 degrees out of phase with the first split signal. A first double balanced mixer modulates the first split signal and includes a transformer, a modulating signal input, and a first diode ring. The transformer connects the first diode ring to a quadrature hybrid. A second double balanced mixer modulates the second split signal and includes a transformer, a modulating signal input, and a second diode ring. The transformer of the second double balanced mixer connects the second diode ring to the quadrature hybrid. The first and second diode rings are connected in parallel and are connected to a third transformer which performs the function of a power combiner.

A double balanced FET mixer that has a high third order intercept point and an intermediate frequency response that goes to direct current levels. The mixer includes a local oscillator terminal, a RF terminal and an intermediate frequency terminal. The mixer has a pair of field effect transistors. Each field effect transistor has a gate, a drain and a source electrode. The source electrodes of the first and second transistors are connected together. A first balun transformer is connected between the local oscillator terminal and the gates. A second balun transformer is connected between the drains and the RF terminal and the intermediate frequency terminal.

The invention discloses a wide / intermediate frequency MMW (Millimeter Wave) double-balance passive frequency mixer. According to the wide / intermediate frequency MMW double-balance passive frequency mixer disclosed by the invention, a transconductance stage of a traditional active double-balanced mixer is replaced by utilizing an inductor and a serial-connection network at an unbalance end of a Marchand Balun which is arranged at a radio frequency input end, and passive frequency mixing is realized; and in addition, a local oscillation signal can be in frequency mixing with a radio frequency signal which is injected from a source electrode through a grid electrode of a frequency mixing transistor subjected to peak inductance injection after being changed into a differential signal through a Marchand Balun at a local oscillation input end.

A double balanced mixer for mixing an RF input signal with a local oscillator signal to provide at an output an intermediate frequency signal with high isolation over a wide frequency range. The mixer includes a local oscillator balun that is operable to receive a local oscillator signal. A RF balun that is operable to receive a RF signal. A first mixer has a first input port that is coupled to the local oscillator balun and a second input port that is coupled to the RF balun. The first mixer has an output port to provide an intermediate frequency signal. A second mixer is coupled in parallel with the first mixer. The second mixer has a first input port that is coupled to the local oscillator balun and a second input port that is coupled to the RF balun. The second mixer has an output port that provides an intermediate frequency signal. An intermediate frequency balun is coupled to the output ports of the first and second mixers.

A high-frequency receiver and a portable device using the same receiver are proposed for reducing power consumption. Image interference determiner (44) determines whether or not image interference exists at the present position in a desirable channel to be received, which channel is obtained by a receiving section (39) or a GPS receiver (43). Power supply control circuit (47) switches mixer (49) from an image rejection mixer to a double balance mixer when determiner (44) determines no image interference involves. This mechanism allows mixer (49) to work as the double balance mixer circuit during the reception of channels free from image interference, so that a mixer consuming less power is achievable. When mixer (49) works as the image rejection mixer circuit, image interference can be reduced.

The invention discloses a lock protection type high-performance broadband microwave frequency synthesizer. The lock protection type high-performance broadband microwave frequency synthesizer comprises a constant-temperature crystal oscillator, a power divider, an analogue frequency doubling circuit, a DDS, a phase discriminator and a broadband VCO connected sequentially; the power divider is also connected to a comb spectrum generator and a broadband double-balance frequency mixer sequentially; the broadband VCO is connected to a second directional coupler, a second microwave amplifier, the broadband double-balance frequency mixer and a low-pass filter sequentially; the low-pass filter is connected to the phase discriminator, such that a closed ring is formed; the phase discriminator is connected to a second loop filter; the second loop filter is connected to the second branch of a single-pole double-throw switch; an FPGA is respectively connected with the DDS and the single-pole double-throw switch; the circuit forms a frequency synthesis circuit; and a phase-locked loop lock protection circuit is connected to the synthesis circuit. According to the invention, the DDS is used as a broadband phase-locked loop reference signal; the comb spectrum generator is used as a offset source; and thus, the frequency synthesizer, which is low in circuit complex degree, wide in frequency band, high in frequency resolution, low in phase noise and low in spurious suppression, can be realized.

A hybrid Marchand / back-wave balun includes a first pair of coupled sections having a first primary section and first secondary section; a second pair of coupled sections having a second primary section and second secondary section; a first reactance interconnecting the first and second primary sections and a second reactance interconnecting the first and second secondary sections; one of the reactances being open at high frequency and shorted at low frequency, the other reactance being shorted at high frequency and open at low frequency for selectively providing low frequency Marchand / high frequency back-wave function and high frequency Marchand / low frequency back-wave function; and a double balanced mixer using same.

The invention discloses a novel passive balun structure, wherein a differential signal terminal of the balun structure is connected with a compensation structure; the compensation structure comprisesa phase shifter and a compensation resistor; the phase shifter and the compensation resistor are directly connected; the phase shifter is a left-handed material phase shifter or a right-hand materialphase shifter; two passive balun structures are designed in a passive double-balanced mixer; a single-ended port of the first passive balun structure is connected with a local oscillation signal, thesingle-ended port of the second passive balun structure is connected with a radio frequency signal input / output end, and four differential ports of the two passive balun structures are cross-connectedto a mixing unit; the differential port of the second passive balun structure leads to an intermediate frequency signal output / input end through a filtering / matching circuit. In the case of hardly influencing the balun loss and degree of balance, the port matching degree of the balun and the isolation degree of the differential signals are greatly improved through the compensation structure; andthe improved balun is applied to the balanced mixer, so that the performances of the mixer are improved to a certain extent.

The invention discloses a semi model substrate integrated waveguide double balanced mixer and an implementation method thereof. The double balanced mixer consists of an RF Balun, a local oscillation Balun, an RF waveguide cavity, a local oscillation waveguide cavity, a mixing tube and a low-pass filter. The implementation method comprises the following steps: a) RF signals are caused to go through the RF Balun so as to obtain RF isolation signals, local oscillation signals are caused to go through the local oscillation Balun so as to obtain local oscillation isolation signals and the amplitude of the RF isolation signals is equal to that of the local oscillation isolation signals while the phase difference is 180 degrees; b) the RF isolation signals and the local oscillation isolation signals in the step a are caused to go through the mixing tube so as to obtain mixing signals; and c) the mixing signals in the step b are caused to go through the low-pass filter so as to obtain intermediate-frequency signals. The double balanced mixer provided by the invention reduces the volume of the Balun and has high mixing efficiency, wide bandwidth and simple structure, thus being very easy to be realized in the Balun engineering.

The invention discloses an adaptive maximum intermediate frequency energy tracking radar receiving system, and the system comprises a radio frequency front end, a triggering board, an intermediate frequency amplifier board, and a radar terminal. The radio frequency front end comprises a low-noise amplifier, a double-balance frequency mixer, and a local oscillator. The triggering board comprises a microprocessor, a programmable gate array, a signal buffering processing module, an analog-digital conversion module, and a digital-analog conversion module. The intermediate frequency amplifier board comprises an energy voltage conversion circuit, a low-noise intermediate frequency amplification circuit, a band-pass filter circuit, a logarithmic amplification detection circuit, and a push output circuit. The radar terminal comprises a terminal processing display module. The invention provides a brand-new receiving system based on maximum intermediate frequency energy tracking, completely changes a mode of automatic frequency control of a conventional navigation radar receiving system, and effectively solves a problem that a conventional mode of frequency tracking causes the decrease of capability of finding a small object because of the frequency spectrum change of a radar transmitter magnetron. The digitalization of the radar receiving system improves the reliability and expansibility of the radar receiving system.

An embodiment of a mixer with carrier leakage self-calibrating is disclosed. The mixer comprises a double balanced mixer, a gm stage comprising a first processing unit and a second processing unit, a current duplicating circuit, a capacitor, a controller and a current compensation unit. The current duplicating circuit selects the first processing unit or the second processing unit and duplicates a duplicated current of the selected processing unit to charge the capacitor. The capacitor has a first terminal and a second terminal, wherein the second terminal is grounded and the first terminal receives the duplicated current. The controller determines a charge time of the capacitor to generate a compensation signal, wherein the charge time is the time that the voltage of the capacitor is charged to equal to a reference voltage. The current compensation unit receives the compensation signal to generate a compensation current to the mixer.