37 results about "DC block" patented technology

The utility model discloses a low-internal resistance direct current detection circuit and electronic equipment. The circuit comprises a sampling resistor unit, an analog single-pole double-throw switch, a first blocking capacitor, a first voltage amplification unit, a second blocking capacitor, a frequency mixing unit, a second voltage amplification unit, a third blocking capacitor and a control unit. The sampling resistor unit is arranged in a direct current loop to be measured; the analog single-pole double-throw switch is used for converting direct-current voltage at two ends of the sampling resistor into a high-frequency alternating signal; the first voltage amplification unit amplifies the signal and then outputs the signal to the frequency mixing unit through the second blocking capacitor; the mixing unit outputs a low-frequency mixing signal under the action of the mixing control signal; the second voltage amplification unit differentially amplifies the frequency mixing signal and then outputs a third output voltage signal through a third blocking capacitor, and the third output voltage signal is used for determining the magnitude of loop current and controlling gear switching. The circuit is simple in structure, low in cost and suitable for large-range direct current on-line continuous detection.

The utility model discloses a full-bridge converter module without a blocking capacitor. The full-bridge converter module comprises an input filtering unit, a first inversion bridge arm, a second inversion bridge arm, a planar transformer T, a first rectification bridge arm, a second rectification bridge arm, a planar inductor Lf, an output capacitor Co and a square wave detection unit M, the output capacitor Co is connected between the output positive end and the output negative end; a load Rload is connected between the output positive end and the output negative end; according to the full-bridge converter module, a planar magnetic technology is adopted, blocking capacitor configuration is avoided, positive and negative volt-second products are calculated through square wave voltage sampled by a resistance voltage division circuit and driving edge time captured by a comparator circuit, duty ratio control quantity is output, primary side full-bridge driving signal pulse width is dynamically adjusted, and magnetic flux balance control is achieved; the problem that the blocking capacitor occupies a large area is solved, and the high-power density design of the brick power supply module can be realized.

The utility model discloses a characteristic current transmitting circuit for a transformer area topology identification device, which relates to the technical field of intelligent low-voltage power distribution and comprises a rectifying circuit used for converting alternating-current mains supply into high-voltage direct current and serially connecting a fuse to realize over-current protection; the direct-current voltage stabilizing circuit is connected with the output end of the rectifying circuit, consists of a voltage stabilizing tube, an MOS (Metal Oxide Semiconductor) tube and a resistor-capacitor element, and is used for outputting stable low-voltage direct-current voltage, and the static power consumption is microampere level; the characteristic current signal transmitting circuit comprises a blocking capacitor, a push-pull output triode and an optocoupler, and is used for receiving an external PWM signal and coupling the external PWM signal to the optocoupler through the blocking capacitor so as to generate a driving signal; and the constant current transmitting circuit is connected with the output end of the characteristic current signal transmitting circuit and comprises an MOS (Metal Oxide Semiconductor) tube and a negative feedback resistor, and the gate-source voltage is adjusted through the negative feedback resistor to realize constant current output. The circuit is low in static power consumption, stable in constant current output, strong in anti-interference performance, and simple in structure.

The application discloses a multi-mode power amplifier circuit for electronic warfare and a dual-band communication system and belongs to the technical field of microwave integrated circuits. pn The application introduces a plurality of reconfigurable branches with the same structure in the circuit structure, each of which comprises a capacitor C sn , an inductor L pn , a DC blocking capacitor C sn and a switching transistor Q sn , the capacitor C pn and the inductor L pn are connected in parallel to form a band-pass network, one end of the band-pass network is connected with the drain of the switching transistor Q sn through the DC blocking capacitor C sn , the source of the switching transistor Q sn is grounded, the gates of the switching transistor Q sn in the first, second and third reconfigurable branches are connected and are all connected to a DC control power supply V gc . The switching of the ultra-wideband and the communication band can be realized by changing the control voltage of the switching transistor in the reconfigurable branch and the drain power supply circuit of the pre-stage electric amplification path, and the multi-mode operation of the high-performance power amplifier in the ultra-wideband and the dual communication band is realized.

This invention discloses a system and method for achieving atomic layer etching (ALE) and radical-enhanced deposition (REED) in a single chamber. The system features a switchable DC blocking capacitor for grounding an electrostatic chuck (ESC) to eliminate the plasma sheath, and employs high-power short-pulse RF to suppress ion bombardment during ALE surface modification and REED deposition steps, thereby achieving efficient processing and making it suitable for applications such as the fabrication of high aspect ratio structures.

The invention discloses a reflective broadband energy amplification surface with polarization selectivity. The reflective broadband energy amplification surface comprises a plurality of energy amplification surface units which are periodically distributed, and each energy amplification surface unit comprises a first metal surface, a second metal surface, a third metal surface, a fourth metal surface and a fifth metal surface which are separated by dielectric substrates. The third metal surface adopts two rectangular metal patches which are distributed in an L shape; the fifth metal surface comprises a C-shaped microstrip transmission line, a feed microstrip line and a rectangular metal patch; an amplifier and two blocking capacitors are connected in series on the middle section of the C-shaped microstrip transmission line, and two arms are respectively connected with the two rectangular metal patches through via holes. The feed microstrip line is connected in series with an inductor and a resistor, and the amplifier, the resistor, the blocking capacitor and the inductor form a radio frequency amplification and bias filter circuit. According to the invention, by introducing an active amplification circuit and a polarization coupling mechanism, energy amplification and polarization regulation and control of in-band incident waves are realized.

The application provides a charger power module, comprising a substrate assembly, a frame assembly, a support capacitor assembly and a DC blocking capacitor assembly, the support capacitor assembly is located at the bottom of the frame assembly, the frame assembly and the support capacitor assembly enclose a frame structure, the frame structure is fixed on one side of the substrate assembly, the frame structure and the substrate assembly enclose a receiving cavity, the DC blocking capacitor assembly is located at the upper part of the receiving cavity and is electrically connected with the frame assembly and the substrate assembly respectively, the substrate assembly comprises a radiator substrate, a magnetic element and a power device electrically connected with the magnetic element, the frame structure is connected with the radiator substrate to enclose the receiving cavity, and the magnetic element and the power device are respectively integrated on the side of the radiator substrate facing the receiving cavity. The charger power module provided by the application has the advantages of compact structure, reasonable layout and high integration degree, and can better realize the miniaturization, light weight and simple design of the charger.

A device may include a transistor die including a transistor and a transistor input terminal and a transistor output terminal, and an output circuit coupled between the amplifier output and the transistor output terminal, wherein the output circuit includes: a DC blocking capacitor, a first inductance electrically connected between the transistor output terminal and a first terminal of the DC blocking capacitor, and a series-connected second inductance and a first capacitor connected, in parallel with the first inductance, between the transistor output terminal the first terminal of the DC blocking capacitor, wherein a second terminal of the DC blocking capacitor is connected to a ground node and wherein the first inductance and the series-connected second inductance and the first capacitor form at least a portion of a pseudo tank circuit in which the first inductance is configured to resonate with the first capacitor.

This invention relates to the field of radio frequency integrated circuit technology, specifically disclosing a high-gain, adjustable-gain low-noise amplifier, including a DC blocking capacitor circuit, a first-stage amplifier circuit, and a second-stage amplifier circuit. The second-stage amplifier circuit includes an amplifying transistor and a gain control unit. The DC blocking capacitor circuit is connected to the input terminal of the second-stage amplifier circuit through the first-stage amplifier circuit, and the gain control unit is connected between the input and output terminals of the amplifying transistor. The DC blocking capacitor circuit is used to input a radio frequency signal. The first-stage amplifier circuit amplifies the radio frequency signal to output a pre-amplified radio frequency signal. The second-stage amplifier circuit amplifies the pre-amplified radio frequency signal to output a further amplified radio frequency signal. The gain control unit is used to adjust the closed-loop gain of the second-stage amplifier circuit. This invention can provide adjustable high gain and can achieve balun-free single-ended input to dual-ended output conversion, saving circuit area and power consumption.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.

An audio amplifier chip includes an audio amplifier, a current providing circuit, a detection circuit, and a control circuit. The audio amplifier is arranged to drive a speaker, wherein the audio amplifier has multiple differential input terminals, and a direct current (DC) blocking capacitor is coupled to one of the multiple differential input terminals. The current providing circuit is arranged to provide at least one current for charging the DC blocking capacitor. The detection circuit is coupled to a node located between the one of the multiple differential input terminals and the DC blocking capacitor, and is arranged to detect whether an external resistor of the audio amplifier chip exists according to an input voltage from the node, in order to generate a detection result. The control circuit is arranged to determine a start-up time of the audio amplifier according to the detection result.

This application discloses a high-frequency reliability testing circuit and a semiconductor reliability testing device. The high-frequency reliability testing circuit includes: a signal input terminal for receiving a high-frequency sinusoidal signal; a DC blocking capacitor, one end of which is coupled to the signal input terminal; a self-biased inverter unit, its input terminal coupled to the other end of the DC blocking capacitor, for converting the high-frequency sinusoidal signal into a quasi-square wave signal; a buffer unit, its input terminal coupled to the output terminal of the self-biased inverter unit, for shaping and amplifying the quasi-square wave signal to generate a shaped square wave signal; and a signal output terminal coupled to the output terminal of the buffer unit for outputting the shaped square wave signal. The signal output terminal is coupled to the device under test (DUT) to apply the shaped square wave signal as AC electrical stress to the DUT. This application solves the problem of high-frequency test signals being limited by external bandwidth in the prior art, enabling accurate assessment of the reliability and lifetime of devices in high-frequency application scenarios.

The invention discloses a high-performance dual-mode frequency multiplier circuit. The frequency multiplier can be applied to a millimeter wave band, and outputs frequency doubling and frequency tripling signals at the same time. The circuit comprises an input balun, an improved push-push frequency doubler, a frequency tripler based on a single balanced mixer, and an output balun. The input Balun converts an input single-ended fundamental wave signal into a differential signal; the improved push-push frequency doubler comprises a main body push-push frequency doubler formed by field-effect tubes M1 / M2 and a gain-enhanced cross coupling pair formed by field-effect tubes M3 / M4, and is used for completing secondary frequency doubling of a fundamental wave signal, wherein the main body push-push frequency doubler is formed by the field-effect tubes M1 / M2, and the gain-enhanced cross coupling pair is formed by the field-effect tubes M3 / M4. The frequency tripler based on the single balanced mixer completes self-mixing frequency tripling of a fundamental wave signal through output matching inductors L1 and L2 and blocking capacitors C5 and C6; and the output Balun finishes subtraction operation of the two paths of signals and then retains a triple frequency signal. The scheme of the invention has the characteristics of dual-mode frequency multiplication ratio, high gain and simple structure.

The invention discloses a novel DC block, which belongs to the technical field of microwave capacitor assembly, is of a coaxial structure, and comprises a DC block inner conductor, a DC block outer conductor and an insulating support, the DC block inner conductor comprises a first inner conductor, a second inner conductor and a third inner conductor, the DC block outer conductor comprises a first outer conductor, a second outer conductor, a third outer conductor and a fourth outer conductor, the two first inner conductors are respectively arranged in the second inner conductor and the third inner conductor, and the second inner conductor, the third inner conductor and the insulating support are arranged in the first outer conductor through interference fit; the microwave capacitor is assembled between the two first inner conductors, the side wall of the first outer conductor is provided with an opening, the position of the microwave capacitor corresponds to the position of the opening, and the second outer conductor is arranged in the opening of the first outer conductor. According to the novel DC block, multiple conversion links of'coaxial-microstrip-capacitance-microstrip-coaxial 'are canceled, so that signal reflection and energy loss caused by mode conversion and discontinuous impedance are reduced.

A positive-logic FET switch stack that does not require a negative bias voltage, exhibits high isolation and low insertion / mismatch loss, and may withstand high RF voltages. Embodiments include a FET stack comprising series-coupled positive-logic FETs (i.e., FETs not requiring a negative voltage supply to turn OFF), series-coupled on at least one end by an “end-cap” FET of a type that turns OFF when its VGS is zero volts. The one or more end-cap FETs provide a selectable capacitive DC blocking function or a resistive signal path. Embodiments include a stack of FETs of only the zero VGS type, or a mix of positive-logic and zero VGS type FETs with end-cap FETs of the zero VGS type. Some embodiments withstand high RF voltages by including combinations of series or parallel coupled resistor ladders for the FET gate resistors, drain-source resistors, body charge control resistors, and one or more AC coupling modules.

When the signal level of a signal outputted from a predetermined amplifier among the at least one amplifier is greater than or equal to a reference voltage, the comparator unit outputs, from its output terminal, an output signal which is in line with the difference between the signal level and the reference voltage. The DC blocking unit is electrically connected, at its first terminal, to the output terminal of the comparator unit, and outputs, from its second terminal, a signal obtained by blocking the DC component of the output signal. The detection unit is electrically connected, at its input terminal, to the second terminal of the DC blocking unit, and outputs, from its output terminal, a control signal, which is in line with the signal level of the signal outputted from the predetermined amplifier, to a predetermined circuit capable of reducing the gain of the power amplifier circuit.

This invention discloses an on-chip compact dual-core dual-path quality factor enhancement source degradation fully differential low-noise amplifier, comprising four MOS transistors, gate-source capacitors, DC blocking capacitors, bias resistors, and inductors. Four source half-turn inductors form a first transformer, and two gate-end inductors coupled together form a second transformer, which is nested within the first transformer. The first and second transformers constitute a multiplexed four-turn coupled transformer, simultaneously achieving source degradation imaginary and real part matching within the same transformer area. In differential operation, the currents in both signal paths enhance the magnetic flux, improving the effective inductance and quality factor of the inductors. This achieves on-chip integration of gate-end inductors in the Sub-6GHz band, optimizing noise, gain, and area efficiency.

The invention provides a broadband high-voltage DC block design method suitable for power electronic equipment and a DC block. The design method is characterized by comprising the following steps: step 1, designing a coaxial transmission line structure suitable for a high-voltage environment according to the relation between the characteristic impedance of a coaxial cable and the radiuses of inner and outer conductors and considering the breakdown voltage of a medium between the conductors; 2, according to the measurement frequency range of the power electronic equipment, the withstand voltage and the capacitance value of a blocking capacitor are designed, so that the S parameter of the blocking capacitor meets the performance requirement; and step 3, designing an interface adapter according to requirements. The DC block designed by the invention can greatly attenuate low-frequency high-voltage large-current components in the power electronic equipment, and meanwhile, ensures that a measurement signal is loaded on the tested equipment without distortion, so that the DC block is suitable for a power electronic equipment test environment. According to the invention, the requirements on the dielectric material and the processing precision of the DC block are low, the design method has certain universality, the device is simple in structure, and the manufacturing method is easy to implement.

This invention proposes a single-pole double-throw (SPD) high-power switch chip with a positive input voltage, comprising transistors M1-M18, DC blocking capacitors C1-C5, bonding inductors L1-L3, microstrip lines TL1-TL5, and bias resistors R1-R3. By adding two bias resistors at the input, this invention transforms the original negative input SPD double-throw switch into one that only requires a positive input voltage, simplifying the circuit implementation. Furthermore, by stacking multiple series-parallel switching transistors on the basis of traditional series-parallel switches, this invention achieves high-power input. Simultaneously, the multiple parallel transistors ensure good isolation and isolation bandwidth over a wide frequency range, and the microstrip line matching results in excellent switch insertion loss and other performance characteristics.

A power transfer device according to one embodiment of the present invention comprises: an impedance matching network for transferring RF power of an RF generator to a load; a band elimination filter which transfers the DC pulse voltage of the DC pulse generator to a load and suppresses transfer of the RF power to the DC pulse generator; the DC blocking capacitor is connected to the output end of the impedance matching network and used for inhibiting the DC pulse voltage passing through the output end of the band elimination filter from being transmitted to the impedance matching network; and an impedance converter connected to the output end of the band elimination filter and changing the impedance of the RF power incident to the band elimination filter. The output end of the impedance converter and the output end of the DC blocking capacitor are connected with each other and then are connected to the load through a transmission line.

The invention provides a dual-mode collector based on radio frequency communication and carrier communication, which comprises a micro-control unit, an RS485 interface communication circuit, a wireless radio frequency circuit, a high-speed power line carrier communication circuit, an AC-to-DC module and a power supply processing module which are connected according to a preset link to form a complete collection and transmission system, the collector collects metering data and state information of an electric energy meter through the RS485 interface communication circuit, after the metering data and the state information are processed by the micro-control unit to generate a to-be-transmitted data packet, the to-be-transmitted data packet is transmitted to a concentrator through the high-speed power line carrier communication circuit or the wireless radio frequency circuit, and the problem that an existing single-mode collector is single in communication mode is solved by adopting a dual-mode communication architecture. The system can adapt to different installation scenes, provides a redundant transmission path to avoid transmission interruption caused by a single-path fault, facilitates later maintenance and upgrading through a modular architecture, remarkably improves the adaptability and reliability of data transmission and the fault-tolerant capability of the system, and meets the data collection and transmission requirements of an intelligent power grid.

This invention discloses a novel compact and efficient dual-frequency rectifier based on a dual-composite left- and right-handed harmonic control structure. It includes a dielectric substrate with a dual-frequency matching network, a dual-composite left- and right-handed dual-frequency harmonic control network, a DC blocking capacitor, an RF choke coil, a DC filter, a diode impedance tuning line, and a diode on its upper surface. The lower surface of the dielectric substrate has a metal ground. The dual-frequency matching network consists of two series matching transmission lines. The first end is connected to an RF connector for receiving RF signals, and the second end is connected to the DC blocking capacitor. The dual-composite left- and right-handed dual-frequency harmonic control network integrates an interdigital capacitor and a parallel matching transmission line. The first end is connected to the dual-frequency matching network through the DC blocking capacitor, the second end is connected to the diode impedance tuning line through the diode, and the third end is connected to the DC filter through the RF choke coil. This invention has the advantages of simple structure, high efficiency, and small size, and is suitable for wireless power supply and miniaturized energy harvesting systems.

This invention discloses a single-stage isolated bidirectional AC / DC converter, which consists of a primary-side inverter bridge, a high-frequency transformer, a transmission inductor, a DC blocking capacitor, a secondary-side inverter bridge, a secondary-side DC capacitor, an LC filter, a DC port, and an AC port. The primary-side inverter bridge can be one of a full-bridge, a half-bridge, or an interleaved parallel Boost multiplexed full-bridge; the secondary-side inverter bridge can be one of a full-bridge or a half-bridge. Depending on the different secondary-side inverter bridge topologies and control methods, the LC filter can be one of a single-ended filter circuit consisting of one inductor and one capacitor, or a double-ended filter circuit consisting of two inductors and one capacitor. This invention utilizes the high-frequency AC component in the output waveform of the secondary-side inverter bridge under SPWM control, isolates the low-frequency AC component through capacitors, and uses dual active bridges for power transmission and control.

This application provides a method, apparatus, device, and storage medium for suppressing magnetic bias. Relating to the field of power electronics technology, the method includes: sampling the bus capacitor current at least twice within a single switching cycle, with a time interval of half a switching cycle between the two samplings; obtaining a magnetic bias detection signal reflecting the degree of magnetic bias of magnetic components in a single-stage converter based on the sampled current from the at least two samplings; generating a duty cycle compensation signal based on the magnetic bias detection signal; and adjusting the duty cycle of the primary-side switching transistor based on the duty cycle compensation signal to suppress the magnetic bias of the magnetic components. This method, through software control logic of multiple samplings and dynamic duty cycle compensation within a switching cycle, replaces the traditional DC blocking capacitor hardware solution, fundamentally solving the magnetic bias problem of magnetic components and improving the operational stability and energy transfer efficiency of the single-stage converter.

The application provides a kind of multi-channel full isolation constant current device and superconducting circuit test system, comprising: DC power supply module, for providing N first DC power supply;DC-DC module, each first DC power supply is converted into corresponding second DC power supply, wherein each second DC power supply is independent power supply;Numerical control constant current module, based on control signal, N second DC power supply is converted into N constant current source respectively;N is a natural number greater than 1.The application realizes the constant current output of full isolation type, guarantees the independence between each channel;Each module design is relatively flexible, each channel is relatively independent, easy to expand;High integration, small size, easy to carry;Adopt battery power supply, each channel noise interference is small;Adopt numerical control, high precision;And adopt optical fiber isolation, the interference between each channel is small.

This invention provides a high-voltage power supply ripple measurement device, relating to the field of power supply measurement technology. It includes a high-voltage input interface for connecting a high-voltage power supply, a signal output interface for connecting a measuring instrument, a ground reference terminal, and a ripple detection circuit. The ripple detection circuit includes a DC resistor network electrically connected between the high-voltage input interface and the ground reference terminal, providing a DC path for the high-voltage power supply. One end of a DC blocking capacitor is electrically connected to the high-voltage input interface, and the other end, along with the signal output interface and one end of an overvoltage protection circuit, is electrically connected to a common node. The DC blocking capacitor blocks the DC component of the high-voltage power supply, coupling the AC ripple signal from the high-voltage power supply to the signal output interface. The other end of the overvoltage protection circuit is electrically connected to the ground reference terminal, providing a low-impedance energy discharge path from the common node to the ground reference terminal when the DC blocking capacitor fails or when a surge overvoltage occurs at the signal output interface, thus achieving safe measurement of the high-voltage power supply and accurate extraction of the ripple signal.

This invention provides an online monitoring device for DC bus capacitors, belonging to the field of capacitor monitoring technology. It includes an AC / DC module for converting AC to DC, a DC / AC module for converting DC to AC, a current transformer module for acquiring current values, a voltage acquisition module for acquiring voltage values, a capacitor module for filtering, a temperature sensor module for measuring the temperature of the capacitor module, an ADC module for converting analog signals to digital signals, and a CPU module for data processing. The ADC and CPU modules operate on an ESR joint degradation model, calculate the capacitor capacitance and equivalent series resistance using a fast Fourier transform, and apply temperature compensation correction using a temperature coefficient. By analyzing the compensated parameters, a precise alarm is triggered when the capacitor capacitance is below 70% of its rated value or the equivalent series resistance exceeds 200% of its initial value. This solution requires no downtime and has an error of less than 5%.

Examples disclosed herein are relevant to testing capacitors to identify potentially faulty DC blocking capacitors in implantable stimulators. In an example, the test includes selecting an active electrode, a return electrode, and a reference electrode. Short duration monophasic stimulation is used to charge up the DC blocking capacitors of the active and return electrodes. The electrodes are subsequently disconnected from all other nodes except a discharge circuit (e.g., a star circuit) and the tissue. The reference electrode is used to measure the voltage of the DC blocking capacitor of the active electrode during the charging phase and the discharging phase (via the discharge circuit). The characteristics of one or more of the capacitors charging or discharging can be sensed and then analyzed to determine whether the one or more capacitors are functioning properly. Faulty capacitors can be identified by comparing actual and expected characteristics.

This invention belongs to the field of mobile communication technology and discloses an antenna radome composed of multiple units arranged sequentially in a plane. Each unit includes orthogonally placed vertical dielectric substrate (1), horizontal dielectric substrate (2), vertical slot line (3), first horizontal slot line (4-1), second horizontal slot line (4-2), vertical impedance transformer (5), horizontal impedance transformer (6), vertical amplifier (7), horizontal amplifier (8), vertical bias network (9), horizontal bias network (10), power divider combiner (11), output impedance transformer (12), and several DC blocking capacitors. This radome achieves non-reciprocal polarization conversion characteristics over a wide frequency range, has high non-reciprocal isolation, and has advantages such as low angle sensitivity and easy integration.