73 results about "DC block" patented technology

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor (“capless LNAs”). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.

The invention belongs to but not limited to the technical field of wireless energy transmission and electromagnetic energy collection, and particularly relates to a simple and compact ultra-wideband rectifying circuit and a design method thereof. Comprising a top-layer microstrip structure, a middle dielectric substrate and a bottom-layer metal floor, the top-layer microstrip structure and the bottom-layer metal floor are respectively positioned on the upper surface and the lower surface of the middle dielectric substrate; the top microstrip structure comprises a radio frequency input port, a broadband impedance matching network, a direct current blocking and passing capacitor, a diode topological structure, a harmonic suppression and harmonic recovery network and a direct current output port; the two diodes in the diode topology are directly connected with the direct current filter capacitor, so that the load impedance is effectively compressed, the harmonic suppression and harmonic recovery functions are realized, and the working frequency range of the rectification circuit is widened; according to the ultra-wideband rectification circuit, ultra-wideband impedance matching is realized through a section of short conical gradient transmission line, the design process of the rectification circuit is effectively simplified, and meanwhile, the ultra-wideband rectification circuit with a compact structure is realized.

A positive-logic FET switch stack that does not require a negative bias voltage, exhibits high isolation and low insertion / mismatch loss, and may withstand high RF voltages. Embodiments include a FET stack comprising series-coupled positive-logic FETs (i.e., FETs not requiring a negative voltage supply to turn OFF), series-coupled on at least one end by an “end-cap” FET of a type that turns OFF when its VGS is zero volts. The one or more end-cap FETs provide a selectable capacitive DC blocking function or a resistive signal path. Embodiments include a stack of FETs of only the zero VGS type, or a mix of positive-logic and zero VGS type FETs with end-cap FETs of the zero VGS type. Some embodiments withstand high RF voltages by including combinations of series or parallel coupled resistor ladders for the FET gate resistors, drain-source resistors, body charge control resistors, and one or more AC coupling modules.

The present invention relates to the field of nuclear radiation detection technology, and provides a tritium measurement device with radon discrimination capabilities. The device comprises a gas flow ionization chamber, a current amplification circuit, a pulse amplification circuit, and a signal processing circuit. The collector of the gas flow ionization chamber is connected to the current amplification circuit, which amplifies and measures the current signal in the gas flow ionization chamber. The measured signal includes the current signals of tritium beta particles and radon alpha particles. The high-voltage electrode of the gas flow ionization chamber is connected to the pulse amplification circuit after passing through a DC-blocking capacitor, which measures the pulse signal generated by radon alpha particles. The device structure of the present invention is convenient to implement, comprising only a single detection device. It can measure and discriminate radon alpha particles entering the gas flow tritium ionization chamber in real time, accurately compensate for tritium measurement results, and prevent further increase in the total mean square error of the measurement results after compensation.

The utility model discloses a low-internal resistance direct current detection circuit and electronic equipment. The circuit comprises a sampling resistor unit, an analog single-pole double-throw switch, a first blocking capacitor, a first voltage amplification unit, a second blocking capacitor, a frequency mixing unit, a second voltage amplification unit, a third blocking capacitor and a control unit. The sampling resistor unit is arranged in a direct current loop to be measured; the analog single-pole double-throw switch is used for converting direct-current voltage at two ends of the sampling resistor into a high-frequency alternating signal; the first voltage amplification unit amplifies the signal and then outputs the signal to the frequency mixing unit through the second blocking capacitor; the mixing unit outputs a low-frequency mixing signal under the action of the mixing control signal; the second voltage amplification unit differentially amplifies the frequency mixing signal and then outputs a third output voltage signal through a third blocking capacitor, and the third output voltage signal is used for determining the magnitude of loop current and controlling gear switching. The circuit is simple in structure, low in cost and suitable for large-range direct current on-line continuous detection.

The present invention discloses a single-core cable communication circuit between well logging instruments, a well logging instrument, and a well logging system. The single-core cable communication circuit between well logging instruments includes: a single-core cable interface, a sampling inductor, a DC blocking capacitor, a transmitting drive circuit, a receiving signal conditioning circuit, and a power supply module. The receiving signal conditioning circuit includes: a receiving end digital interface, and the transmitting drive circuit includes: a first transmitting end digital interface and a second transmitting end digital interface. The single-core cable interface is respectively connected to the first end of the DC blocking capacitor and the first end of the sampling inductor. The second end of the DC blocking capacitor is respectively connected to the receiving signal conditioning circuit and the transmitting drive circuit. The second end of the sampling inductor is connected to the power supply module. This circuit can supply DC power to the well logging instrument through the single-core cable while realizing half-duplex communication between the well logging instruments. It has the characteristics of simple circuit structure and easy implementation.

The utility model relates to a single Beidou positioning module, which comprises a plurality of interfaces, a passive antenna, a radio frequency matching circuit, a surface acoustic wave filter, a low noise amplifier, a capacitor, a crystal oscillator and a single Beidou positioning chip, and is characterized in that the single Beidou positioning chip is connected with the crystal oscillator and is sequentially connected with the capacitor and the surface acoustic wave filter through the radio frequency matching circuit; the low noise amplifier is connected with the passive antenna; the capacitor comprises a blocking capacitor, a first output end of the low noise amplifier is connected with a signal receiving interface of the surface acoustic wave filter, an output end of the surface acoustic wave filter is connected with a blocking capacitor receiving interface, and an output end of the blocking capacitor is connected with an input end of the radio frequency matching circuit. The output end of the radio frequency matching circuit is connected with the radio frequency input port of the single Beidou positioning chip. According to the single Beidou positioning module, the hardware design period is shortened, and the positioning is accurate.

The utility model discloses a full-bridge converter module without a blocking capacitor. The full-bridge converter module comprises an input filtering unit, a first inversion bridge arm, a second inversion bridge arm, a planar transformer T, a first rectification bridge arm, a second rectification bridge arm, a planar inductor Lf, an output capacitor Co and a square wave detection unit M, the output capacitor Co is connected between the output positive end and the output negative end; a load Rload is connected between the output positive end and the output negative end; according to the full-bridge converter module, a planar magnetic technology is adopted, blocking capacitor configuration is avoided, positive and negative volt-second products are calculated through square wave voltage sampled by a resistance voltage division circuit and driving edge time captured by a comparator circuit, duty ratio control quantity is output, primary side full-bridge driving signal pulse width is dynamically adjusted, and magnetic flux balance control is achieved; the problem that the blocking capacitor occupies a large area is solved, and the high-power density design of the brick power supply module can be realized.

An isolated switching converter can include an inverting bridge, a transformer, a rectifying bridge, and control circuitry. The inverting bridge can receive an input voltage and deliver an output voltage to the transformer primary windings. The inverting bridge can include a plurality of half bridges cascaded across the input voltage. Each half bridge can include an input capacitor; upper and lower switches coupled across the input capacitor and connected at a switch node; and a DC blocking capacitor coupled between the switch node and a primary winding terminal. The rectifying bridge can have an input coupled to the secondary windings of the transformer and can deliver an output voltage of the isolated switching converter. The control circuitry can monitor inverter feedback signal(s) and generate phase staggered inverter drive signal(s). The control circuitry can also monitor rectifier feedback signal(s) and generate rectifier drive signals that operate the rectifying bridge.

The present disclosure provides a compensation circuit module, a power amplifier component, a compensation method and an apparatus. The compensation circuit module includes at least: a variable resistor, a detection component and a control component; the detection end of the detection component is connected to the DC blocking capacitor of the power amplifier for detecting the voltage swing of the input signal of the DC blocking capacitor; the control component is connected to the detection component for outputting a control signal according to the input signal detected by the detection component; the variable resistor is connected to the output end of the control component for changing the resistance connected to the power amplifier according to the control signal, and the resistance of the variable resistor connected to the power amplifier is used to constitute the feedback resistance of the power amplifier; the feedback resistance is used to increase when the gain of the power amplifier decreases; the increased feedback resistance is used to keep the gain in the flat section of the gain change curve; the resistance of the variable resistor can be adjusted by the input signal to achieve compensation for the gain of the power amplifier and maintain the linearity of the input and output of the power amplifier.

The utility model discloses a characteristic current transmitting circuit for a transformer area topology identification device, which relates to the technical field of intelligent low-voltage power distribution and comprises a rectifying circuit used for converting alternating-current mains supply into high-voltage direct current and serially connecting a fuse to realize over-current protection; the direct-current voltage stabilizing circuit is connected with the output end of the rectifying circuit, consists of a voltage stabilizing tube, an MOS (Metal Oxide Semiconductor) tube and a resistor-capacitor element, and is used for outputting stable low-voltage direct-current voltage, and the static power consumption is microampere level; the characteristic current signal transmitting circuit comprises a blocking capacitor, a push-pull output triode and an optocoupler, and is used for receiving an external PWM signal and coupling the external PWM signal to the optocoupler through the blocking capacitor so as to generate a driving signal; and the constant current transmitting circuit is connected with the output end of the characteristic current signal transmitting circuit and comprises an MOS (Metal Oxide Semiconductor) tube and a negative feedback resistor, and the gate-source voltage is adjusted through the negative feedback resistor to realize constant current output. The circuit is low in static power consumption, stable in constant current output, strong in anti-interference performance, and simple in structure.

The application discloses a multi-mode power amplifier circuit for electronic warfare and a dual-band communication system and belongs to the technical field of microwave integrated circuits. pn The application introduces a plurality of reconfigurable branches with the same structure in the circuit structure, each of which comprises a capacitor C sn , an inductor L pn , a DC blocking capacitor C sn and a switching transistor Q sn , the capacitor C pn and the inductor L pn are connected in parallel to form a band-pass network, one end of the band-pass network is connected with the drain of the switching transistor Q sn through the DC blocking capacitor C sn , the source of the switching transistor Q sn is grounded, the gates of the switching transistor Q sn in the first, second and third reconfigurable branches are connected and are all connected to a DC control power supply V gc . The switching of the ultra-wideband and the communication band can be realized by changing the control voltage of the switching transistor in the reconfigurable branch and the drain power supply circuit of the pre-stage electric amplification path, and the multi-mode operation of the high-performance power amplifier in the ultra-wideband and the dual communication band is realized.

Various embodiments herein relate to apparatuses and methods for wafer state detection. In some embodiments, an apparatus for wafer state detection is provided, the apparatus comprising: an RF blocking filter; a DC blocking filter; and a controller coupled to a plurality of electrodes associated with an electrostatic chuck (ESC) via the RF blocking filter and the DC blocking filter, wherein the controller is configured to: cause an input signal to be injected in an input side of a circuit associated with the plurality of electrodes, the RF blocking filter, and the DC blocking filter, wherein the input side corresponds to a first electrode; measure characteristics of an output signal at an output side of the circuit, wherein the output side corresponds to a second electrode; and calculate wafer state characteristics of a wafer positioned on a surface of a platen based on the characteristics of the output signal.

This invention discloses a system and method for achieving atomic layer etching (ALE) and radical-enhanced deposition (REED) in a single chamber. The system features a switchable DC blocking capacitor for grounding an electrostatic chuck (ESC) to eliminate the plasma sheath, and employs high-power short-pulse RF to suppress ion bombardment during ALE surface modification and REED deposition steps, thereby achieving efficient processing and making it suitable for applications such as the fabrication of high aspect ratio structures.

The invention provides a bypass system of a capacitor bank in an eddy current self-driving type direct current magnetic bias suppression device, and relates to the technical field of direct current magnetic bias governance. The system comprises an eddy current self-driving switch and a blocking capacitor, one end of a self-driving coil of the eddy current self-driving switch is connected with a neutral point of a transformer; the other end of the self-driven coil of the eddy current self-driven switch is connected with one end of the blocking capacitor, and the other end of the blocking capacitor is grounded; and moving and static contacts of the eddy current self-driven switch are connected in parallel to two ends of the blocking capacitor. The influence of earth surface potential on the neutral point of the transformer can be effectively reduced through the blocking capacitor, in addition, in the process of a single-phase short-circuit fault, the self-driving coil pushes the eddy current self-driving switch to be switched on, the neutral point of the transformer is metallically grounded after passing through the self-driving coil of the eddy current self-driving switch after switching on, the blocking capacitor is short-circuited, and the fault of the single-phase short-circuit fault is eliminated. And the current flowing through the blocking capacitor is reduced, so that the possibility that the blocking capacitor is damaged due to a single-phase short-circuit fault is reduced.

The invention discloses a reflective broadband energy amplification surface with polarization selectivity. The reflective broadband energy amplification surface comprises a plurality of energy amplification surface units which are periodically distributed, and each energy amplification surface unit comprises a first metal surface, a second metal surface, a third metal surface, a fourth metal surface and a fifth metal surface which are separated by dielectric substrates. The third metal surface adopts two rectangular metal patches which are distributed in an L shape; the fifth metal surface comprises a C-shaped microstrip transmission line, a feed microstrip line and a rectangular metal patch; an amplifier and two blocking capacitors are connected in series on the middle section of the C-shaped microstrip transmission line, and two arms are respectively connected with the two rectangular metal patches through via holes. The feed microstrip line is connected in series with an inductor and a resistor, and the amplifier, the resistor, the blocking capacitor and the inductor form a radio frequency amplification and bias filter circuit. According to the invention, by introducing an active amplification circuit and a polarization coupling mechanism, energy amplification and polarization regulation and control of in-band incident waves are realized.

The invention relates to an injection interference type immunity test diagnosis analysis method. The method comprises the following steps: S1, analyzing and judging the complexity of a to-be-tested diagnosis circuit; s2, analyzing and judging the power consumption type of the to-be-tested diagnosis circuit by taking the power of the to-be-tested diagnosis circuit as a reference; s3, manufacturing a radio frequency current RF for detection, attenuating the radio frequency energy by half through an attenuator by adopting a large current with the current of 200mA and the radio frequency energy of 5W-10W, and then processing through a blocking capacitor to obtain the radio frequency current RF for testing and diagnosis; s4, when the circuit is Ecns and Ecps, injecting a radio frequency current RF into a shielding layer or a circuit in the circuit to be tested and diagnosed, and synchronously observing the performance of the circuit in an injection state through auxiliary equipment so as to evaluate the anti-interference capability; and S5, when the circuit is Ecnc or Ecpc, injecting the radio frequency current into a shielding layer or a circuit in the to-be-tested diagnosis circuit through the set common-mode impedance voltage probe.

Provided are a PA output matching circuit, a RF front-end module and a wireless device. The circuit is used for connecting with a first PA output and a second PA output of an output stage of a push-pull PA, and comprises a load balun, a first DC blocking circuit, a second DC blocking circuit, a first feed circuit and a second feed circuit; the main coil of the load balun is provided with a first balun input and a second balun input; the first balun input is connected with the first PA output via the first DC blocking circuit, and the first balun input is connected with the first PA output via the first feed circuit; the second balun input is connected with the second PA output via the second DC blocking circuit, and the second balun input is connected with the second PA output via the second feed circuit.

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor ("capless LNAs"). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.

The application provides a charger power module, comprising a substrate assembly, a frame assembly, a support capacitor assembly and a DC blocking capacitor assembly, the support capacitor assembly is located at the bottom of the frame assembly, the frame assembly and the support capacitor assembly enclose a frame structure, the frame structure is fixed on one side of the substrate assembly, the frame structure and the substrate assembly enclose a receiving cavity, the DC blocking capacitor assembly is located at the upper part of the receiving cavity and is electrically connected with the frame assembly and the substrate assembly respectively, the substrate assembly comprises a radiator substrate, a magnetic element and a power device electrically connected with the magnetic element, the frame structure is connected with the radiator substrate to enclose the receiving cavity, and the magnetic element and the power device are respectively integrated on the side of the radiator substrate facing the receiving cavity. The charger power module provided by the application has the advantages of compact structure, reasonable layout and high integration degree, and can better realize the miniaturization, light weight and simple design of the charger.

An ultra-wideband power amplifier includes a preamplifier circuit and a post amplifier circuit. The preamplifier circuit includes a first DC blocking capacitor C1, a first decoupling capacitor C2, a second decoupling capacitor C3, a stabilizing resistor Rin, a first AC blocking resistor RG1, a first input inductor L1, a second input inductor L2, an output inductor L3, a first input microstrip line MLIN1, a second input microstrip line MLIN2, an output microstrip line MLIN3, and a first transistor Q1. A first end of the first DC blocking capacitor C1 acts as an input terminal of the preamplifier circuit, and a second end of the first DC blocking capacitor C1 is connected to the stabilizing resistor Rin, the first input inductor L1, the first input microstrip line MLIN1, and a gate electrode of the first transistor Q1 sequentially. One end of the first decoupling capacitor C2 is grounded.

A configuration is provided in which two high-frequency power transmission antennas 111, 121 formed on two microstrip lines 101, 102, respectively, are disposed to face each other with an insulating sheet 103 interposed between the two high-frequency power, and the high-frequency power transmission antennas 111, 121 are formed on the two microstrip lines 101, 102, respectively, to realize transmission of high-frequency power, to make it possible to reduce the size of a DC block as compared with a conventional DC block using a coaxial line shape or a waveguide shape, and make it possible to highly efficiently transmit only high-frequency power while cutting off high-voltage direct-current power by the insulating sheet 103.

A device may include a transistor die including a transistor and a transistor input terminal and a transistor output terminal, and an output circuit coupled between the amplifier output and the transistor output terminal, wherein the output circuit includes: a DC blocking capacitor, a first inductance electrically connected between the transistor output terminal and a first terminal of the DC blocking capacitor, and a series-connected second inductance and a first capacitor connected, in parallel with the first inductance, between the transistor output terminal the first terminal of the DC blocking capacitor, wherein a second terminal of the DC blocking capacitor is connected to a ground node and wherein the first inductance and the series-connected second inductance and the first capacitor form at least a portion of a pseudo tank circuit in which the first inductance is configured to resonate with the first capacitor.

A display device is disclosed. The display device includes a power supply and a display. The power supply includes: a first line filter connected to an external alternating current (AC) power source and including a first common mode choke and a first capacitor connected in parallel to the first common mode choke; a second line filter connected to the first line filter and including a second common mode choke and a second capacitor connected in parallel to the second common mode choke; a third capacitor having one end connected to a neutral of the first capacitor and the other end connected to a frame ground; an AC / DC block connected to the second line filter; a fourth capacitor having one end connected to a neutral of the second capacitor and the other end connected to the frame ground; and a DC / DC block connected to the AC / DC block and configured to provide driving power to the display connected to the power supply.

The invention provides a transistor structure and an amplifier circuit, and relates to the technical field of radio frequency. The transistor structure comprises a plurality of drain electrode modules, a plurality of source electrode modules, a plurality of grid electrode modules, a plurality of grid bias bonding pads, a grid radio frequency bonding pad, a drain electrode bonding pad and a source electrode bonding pad, the drain electrode modules and the source electrode modules are arranged in a staggered mode, the source electrode modules are arranged on the outer side of the arrangement structure, and the grid electrode modules are arranged between the adjacent drain electrode modules and source electrode modules. Each gate module is connected with one gate bias bonding pad, and each gate bias bonding pad is at least connected with one gate module; the gate bias bonding pads are respectively used for receiving different gate bias voltages; the gate bias bonding pads are respectively connected to the gate radio frequency bonding pad through different blocking capacitors; each drain electrode module is connected to the drain electrode bonding pad; each source module is connected to a source pad. According to the invention, multi-order adjustability of the output power of the transistor can be simply and conveniently realized.

The invention relates to a power amplifier input second harmonic impedance measuring circuit and method. The power amplifier input second harmonic impedance measuring circuit comprises an input end impedor, a blocking capacitor DC BLOCK1, a radio frequency choke DC FEED1, an input de-embedding circuit, a power amplifier tube, an output de-embedding circuit, a radio frequency choke DC FEED2, a blocking capacitor DC BLOCK2 and an output end impedor. The second harmonic impedance Z2 of the output end impedor is set as a short circuit point, the third harmonic impedance Z3 of the output end impedor is set as an open circuit point, and the output fundamental impedance of the output end impedor is set as the optimal impedance Zopt matched with the load line; the fundamental wave impedance of the input end impedor is set to be conjugate of the input impedance Zin, and the second harmonic impedance Z2 of the input end impedor is scanned; and observing the amplitude ratio gamma of the secondary voltage component of the voltage of the intrinsic grid node of the power amplifier tube to the fundamental voltage component and the phase difference, and recording the required gamma and the secondary harmonic impedance Z2 of the input end impedor corresponding to the phase difference. The problem that gamma is difficult to flexibly acquire in the prior art can be solved.

This invention relates to the field of radio frequency integrated circuit technology, specifically disclosing a high-gain, adjustable-gain low-noise amplifier, including a DC blocking capacitor circuit, a first-stage amplifier circuit, and a second-stage amplifier circuit. The second-stage amplifier circuit includes an amplifying transistor and a gain control unit. The DC blocking capacitor circuit is connected to the input terminal of the second-stage amplifier circuit through the first-stage amplifier circuit, and the gain control unit is connected between the input and output terminals of the amplifying transistor. The DC blocking capacitor circuit is used to input a radio frequency signal. The first-stage amplifier circuit amplifies the radio frequency signal to output a pre-amplified radio frequency signal. The second-stage amplifier circuit amplifies the pre-amplified radio frequency signal to output a further amplified radio frequency signal. The gain control unit is used to adjust the closed-loop gain of the second-stage amplifier circuit. This invention can provide adjustable high gain and can achieve balun-free single-ended input to dual-ended output conversion, saving circuit area and power consumption.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.

An audio amplifier chip includes an audio amplifier, a current providing circuit, a detection circuit, and a control circuit. The audio amplifier is arranged to drive a speaker, wherein the audio amplifier has multiple differential input terminals, and a direct current (DC) blocking capacitor is coupled to one of the multiple differential input terminals. The current providing circuit is arranged to provide at least one current for charging the DC blocking capacitor. The detection circuit is coupled to a node located between the one of the multiple differential input terminals and the DC blocking capacitor, and is arranged to detect whether an external resistor of the audio amplifier chip exists according to an input voltage from the node, in order to generate a detection result. The control circuit is arranged to determine a start-up time of the audio amplifier according to the detection result.