Signal processing system and method

A signal processing and signal technology, applied in the field of communication, can solve problems such as limited application, inability to effectively detect phase error, ineffective clock synchronization and equalization, etc., to improve the ability to detect phase error, improve signal processing ability, and eliminate signal The effect of crosstalk

Inactive Publication Date: 2010-09-22
ZTE CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Using this processing method, when the signal received by the receiving end is seriously deformed, such as the signal rate is 100Gbps, and the dispersion is greater than 300ps/nm, it will not be able to effectively detect the ...

Method used

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  • Signal processing system and method
  • Signal processing system and method
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Embodiment 1

[0067] The clock synchronization loop of this embodiment adopts an all-digital clock synchronization loop, and the structural diagram of the all-digital clock synchronization and balanced signal processing system is as follows figure 2 As shown, it includes: a sampling and preprocessing device 210 , an adaptive equalization filter 300 , a phase detector 220 , a loop filter 230 and an oscillation device 240 .

[0068] The sampling and preprocessing device of this embodiment further includes an analog-to-digital converter (ADC) 211 and an interpolation filter 213, wherein:

[0069] The ADC211 is used to sample the input signal to obtain a sample value, realize the conversion from an analog signal to a digital signal, and then send the sample value to the interpolation filter 213;

[0070] The interpolation filter 213 is used to interpolate the sampling value according to the interpolation time provided by the numerically controlled oscillator, and send the interpolated signal t...

Embodiment 2

[0082] The clock synchronization in this embodiment is realized through a digital-analog hybrid clock synchronization loop. The structural diagram of the digital-analog hybrid clock synchronization and equalization signal processing system is shown in image 3 shown.

[0083] Similar to the first embodiment, it also includes: a sampling and preprocessing device 210, an adaptive equalization filter 300, a phase detector 220, a loop filter 230 and an oscillation device 240, wherein the adaptive equalization filter 300, the phase detector 220. The loop filter 230 is the same as the first embodiment, and will not be repeated here. The difference from the first embodiment is:

[0084] The sampling and preprocessing device 210 further includes an analog-to-digital converter (ADC) 211 and a preprocessing device 212, wherein:

[0085] The analog-to-digital converter 211 is used to sample the input signal to obtain a sample value according to the oscillation signal provided by the osc...

Embodiment 3

[0098] The signal processing system of the optical quadrature phase shift keying system (QPSK) coherent optical receiver of the present invention, such as Figure 4 As shown, it includes a local oscillator laser 600, a 90-degree mixer 400, a photoelectric converter 500, a sampling and preprocessing device 210, an adaptive equalization filter 300, a phase detector 220, a loop filter 230 and an oscillator connected in sequence device 240 , the output terminal of the oscillation device 240 is connected to the sampling and preprocessing device 210 . Wherein the sampling and preprocessing device 210, the adaptive equalization filter 300, the phase detector 220, the loop filter 230 and the oscillation device 240 are the same as the first embodiment, and the sampling and preprocessing device 210 includes an analog-to-digital converter 211 and an interpolation Filter 213, the oscillating device 240 is a numerically controlled oscillator, which will not be described in detail here, the...

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Abstract

The invention discloses a signal processing system and a signal processing method. A sampling and preprocessing device samples and preprocesses input signals according to oscillation signals output by an oscillation device, and sends obtained sampling values to an adaptive equalization filter to perform equalization; the signals after the equalization are divided into two paths, wherein one path is a signal output, while the other path is sent to a phase demodulator; the phase demodulator detects the phase error of each sampling value to obtain a phase error signal which is sent to a loop filter to filter noises and high-frequency components of the phase error signal so as to obtain a digital clock error signal; the digital clock error signal is sent to the oscillation device which generates the oscillation signals according to the digital clock error signal; and the oscillation signals are sent to the sampling and preprocessing device. In the system and the method, the adaptive equalization filter is embedded in a clock synchronization loop to perform the equalization during clock synchronization, so the influence, caused by signal distortion, on phase demodulation is weakened, the clock synchronization and equalization are performed effectively, the signal crosstalk of a communication transmission system is eliminated, and the signal processing capacity of a receiving end is improved.

Description

technical field [0001] The present invention relates to a signal processing device and method in the communication field, in particular to a signal processing device and method at a receiving end of a communication transmission system. Background technique [0002] In a communication system, when the channel quality is not ideal, crosstalk, distortion, etc. will occur during signal transmission. For example, in an optical fiber communication system, dispersion, polarization mode dispersion (PMD), and optical filtering effects of optical fibers will cause signal crosstalk. . In this case, digital signal processing methods, such as equalization, can be used at the receiving end to eliminate crosstalk. To accommodate channel uncertainties, this signal processing needs to be adaptive. On the other hand, the digital sample value synchronized with the signal is required in the process of digital signal processing, so the clock synchronization of the signal is required. [0003]...

Claims

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Application Information

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IPC IPC(8): H03L7/08H03L7/085H03L7/099
CPCH03L7/085H03L7/099H03L7/08
Inventor 周伟勤葛超陈雪周娴朱海樊洋洋李智宇张治国王立芊
Owner ZTE CORP
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