100 results about "System time" patented technology

Embodiments of the invention disclose a method, a device and a system for processing a wake-up lock, and belong to the field of computer technology. The method comprises the following steps: detecting whether a wake-up lock is in a working state, and if so, obtaining a wake-up parameter corresponding to the wake-up lock, wherein the wake-up parameter comprises an arithmetic operation corresponding to the wake-up lock and an application program corresponding to the wake-up lock; judging whether the arithmetic operation corresponding to the wake-up lock requires a sensor of a terminal; if not, generating a wake-up transfer request according to the wake-up parameter, sending the wake-up transfer request to a server, and releasing the wake-up lock, wherein the server is used for executing the arithmetic operation corresponding to the wake-up lock; and receiving a wake-up message sent by the server, and waking up the terminal according to the wake-up message. By adopting the method disclosed by the invention, after a display screen of the terminal is closed, the system time occupancy of the application program can be reduced, the power consumption of the terminal is reduced in the case that the display screen of the terminal is closed, and the standby time of the terminal is prolonged.

The invention discloses a microservice system time sequence anomaly detection method and device, equipment, a medium and a product, and the method comprises the steps: carrying out the preprocessing of original multivariate time sequence data, converting the data into a sliding window sequence, carrying out the channel independent division of the sliding window sequence into a univariate time sequence of a plurality of channels, carrying out the periodic coding, and carrying out the calculation of the univariate time sequence; the method comprises the following steps: generating a periodic coding sequence, carrying out feature analysis on the periodic coding sequence, obtaining local features and global features, carrying out feature fusion on the local features and the global features, decoding, generating reconstructed time sequence data, and carrying out mean square error calculation on the reconstructed time sequence data and original multivariate time sequence data. According to the method, the abnormal score of each time step is obtained, anomaly detection is carried out based on the abnormal scores, semantic differences of different variables in multivariate time sequence data are accurately distinguished, relation characteristics of the different variables in the micro-service system are fully extracted, and abnormal fluctuation in the time sequence of the micro-service system is accurately detected.

Disclosed are a system on chip, method and device supporting time synchronization, and a storage medium, which relate to the technical field of time synchronization, the system on chip synchronizes the time of an STBM in the system on chip with the time of an off-chip master clock through a first processor core according to a first preset period; based on the first time of the STBM after time synchronization, calibrating a hardware clock of the first network card to obtain a first time reference; calibrating the time of the STBM based on the first time to obtain a second time reference; synchronizing, by the second processor core, the time of the second network card with the time of the first time reference based on a first time difference between the first network card and the second network card; and synchronizing the system time with the time of the second time reference based on a second time difference between the second time reference and the system time of the operating system. According to the system, double time references can be obtained, sub-microsecond-level synchronization precision is realized, and the strict requirement of a high-precision time synchronization scene on time synchronization precision is met.

A clock synchronization method is disclosed. The method comprises receiving master timing synchronization data from a master clock device, wherein the master timing synchronization data is based at least in part on quantum data obtained from a first quantum device of the master clock device. The method comprises determining local timing synchronization data that is based at least in part on local quantum data obtained from a second local quantum device, wherein the second local quantum device is entangled with the first quantum device such that the local quantum data and the quantum data obtained from the first quantum device are identical at a same time. The method comprises using the determined local timing synchronization data and the received master timing synchronization data to determine a timing correction factor. The method comprises correcting a local system time using the timing correction factor.

The invention provides a method and a device for realizing time migration, a storage medium and a computer program product. The method comprises the following steps: under the condition that a target process calls a time correlation function in a kernel, acquiring context information when the target process runs through a time migration simulation program pre-mounted in the time correlation function; based on the context information, determining a time migration strategy matched with the target process as a target time migration strategy; and according to the target time migration strategy, determining the system time after migration, and returning the system time to the target process. According to the invention, the flexibility of time migration can be improved.

The present invention provides an electronic device, a clock calibration method, a storage medium, and a program product, which can be applied in the field of computer technology. The electronic device includes: a switch element electrically connected to a first controller, a processor, a clock generator, and a second controller; the second controller is configured to control the switch element to electrically connect the first controller to the clock generator when the electronic device is in an offline state; the first controller is configured to, when the first controller is electrically connected to the clock generator, perform a first calibration on the clock generator using a first reference time obtained from a time reference device to obtain a first calibrated clock generator; and, in response to an alarm signal sent by the first calibrated clock generator at a predetermined time, obtain a second reference time from the time reference device based on a first time difference between a first current system time of the first controller and the predetermined time, and perform a second calibration on the first calibrated clock generator using the second reference time.

The application discloses a time synchronization method, device, equipment and medium, relates to the technical field of time synchronization, and is applied to an embedded device and comprises the following steps: receiving an analog second pulse signal sent by an external device by using a general input and output pin, and recording a raw system timestamp corresponding to an arrival time of the signal; compensating the raw system timestamp according to a preset delay compensation parameter, and performing jitter filtering processing on the compensated timestamp to obtain a processed timestamp; and reporting the processed timestamp to a PPS subsystem, so that a preset time synchronization service calibrates a system time of the embedded device based on the processed timestamp read from the PPS subsystem. The application can realize high-precision time synchronization of the embedded device by using the external device to simulate a PPS signal.

The invention provides a main and standby switching method and system for a water dispatching automation system, and relates to the field of water dispatching automation and data processing. The method aims at solving the problems that in an existing method, business event flow sequential logic is ignored, and instructions are prone to being disordered and lost due to switching. The method is applied to a framework comprising a main system, a standby system and a time source, and the main system and the standby system are synchronous in time. When executing the water dispatching control instruction, the main system generates a water dispatching event containing instruction content and a timestamp, and stores the water dispatching event in a shared event sequence cache region; the standby system periodically pulls an event, simulates execution after verification by a business rule engine in combination with an associated context, constructs an event node tree diagram with a weight, and prunes based on an actual result; and when the switching is triggered, comparing the actual result of the main system with the execution sequence of the standby system, matching an adaptive path, and avoiding error instruction marks. The method guarantees the time sequence consistency and logic correctness of the event flow, achieves the intelligent seamless switching of a main system and a standby system, and guarantees the continuous and stable operation of a water dispatching service.

The invention relates to the technical field of communication, and discloses a cross-asynchronous clock domain time correction method and device, equipment and a medium, and the method comprises the steps: obtaining target system time; judging whether the target system time is updated; and correcting the target system time by adopting a cross-domain transmission parameter or a local time sequence parameter based on an updating result of the target system time, the cross-domain transmission parameter at least comprising a clock period of the target clock domain, and the local time sequence parameter at least comprising the corrected system time at the last moment. According to the method, the cross-domain transmission parameter or the local time sequence parameter is dynamically selected for correction according to the time updating state of the target system, the time delay deviation of cross-clock transmission or the time continuity without updating can be eliminated according to specific conditions, and the time precision is improved.

The application provides a time calibration method, and relates to the technical field of electronic equipment, which comprises the following steps: when entering a starting mode, obtaining a historical time synchronization time and a system time; obtaining a first time difference according to the historical time synchronization time and the system time; obtaining a current compensation time according to the first time difference, a historical time deviation parameter and a historical compensation time; obtaining a compensated system time according to the system time and the current compensation time, and updating the historical compensation time to the current compensation time; if a time synchronization signal is received, obtaining an input time and the compensated system time, and updating the historical time deviation parameter according to the input time, the compensated system time and the historical time synchronization time, so that the method is more stable, accurate and adaptive to an offline environment.

The present disclosure provides a method for processing application information, an electronic device, and a storage medium, and relates to the technical field of communications. The method includes: determining a target time period based on a current system time and historical usage information of at least one application; and screening usage record information of the at least one application according to the determined target time period to obtain target information, wherein the target information is information generated in a historical time period matched with the target time period, and the usage record information is usage information of the at least one application in a plurality of time periods.

The invention provides a time synchronization method, device and system of a master device and a slave device, computer equipment and a storage medium, and relates to the technical field of wireless transmission, the master device sends a first broadcast packet to the slave device, the first broadcast packet is sent only once, and therefore it is ensured that when the time difference between the master device and the slave device is calculated, the time difference between the master device and the slave device is calculated. The time difference is corresponding to receiving and transmitting of the same broadcast packet, and when the propagation time of electromagnetic waves between two devices is ignored, the time related to the time difference corresponds to the same world time, so that the system time of the slave device can be accurately calculated; the clock synchronization updating between the master device and the slave device can be completed under the condition of considering broadcast delay.

The application discloses a method for protecting time stamp of embedded system, which is executed based on a time stamp protection time correction module in the embedded system, and comprises the following steps: step S1, optimizing the floating point operation function of the compiling tool used by the time stamp protection time correction module, and eliminating the problem of abnormal zero of the floating point operation result; and step S2, the time stamp protection time correction module creates a time system data receiving communication link based on a preset configuration, and configures the time system data receiving timeout parameter of the communication link; the application solves the technical problems of time stamp abnormality, false time correction and poor stability caused by step-by-step time correction, operation defects of the compiler, and coupling of the time correction module and the service data processing module.

A method for synchronizing time between a central server and an automated vehicle (AV) includes exchanging a sequence of time synchronization (TS) messages and generating a set of time offsets between a pair of TS messages among the sequence of TS messages. The method further includes changing a system time of the AV using a time drift estimate defined by a set of time weighting models that are a function of at least one of a plurality of time inputs or the set of shift time offset values, and controlling the AV using the system time and one or more shift instructions providing travel commands from the central server.

This invention belongs to the field of BMC system time synchronization technology, specifically providing a method, apparatus, device, and medium for the first time synchronization during the BMC startup phase. The method includes the following steps: During the BMC startup phase, determining whether the time of the BMC management controller and the server has been successfully synchronized; determining whether a configuration file exists; if synchronization is successful and the configuration file exists, obtaining the last recorded time stored in the configuration file; comparing the obtained time with the time of the synchronized server; if the obtained time is faster than the synchronized server time, setting the obtained time as the current time of the BMC management controller; otherwise, using the synchronized server time as the current time of the BMC management controller; and periodically recording the current BMC management controller time into the configuration file during the startup process. This reduces the difference from the standard time caused by abnormal synchronization time during the first synchronization phase of the BMC startup phase.

The invention relates to an interrupt response time detection method and device, equipment, a medium and a program product. The interrupt response time detection method comprises the steps that in response to monitoring that a timer used for interrupt response time detection in an operating system is overtime, a detection program reads a first timestamp from character equipment in a kernel mode of the operating system and triggers the character equipment to send an event notification signal to the detection program, the detection program is a program used for detecting the interrupt response time in a user mode of the operating system, and the first timestamp is a timestamp when the operating system generates the current interrupt; in response to the received event notification signal, the detection program calls a callback interface corresponding to the event notification signal in a user mode in the operating system, and obtains a second timestamp from the callback interface, the second timestamp being a timestamp that the operating system starts to process the current interruption by using the callback interface; based on the first timestamp and the second timestamp, the detection program determines an interrupt response time for the current interrupt.

The embodiment of the invention provides a handshake method and device for time synchronization of a multi-modular redundancy computer system, and the method comprises the steps: transmitting a synchronization request instruction to a handshake synchronization unit of a local machine of each module by a CPU (Central Processing Unit) of each module according to a preset time window; a handshake pulse signal is generated through the pulse generation logic subunit of each module, and the handshake pulse signal is sent to other modules; when a handshake pulse signal of the corresponding module is detected by a pulse edge detection subunit, corresponding to other modules, in the local machine of each module, recording a handshake pulse receiving moment; aiming at each module, the module has the handshake pulse receiving moment and the own handshake pulse generating moment in the preset synchronization time period at the same time, which indicates that the current handshake synchronization of the module and the module emitting the handshake pulse corresponding to the handshake pulse receiving moment is successful. Hardware logic is adopted to realize handshake synchronization logic among multiple modes, the cost is low, and handshake is fast.

Techniques for performing background refreshes of a storage device using timestamps from a host are described. In one example, the method involves receiving a timestamp from the host, storing the timestamp in a storage device, and determining a retention time for data stored in one or more blocks of the storage device based on the timestamp relative to a second timestamp indicating a time when the data was written to the one or more blocks. In response to determining that the retention time exceeds a threshold, the storage device moves the data to one or more other blocks of the storage device, which may include interleaving activity from the host with the refresh writes.

The invention provides a system time determination method and device, a storage medium and a product, and relates to the technical field of communication. The method comprises the following steps that: remote terminal equipment sends an acquisition request to relay terminal equipment, wherein the acquisition request is used for requesting the offset between a system frame number (SFN) and a direct frame number (DFN); the relay remote equipment sends the offset to the remote terminal equipment; and the far-end terminal equipment deduces the SFN timeline from the DFN timeline based on the offset, and determines the system time according to the SFN timeline. According to the mode, the remote terminal equipment can obtain the system time.

The embodiments of the present application provide a time synchronization method and system, an electronic device, a computer-readable storage medium, and a computer program product, wherein the time synchronization system includes: an observation unit, a clock difference unit, and an adjustment unit. The observation unit determines an asynchronous two-way code pseudorange observation amount between the first device and the second device. The clock difference unit determines a coarse clock difference between the first device and the second device based on the asynchronous two-way code pseudorange observation amount. The adjustment unit adjusts the system time of the first device or the second device based on the coarse clock difference to synchronize the system time of the first device and the second device. After the system time is synchronized, the observation unit determines a synchronous two-way code pseudorange observation amount between the above-mentioned devices at a preset time point. The clock difference unit determines a precise clock difference between the above-mentioned devices based on the synchronous two-way code pseudorange observation amount. The adjustment unit adjusts at least one of the frequency and phase of the clock source of the first device or the second device based on the precise clock difference.

The invention relates to the technical field of distributed system time synchronization, in particular to a data aggregation isochronous synchronization method and system applied to a distributed system, and the method comprises the steps: selecting a synchronization algorithm to carry out synchronization optimization, and the synchronization optimization comprises the following steps: broadcasting time information to each slave node through a master node to carry out clock synchronization; each slave node performs parallel data acquisition and aggregates the data to the master node; performing time alignment between the master node and the slave node through clock skew compensation and network delay compensation, and performing isochronous synchronous data fusion to obtain synchronized data; judging whether the synchronization precision of the synchronized data reaches the standard or not; if not, an error is fed back to the synchronization algorithm, clock synchronization parameters are adjusted again, and synchronization optimization is circularly carried out; and if the standard is reached, outputting the synchronized data. According to the invention, synchronization optimization is carried out, time alignment is carried out through clock skew compensation and network delay compensation, and the clock synchronization precision of each node in the distributed system is improved.

The invention provides a time synchronization method and system based on satellite common view and time transfer, and belongs to the technical field of time synchronization, and the method comprises the following steps: confirming a GNSS system time source and at least two external wired time sources, and carrying out the credibility detection of the GNSS system time source; performing anti-cheating detection on the external wired time sources, confirming the priority, and sorting the external wired time sources based on the priority; when the time source of the GNSS system passes the credibility detection, the time source of the GNSS system is used as a main time source; when the time source of the GNSS system does not pass the credibility detection, selecting an external wired time source with the highest priority to replace the main time source; and calibrating a local endogenous time source of the master station based on the time signal of the master time source, generating master station synchronization time, and performing slave station time synchronization. According to the method, the GNSS system time source and the external wired time source are detected at the same time, the time source with the highest credibility is selected for synchronization, and the accuracy and safety of time synchronization are improved.

This application discloses a method for time synchronization of a system-on-a-chip (SoC), an SoC, and a vehicle. The method includes: determining a daisy-chain data transmission delay between a first hardware domain and a second hardware domain; determining a system clock difference between the second hardware domain and the first hardware domain based on the daisy-chain data transmission delay; calibrating the clock of a second daisy-chain counter based on the system clock difference to synchronize the clocks of the second daisy-chain counter and the first daisy-chain counter; determining a timestamp of the second subsystem based on first subsystem time information sent from the first hardware domain; wherein the first subsystem time information includes the timestamp of the first subsystem and the clock information of the first daisy-chain counter; and updating the system time of the second subsystem based on the timestamp of the second subsystem to synchronize the system time of the second subsystem with that of the first subsystem. Using this application, time synchronization between subsystems of an SoC can be achieved.

This invention discloses an attendance statistics control method and related equipment, relating to the field of attendance clocking in and out. The method primarily addresses the current lack of a more intelligent attendance clocking-in and out monitoring control method. The method comprises: obtaining a target user's actual attendance clocking-in time and a specified clocking-in time period; if the actual attendance clocking-in time falls within the specified clocking-in time period, storing the target user's clocking-in result in a target storage unit on the local end; and if the current system time falls outside the specified clocking-in time period, uploading the clocking-in result to a cloud server. The present invention is used in the attendance statistics control process.

This application discloses a device time correction method, apparatus, device, storage medium, and program product, relating to the field of embedded technology. The method, applied to embedded devices, includes: starting a time correction service via a local configuration file when the device boots up, and setting it as a prerequisite service for business services to ensure that business services start subsequently; calling the time correction service to perform corresponding time correction operations: if the hardware detection information of the real-time clock module indicates a hardware fault or absence, then performing anomaly detection on the current system time; if the current system time is abnormal, correcting the system time using a target time generated and pre-configured based on device batch information. This time correction scheme does not rely on an external network, is automated and timing-controllable, and based on a local time source, enables embedded devices to achieve time self-correction in offline deployment environments, ensuring time consistency and the reliability of business functions even without a network.

A method for synchronizing time between a central server and an automated vehicle (AV) includes exchanging a series of time synchronization (TS) messages and generating a set of time offsets between a pair of TS messages among the series of TS messages. The method further includes changing a system time of the AV using a time drift estimate defined by a set of time assessment models being a function of at least one of a plurality of time inputs or the set of layer time offset values, and controlling the AV using the system time and one or more marshalling instructions providing drive commands from the central server.

This application provides a multi-source hierarchical clock synchronization method and system for a cockpit-rider fusion domain controller, which can solve the problem of clock inconsistency among multiple operating system domains using a purely software-based approach. It integrates three time sources—MCU RTC, NTP, and GNSS—through a cross-domain distributed message bus. Upon startup, the system clock is coarsely adjusted to a roughly correct initial time using the MCU's RTC. Then, fine-tuning is performed using network time. During fine-tuning, the system time value is not directly modified; instead, a PI controller calculates frequency adjustment, slightly speeding up or slowing down the system clock frequency, ultimately causing the time deviation between the three system domains to gradually converge to zero.

The invention discloses a method and a system for quantifying the time sequence data value of a DCS (Distributed Control System), which comprises the following steps of: exporting measuring point information from a DCS engineering monitoring picture and a control logic page, obtaining the measuring point information from the DCS engineering monitoring picture and the control logic page, and allowing repeated combination, so that the multi-source characteristics of original data can be completely reserved; a unified data reference is provided for subsequent expansion analysis, omission or redundancy caused by data source dispersion is avoided, the input and output corresponding relation recorded by the original control measuring point list reveals the signal flow direction and function coupling in the control logic, a direct basis is provided for analyzing the relevance between the control strategy and the production influence, and the reliability of the system is improved. An original picture measuring point list reflects a monitoring key point of a human-computer interaction level, the original picture measuring point list and the human-computer interaction level jointly construct a double-view-angle measuring point panoramic view, meanwhile, a key mapping carrier is provided, after many-to-one relation expansion, the actual effect of a middle measuring point in a control system can be accurately recognized, and measuring point value misjudgment caused by function block nesting is avoided.

The invention relates to a time synchronization method and system, the method is applied to the time synchronization system, the system comprises a machine frame type device, a mainboard of the machine frame type device is electrically connected with a slot position plate, the mainboard comprises a first phase-locked loop and a second phase-locked loop which are electrically connected with a first FPGA, the slot position plate comprises a second FPGA, and the first FPGA is electrically connected with the second FPGA. The first phase-locked loop and the second phase-locked loop are electrically connected with the first FPGA, the third phase-locked loop and the fourth phase-locked loop are electrically connected with the second FPGA, the third phase-locked loop and the first phase-locked loop are homologous in clock and used for controlling a system clock, and the fourth phase-locked loop and the second phase-locked loop are homologous in clock and used for controlling system time. Determining the deviation between the slot position plate and the opposite terminal equipment according to the timestamp; and updating the main board system time and the slot position board system time according to the deviation through the second phase-locked loop and the fourth phase-locked loop.

The invention discloses an enhanced clock synchronization system and method based on PID (Proportion Integration Differentiation) feedback control, according to the scheme, for two clock nodes which are synchronous with each other and have a master-slave relationship, PID feedback control on time offset is carried out on a slave clock node, and the PID feedback control on the time offset is carried out on the slave clock node; performing linear combination on the time offset according to proportion, integration and differentiation (PID) to form adjusted time offset, and calculating the system time based on the adjusted time offset to obtain corrected system time; time offset calculation is further carried out based on the corrected system time, and new time offset is obtained through calculation; next, the new time offset is subjected to the next round of PID feedback control calculation and system time correction calculation, so that PID feedback control is carried out to adjust the time offset, the corrected system time is adjusted in real time, the convergence time is shortened, and the synchronization error is reduced.