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451results about How to "Improve system throughput" patented technology

Cluster tool architecture for processing a substrate

Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, substrates processed in the cluster tool have a more repeatable wafer history, and also the cluster tool has a smaller system footprint. In one embodiment, the cluster tool is adapted to perform a track lithography process in which a substrate is coated with a photosensitive material, is then transferred to a stepper/scanner, which exposes the photosensitive material to some form of radiation to form a pattern in the photosensitive material, which is then removed in a developing process completed in the cluster tool. In track lithography type cluster tools, since the chamber processing times tend to be rather short, and the number of processing steps required to complete a typical track system process is large, a significant portion of the time it takes to process a substrate is taken up by the processes of transferring the substrates in a cluster tool between the various processing chambers. In one embodiment of the cluster tool, the cost of ownership is reduced by grouping substrates together and transferring and processing the substrates in groups of two or more to improve system throughput, and reduces the number of moves a robot has to make to transfer a batch of substrates between the processing chambers, thus reducing wear on the robot and increasing system reliability. In one aspect of the invention, the substrate processing sequence and cluster tool are designed so that the substrate transferring steps performed during the processing sequence are only made to chambers that will perform the next processing step in the processing sequence. Embodiments also provide for a method and apparatus that are used to improve the coater chamber, the developer chamber, the post exposure bake chamber, the chill chamber, and the bake chamber process results. Embodiments also provide for a method and apparatus that are used to increase the reliability of the substrate transfer process to reduce system down time.
Owner:SCREEN SEMICON SOLUTIONS CO LTD

Antenna mapping in a MIMO wireless communication system

A method for transmission is provided to generate a plurality of reference signals for a plurality of antenna ports, with each reference signal corresponding to an antenna port; to map the plurality of reference signals to a plurality of physical antennas in accordance with a selected antenna port mapping scheme, with each reference signal corresponding to a physical antenna, and the plurality of physical antennas being aligned sequentially with equal spacing between two immediately adjacent physical antennas; to demultiplex information to be transmitted into a plurality of stream blocks; to insert a respective cyclic redundancy check to each of the stream blocks; to encode each of the stream blocks according to a corresponding coding scheme; to modulate each of the stream blocks according to a corresponding modulation scheme; to demultiplex the stream blocks to generate a plurality of sets of symbols, with each stream block being demultiplexed into a set of symbols; to map the plurality of sets of symbols into the plurality of antenna ports in accordance with a selected symbol mapping scheme; and to transmit the plurality of sets of symbols via the corresponding antenna ports, with each set of symbols being transmitted via a subset of antenna ports, with, within each subset of antenna ports, the distance between the physical antennas of the corresponding antenna ports being larger than the average distance among the plurality of physical antennas.
Owner:SAMSUNG ELECTRONICS CO LTD

High-speed memory storage unit for a multiprocessor system having integrated directory and data storage subsystems

A high-speed memory system is disclosed for use in supporting a directory-based cache coherency protocol. The memory system includes at least one data system for storing data, and a corresponding directory system for storing the corresponding cache coherency information. Each data storage operation involves a block transfer operation performed to multiple sequential addresses within the data system. Each data storage operation occurs in conjunction with an associated read-modify-write operation performed on cache coherency information stored within the corresponding directory system. Multiple ones of the data storage operations may be occurring within one or more of the data systems in parallel. Likewise, multiple ones of the read-modify-write operations may be performed to one or more of the directory systems in parallel. The transfer of address, control, and data signals for these concurrently performed operations occurs in an interleaved manner. The use of block transfer operations in combination with the interleaved transfer of signals to memory systems prevents the overhead associated with the read-modify-write operations from substantially impacting system performance. This is true even when data and directory systems are implemented using the same memory technology.
Owner:UNISYS CORP
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