A multi-bit flash memory and its error detection and remedy method

Abstract

The invention provides a method for checking and correcting the error of a multi-bit flash and a relative multi-bit flash, wherein the multi-bit flash comprises a memory unit array composed of a plurality of memory units, a read / write control module and an error check and correct module with one-bit correct function. The memory unit array is used to store the first data and relative correct data, the nearby memory states of the memory unit are differential with one bit data, the error check and correct module can obtain the first data and relative correct data from the read / write control module, to use the correct data to correct and output the first data. The inventive method and device can recognize signal of multi-bit flash easily, with reliability of data stored in multi-bit flash, to improve density and yield of memory and save cost.

Description

technical field [0001] The invention relates to a multi-bit flash memory, in particular to a multi-bit flash memory and its error detection and correction method. Background technique [0002] Non-volatile memory (NVM) devices are usually MOS transistors. In addition to the source, drain, and gate of a general MOS transistor, the MOS transistor also includes a floating gate (FLOATING GATE) isolated from other parts by an insulator. . [0003] In floating-gate memory, the floating gate is used to store charge, which remains in the absence of a power supply. [0004] The density and cost per bit of data storage are the main drivers of the scaling and evolution of memory. Most memory cells today are bistable, meaning they store either a 0 or a 1. If more than two states can be stored in a single cell, the storage density can increase significantly. [0005] Multi-bit flash memory can store multiple bits of data on one memory cell, thereby increasing the density of the devic...

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Problems solved by technology

[0009] However, the tail length of the distribution is unavoidable, as shown in Figure 2, the transistor whose threshold is in the shaded part of the figure is a bad point, and cannot be located in the main distribution area (the area defined by the curve and the horizontal axis of the coordinates in Figure 2 does not include the shadow part) of the transistor to correctly judge the stored information based on the reference voltage

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