The invention discloses a
system and method for improving data configuration efficiency of a test
machine, and relates to the technical field of board card testing, the
system comprises an FPGA PCIE module, a DMA address
data analysis module and a
data transmission module, a general data frame is divided into an independent 32b address field and an independent 32b
data field through the arranged DMA address
data analysis module, then bit [31] and 0 of an 32b address are analyzed to represent write operation, and the
data transmission module is connected with the FPGA PCIE module. 1 represents read operation, an identifier is independently extracted and embedded into a subsequent instruction packet, then a bit [27: 0] of a 32b address is extracted, a target
daughter card number is determined according to a preset
address mapping table, and data is packaged after determination, so that data distribution of different address fields is realized, the
data transmission module receives the data and then sends the data to each post-stage
daughter card module in parallel, and data read-write is realized. Therefore, the read-write speed of the test
machine is greatly increased, and the read-write efficiency is further improved.