Provided in the present invention are a driving
assembly, method and
system for multi-period modulation, and a product. A control plane is decoupled from hardware by using, for example, SDN technology. A remote controller can implement the storage unit data configuration and circuit logic device
programming of different devices on the basis of codes of controlled devices, provides various periodic / aperiodic timing driver signals required by various device chips, and is compatible with the timing requirements for the array driving and data reading of different device chips. The driving
assembly for multi-period modulation comprises a state division
assembly, a synchronous multi-period configuration assembly, and a single-period modulation assembly, wherein the state division assembly is used for performing functional decoding on the basis of a functional mode of a device and generating a timing-matched trigger
signal on the basis of a specific functional mode; the synchronous multi-period configuration assembly is used for generating a plurality of types of periodic / aperiodic enable signals at different dominant frequencies on the basis of configuration information, so as to implement multi-
period timing driving; and the single-period modulation assembly can be used as universal modulation units, and each unit can generate a periodic composite on-
chip timing driver
signal on the basis of the configuration information and a multi-period driver
signal, so as to meet the driving requirements of digital and analog readout units of different device chips. The present invention as provided can greatly simplify the overall timing structure of a driver
chip. By using a
software-generated programmable
interconnection connection sub-module array, the remote controller can output multi-period modulated driver signals in batches, and can meet the requirements of different devices for the multi-mode flexible configuration and real-
time switching of periodic and aperiodic driver signals without the need for additional individual custom design. The design complexity is reduced. In addition, each module
subunit can be configured with separate timing off-
chip, thereby improving the
fault tolerance rate and flexibility of chip timing design. Moreover, the
reusability of multiple modules shortens the design period.