165 results about "Voltage overshoot" patented technology

The invention provides a dynamic reconfigurable battery energy storage system balance control method and device based on PWM duty ratio modulation. Belongs to the battery system control field. Voltage information of all single batteries in the energy storage system is collected in real time, total loop current, system operation modes and temperature distribution are monitored synchronously, a controller dynamically calculates charge state values of all the single batteries based on the information, a target object to be balanced is recognized, and meanwhile a global battery consistency evaluation index is established. The method dynamically adjusts the maximum allowable equalization current and generates an equalization topology. The modulation frequency, the duty ratio spectrum amplitude and the phase distribution are adjusted through PWM, and the maximum duty ratio is limited. All the operation instruction sets take effect synchronously at the starting moment of the next equalization period. Besides, the efficiency and working condition mapping table in the historical learning library is synchronously updated to form a closed-loop self-evolution optimization mechanism, so that the balance efficiency optimization of the system in a dynamic scene is realized, and the voltage overshoot is ensured to be within a set threshold value.

The invention provides a device for inhibiting drain-source overvoltage and overcurrent through active gate drive of a silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), aiming at solving the problem of voltage or current overshoot caused by circuit parasitic parameters in a high-speed switching process of the SiC MOSFET and simultaneously considering the switching speed and energy loss balance. According to the device, drain-source voltage vdc and direct-current bus voltage of the SiC MOSFET are collected to serve as feedback signals, and gate driving voltage and equivalent gate resistance are dynamically adjusted; in a key stage (a Miller plateau switching-on period and a voltage rising period switching-off period) of a switch transient state, a gate resistance network is switched through a logic control circuit, and suppression of drain current overshoot and drain-source voltage overshoot is realized. Simulation verification shows that the device can reduce voltage overshoot by 20%-30% and current overshoot by 25%-60%, only a single voltage feedback channel is needed, the cost is obviously lower than that of a traditional multi-signal acquisition active gate driving scheme, and the device is suitable for a high-efficiency SiC MOSFET power converter.

The invention discloses a control method for fast switching from heavy load to light load of an LCC resonant converter, and relates to the technical field of power electronic converter control. The method comprises the following steps: S1, building an LCC resonant converter; s2, monitoring load current in real time, and identifying a load abrupt change signal; s3, calculating coordinates of an intersection point of the current working point and the target light load trajectory according to the state trajectory model; and S4, triggering a switch tube advanced turn-off instruction at the switching point, and switching the driving system to a light load mode along the transition track. According to the invention, a specific switching period is introduced during frequency switching, so that the resonant converter can be rapidly and stably switched from a heavy-load working mode to a light-load working mode. According to the switching mode, the voltage overshoot phenomenon during load sudden change can be effectively suppressed, the response time can be shortened, and the dynamic response performance of the resonant converter can be greatly improved. Compared with a traditional scheme, the system stability is improved, and the power loss is reduced.

The invention discloses a constant voltage ring and constant current ring automatic switching circuit and a linear power supply, and belongs to the technical field of electrical variable adjustment. Wherein the constant voltage ring comprises a differential sampling link, a direct current bias link and an integration link; the constant current loop comprises a proportional element and an integral element. A differential sampling circuit is arranged in the constant-voltage ring to sample the output voltage of the power supply, the differential sampling circuit is matched with a direct-current bias link to provide superposed voltage for an integration link in the constant-voltage ring, the superposed voltage is compared with set voltage, the switching-in time of the constant-voltage ring is determined, and therefore the constant-current ring can be switched to the constant-voltage ring in advance, and the switching-in time of the constant-voltage ring is determined. And the problem of overshoot of the output voltage of the power supply is prevented. According to the linear power supply, in the process of switching from the constant current stage to the constant voltage stage, the output voltage can be smoothly transited to the target voltage, the condition of step-shaped rising cannot occur, and the switching process is natural and rapid.

The invention discloses a shared charging equipment instruction control system and method based on multi-mode signal fusion, particularly relates to the field of shared charging control, solves the protocol out-of-step overshoot risk, takes a handshake millisecond window as a switching-in port, and synchronously checks a digital message and a physical transient state through surge energy and thermal inertia double indexes. Locking an instruction missing risk before a driving link; the residual error-message joint judgment captures hidden abnormity in real time at a power issuing node, a rollback channel is rapidly pulled back to a safe power grade, and brand-channel mapping logic is triggered to re-plan output resources; a threshold bin dynamically tightens a threshold according to a target-actual measurement power difference, so that prediction and actual measurement are gradually fitted, and new prior is written back to a forward inference link; high-voltage overshoot and power failure of the whole row are avoided, a billing curve is completely matched with a charging curve, high turnover of a port can be kept in a passenger flow peak, the safety is integrally improved, the service life of hardware is prolonged, and the user experience is improved.

The invention provides a method for reducing output voltage overshoot of a full-bridge DCDC converter, relates to the field of converters, and solves the technical problem that the input voltage of an isolated full-bridge DC-DC converter is unstable. The method comprises the following steps: acquiring an input voltage signal, an output voltage signal and a load current signal of the converter to form an original signal; based on the preprocessed input voltage signal, the working state of the converter is judged by combining a dynamic threshold value and a critical condition for triggering open loop of a control loop, and when it is judged that the input voltage drops, a reduced output voltage reference value is generated. When the input voltage is normal, the output voltage reference value is kept at a rated value. The reduced output voltage reference value or the voltage reference value is kept at a rated value and the preprocessed output voltage signal are subtracted, and an error signal is obtained. And taking the preprocessed load current signal as a feedforward quantity to generate a PWM driving signal. The method and the device are used for scenes with high voltage stability requirements.

The invention belongs to the field of semiconductor devices, provides a gallium nitride high-electron-mobility transistor integrated with a Schottky diode and a preparation method of the gallium nitride high-electron-mobility transistor, and aims to solve the problem that a conventional gallium nitride high-electron-mobility transistor (GaN HEMT) lacks a body diode. According to the invention, monolithic integration of the SBD and the GaN HEMT is realized through structural design, a low-impedance path is provided for reverse current, and the integration mode not only retains the original high performance characteristic of a GaN device, but also additionally endows the GaN device with reverse conduction and reverse recovery capabilities; moreover, through the structural design, the SBD can be synchronously completed on the basis of the existing GaN HEMT process, a special process or new equipment is not needed, and the cost is effectively controlled while the performance improvement is ensured; compared with an external interconnection diode scheme, parasitic inductance caused by lead bonding is eliminated, the voltage overshoot and ringing phenomena in the switching process are remarkably reduced, high-frequency switching application is facilitated, and switching loss can be greatly reduced.

The invention relates to a BOOT converter soft start circuit for a large-area-array image sensor, and belongs to the technical field of power management. The technical problem of output voltage overshoot caused by overlarge difference between reference voltage and feedback voltage when the BOOST converter is started is mainly solved. According to the technical scheme, a soft start module generates a linearly-increased soft start voltage VSS, and when the VSS is smaller than a reference voltage VREF, the VREF is replaced to be input into an error amplifier, so that a feedback voltage VFB linearly rises along with the VSS, and the surge of an inductive current is restrained. Technical effects include thoroughly eliminating voltage overshoot, maintaining optimal performance parameters of the system, providing programmable startup characteristics, enhancing system reliability, and simplifying integration complexity.

The application discloses a kind of LDO circuits, including operational amplifier, voltage division sampling circuit and power tube that are electrically connected with each other, wherein, it further includes an overshoot adjusting circuit, which is connected with operational amplifier, including capacitor, first MOS tube, second MOS tube and first mirror unit, one end of capacitor is connected with power supply, the other end is connected with the grid of first MOS tube, first mirror unit is commonly connected, the source and drain of first MOS tube are connected with operational amplifier, the source of second MOS tube is connected with power supply, an external voltage is input to the grid of second MOS tube, the drain of second MOS tube is connected with first mirror unit, and first mirror unit mirrors the current on the circuit of second MOS tube to the circuit on capacitor.The LDO circuit of the application smoothly solves the problem of overshoot of output voltage during power-on process, prevents the damage of circuit device due to voltage overshoot during operation, and improves the reliability of the entire circuit.

The application provides a permanent magnet synchronous motor weak magnetic transition area smooth transition method and system based on a reference voltage adaptive reduction, and belongs to the field of permanent magnet synchronous motor control. The method solves the problem of torque fluctuation caused by voltage overshoot in the existing voltage closed-loop weak magnetic control with a fixed reference voltage. The method comprises the following steps: obtaining a theoretical maximum torque according to a preset current limit value by simultaneously solving a torque equation and a current constraint equation; calculating torque ratio parameters and speed ratio parameters in real time; calculating a reference voltage adaptive coefficient based on an adaptive smooth transition algorithm; multiplying the adaptive coefficient by the inscribed circle voltage of an inverter to dynamically adjust the reference value of the voltage closed loop, so that smooth control of the weak magnetic transition area is realized. The method is mainly used in the fields of electric aircrafts, electric vehicles and robots.

An embodiment of the present invention discloses a high-frequency equivalent circuit, a modeling method and a modeling device for the high-frequency equivalent circuit. The circuit includes: an equivalent resistor, an equivalent capacitor and a drain parasitic inductor connected in series, and is connected in parallel with an absorption circuit formed by connecting a parasitic inductor, an absorption resistor and an absorption capacitor in series, and then connected in series with an upper transistor conduction equivalent resistor, a power loop parasitic inductor, a DC link equivalent series resistor, a power supply, a power loop resistor and a shunt resistor. Through the present invention, the problem in the related art that the Cascode-type GaN device causes large oscillations at high switching frequencies, resulting in serious voltage overshoot, additional power loss, electromagnetic interference noise, and even device breakdown, reducing the reliability of the system, is solved, and the technical effects of quantitatively suppressing switching oscillations and matching the parameters for suppressing oscillations, ensuring the safe and reliable operation of the GaN device and fully exerting the high-frequency switching characteristics of the GaN power device are achieved.

An integrated circuit (IC) includes an array of compute units and control circuitry for mitigating supply voltage overshoot. Each compute unit contributes to an aggregate time rate of change of current drawn by the IC when transitioning between processing and non-processing states. The control circuitry is configurable to stagger when each compute unit is eligible to transition from processing data to not processing data relative to other compute units, thereby limiting the negative rate of change of current through inductive loads of the IC and preventing voltage overshoot above a maximum threshold. The control circuitry may be distributed among the compute units and configured using statically reconfigurable parameters that specify the maximum number of compute units permitted to transition concurrently and the minimum number of clock cycles between successive group transitions.

The invention discloses a power output control method and system, a storage medium and a program product, and relates to the field of power control. The method comprises the steps that firstly, a control system obtains the output voltage and the output current of a power supply end at the current moment, the feedback voltage of a load end and the set target voltage of the load end at the next moment, and a reference line impedance value is accurately calculated based on the difference value of the output voltage and the feedback voltage and the output current; then, the control system determines a compensation coefficient according to the voltage deviation absolute value and the current change rate; the virtual resistor compensates the direct current impedance of the line in a targeted manner, the voltage drop during continuous high-power output is reduced, the stable voltage quality of the load end is ensured, the dynamic damping characteristic is provided in the virtual inertia link, and the voltage overshoot or undershoot phenomenon easily occurring due to load sudden change is effectively inhibited; finally, the control system superposes the comprehensive voltage correction amount to the power supply reference voltage, thereby realizing fine adjustment of the power supply output voltage, and improving the reliability and quality of electric energy supply.

The application discloses a short-circuit recovery voltage limiting method for a three-stage direct-current generator, which detects output voltage U0 of the three-stage direct-current generator and load current i L to determine the state of the load, adjusts the output state of the three-stage direct-current generator according to the state of the load by using an asymmetric half-bridge excitation topology, detects the generation output voltage and the load current to determine characteristic states such as a short-circuit state, a short-circuit recovery state and a first voltage peak falling edge after short-circuit recovery, and closes upper and lower excitation power tubes in combination with the asymmetric half-bridge during short-circuit recovery, so that the two power tubes are opened only when the first voltage peak falls to a voltage undervoltage value after short-circuit recovery, and voltage overshoot during short-circuit recovery of the three-stage direct-current generator is limited to the maximum extent, and the safety of a power supply system is ensured.

The present application relates to the technical field of voltage stabilizing circuit, in particular to a low-cost fast transient response linear voltage stabilizer circuit, comprising an LDO main loop module and a transient response enhancement feedback circuit, the transient response enhancement feedback circuit is coupled between the error amplifier output end and the power tube gate end, a fast feedback path is constructed through two groups of coupling capacitors, directly acting on the power tube gate, and cooperating with the clamping unit to accelerate the node voltage change. The present application cancels the complex modules such as comparator and band gap reference in the traditional scheme, without relying on large off-chip capacitors, the voltage overshoot and undershoot during load jump can be effectively suppressed, the circuit structure is simple, the static power consumption is low, the layout area is small, the manufacturing cost is low, and the system reliability and integration are high.

The invention relates to a cascaded SiC power device, and relates to the field of semiconductor power devices. According to the technical scheme, through the innovative structure that the first capacitor is arranged between the gate and the drain of the Si MOS tube and the second capacitor is arranged between the gate and the source, the switching speed of the cascaded SiC power device can be accurately regulated and controlled. Specifically, compared with a traditional scheme of increasing switch delay by adjusting grid resistance and introducing extra loss by adding an external RC buffer circuit, the scheme can avoid extra energy loss and realize consideration of performance and energy efficiency while ensuring low switch delay; moreover, the scheme can effectively suppress the undesirable phenomena of voltage overshoot, ringing, electromagnetic interference and the like, remarkably reduces the voltage stress of the power device, improves the working stability of the device, prolongs the service life of the device, and enhances the overall reliability of a power electronic system. In addition, according to the scheme, the implementation mode of switching speed regulation and control is simplified, convenience is provided for designers to carry out device type selection and circuit design, and the design efficiency of a power electronic system is improved.

The invention provides an LDO overshoot and undershoot suppression circuit, and belongs to the field of integrated circuits. The LDO overshoot and undershoot suppression circuit comprises an LDO used for providing a stable output voltage; the overshoot suppression circuit is used for suppressing overshoot of the LDO; the undershoot suppression circuit is used for suppressing the undershoot of the LDO; the overshoot suppression circuit comprises a first comparator and a fifth transistor, the inverting input end of the first comparator is electrically connected with the output end of the LDO, the non-inverting input end of the first comparator is connected with a first reference voltage, and the output end of the first comparator is electrically connected with the grid electrode of the fifth transistor. The undershoot suppression circuit comprises a second comparator, a first transistor, a second transistor and a third transistor, the non-inverting input end of the second comparator is connected with a second reference voltage, the inverting input end of the second comparator is electrically connected with the output end of the LDO, and the output end of the second comparator is electrically connected with the grid electrode of the first transistor. According to the LDO overshoot and undershoot suppression circuit, LDO overshoot and undershoot can be suppressed.

The invention relates to a circuit and a method for reducing starting voltage overshoot of an optocoupler type isolation feedback switching power supply, and relates to the field of optocoupler type isolation feedback switching power supplies. The starting process of the optocoupler type isolation feedback switching power supply is managed through the starting controller Startup-Control, smooth establishment of a loop can be achieved when the output voltage VOUT of the switching power supply reaches a preset value, the establishment process of a loop direct-current working point after the output voltage VOUT reaches the preset value is omitted through coordination and cooperation of the constant current source IS, the comparator CMP and the filter, and the stability of the loop direct-current working point is improved. Therefore, the loop stabilization time is shortened, and the overshoot amplitude of the output voltage VOUT is reduced.

This invention relates to a circuit and method for reducing startup voltage overshoot in an optocoupler-type isolated feedback switching power supply, and relates to the field of optocoupler-type isolated feedback switching power supplies. The invention manages the startup process of the optocoupler-type isolated feedback switching power supply through a startup controller, Startup-Control, enabling smooth loop establishment when the switching power supply's output voltage VOUT reaches a preset value. By coordinating a constant current source IS, a comparator CMP, and a filter Filter, the loop's DC operating point establishment process after the output voltage VOUT reaches the preset value is eliminated, thereby shortening the loop stabilization time and reducing the overshoot amplitude of the output voltage VOUT.

Disclosed in the present invention are an LDO circuit and method for mitigating output overshoot. The LDO circuit comprises a comparator. A first amplifier is connected to a low static power consumption circuit by means of a first NMOS transistor; a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage; the comparator is connected to the low static power consumption circuit by means of a fourth PMOS transistor, and compares a second reference voltage and a driving voltage that are generated inside a circuit, to control the turning-on and turning-off of a fourth PMOS transistor switch controller; on the basis of a first reference voltage and the feedback voltage, the first amplifier outputs a first voltage signal, and outputs the driving voltage by means of the first NMOS transistor and the low static power consumption circuit; on the basis of an external input voltage and the driving voltage, a second PMOS transistor generates and controls an output voltage; and the driving voltage is modulated by means of a comparator circuit to control a power transistor, so as to mitigate output voltage overshoot during slow start-up under no-load conditions and output voltage overshoot during no-load hot-swapping.

The invention provides a switching power supply control device, method and system, electronic equipment and a storage medium. The switching power supply control device is connected with a switching power supply circuit; the switching power supply control device comprises a control module, a switch module, an acceleration capacitor, a detection module and a feedback module. When the switching power supply circuit is started, the acceleration capacitor is connected to the output positive electrode of the switching power supply circuit, so that the starting overshoot of the switching power supply circuit can be inhibited through the acceleration capacitor, the load regulation rate of the switching power supply circuit is monitored, and when the load regulation rate is detected to be too large, the switching power supply circuit is started. The acceleration capacitor is considered to influence the output stability of the switching power supply circuit, and at the moment, the acceleration capacitor is disconnected, so that the output voltage overshoot can be effectively inhibited, and stable output can be maintained under different load conditions.

The application provides a variable driving parameter silicon carbide MOSFET active driving method, circuit and device. The active driving method comprises: in the on process, a power supply is controlled to apply a first weak driving level in a first time period and a first strong driving level in other time periods, the starting time of the first time period is the time when the silicon carbide MOSFET enters the Miller platform, and the ending time is the time when the drain current reaches the current overshoot peak value; in the judgment process, the power supply is controlled to apply a second weak driving level in a third time period and a second strong driving level in other time periods, the starting time of the third time period is the time when the drain-source voltage is equal to the DC bus voltage, and the ending time is the time when the drain-source voltage reaches the voltage overshoot peak value. The method has good versatility and high engineering application value, reduces the additional switching loss caused by weak driving, maintains high switching speed while ensuring the overshoot suppression effect, and thus realizes a better compromise between overshoot, loss and switching time.

The utility model provides a silicon carbide VDMOS with high drain voltage overshoot resistance. The silicon carbide VDMOS is characterized in that a first drift layer is connected to a silicon carbide substrate; the first N-type region is connected to the first drift layer; the second N-type region is connected to the first N-type region; the P-type well region is connected to the first N-type region, the P-type well region is connected to the second N-type region, and an N-type source region is arranged on the P-type well region; a first through hole is formed in the P-type well region; the second drift layer is arranged in the first through hole, the second drift layer is connected to the first N-type region, and a second through hole is formed in the second drift layer; the insulating layer is connected with the first N-type region and is arranged in the second through hole; the gate dielectric layer is respectively connected with the N-type source region, the P-type well region, the second drift layer and the insulating layer; the source metal layer is respectively connected with the second N-type region, the P-type well region and the N-type source region; the gate metal layer is connected to the gate dielectric layer; the drain metal layer is connected to the silicon carbide substrate, so that impact of drain voltage overshoot on the grid is suppressed, heat concentration is avoided, and the reliability of the device is improved.

The embodiments of the present application relate to the field of power management technology, and more particularly to a low-voltage dropout linear regulator, chip, and electronic device, including a voltage adjustment circuit and an acceleration circuit, wherein the acceleration circuit is connected to the voltage adjustment circuit; the voltage adjustment circuit is used to adjust the output voltage of the low-voltage dropout linear regulator to a target voltage after the output voltage of the low-voltage dropout linear regulator overshoots or undershoots; and the acceleration circuit is used to accelerate the voltage adjustment circuit's adjustment of the low-voltage dropout linear regulator's output voltage when the output voltage of the low-voltage dropout linear regulator is outside a reference voltage range, and stop accelerating the voltage adjustment circuit's adjustment of the low-voltage dropout linear regulator's output voltage after a target duration, wherein the target voltage is within the reference voltage range and the output voltage of the low-voltage dropout linear regulator is outside the reference voltage range when overshooting or undershooting. Thus, this solution extends the service life of the low-voltage dropout linear regulator and simplifies the internal design of the low-voltage dropout linear regulator.

The invention provides an LDO overshoot and undershoot suppression method, and belongs to the field of integrated circuits. The LDO overshoot and undershoot suppression method comprises the following steps: an overshoot suppression step: when overshoot occurs in an output voltage, the voltage of an inverted output end of a first comparator is higher than a first reference voltage, the first comparator outputs a low level, a fifth transistor is conducted, and the output voltage is lowered; and an undershoot suppression step: when the output voltage has undershoot, the voltage of the inverted input end of the second comparator is lower than the second reference voltage, the second comparator outputs a high level, the first transistor is conducted, the gate voltage of the third transistor is lowered, the third transistor is conducted, and the output voltage is raised. According to the LDO overshoot and undershoot suppression method, LDO overshoot and undershoot can be suppressed.

The invention relates to the technical field of switching power supply control, and discloses a voltage overshoot suppression circuit and a COT control mode BUCK converter system, and the voltage overshoot suppression circuit comprises a ripple injection module, a drop detection module, a first trigger and a filtering adjustment module. The drop detection module is connected with the first trigger; the first trigger is also connected with the filtering adjustment module; the filtering adjustment module is also connected with the ripple injection module; the ripple injection module is connected with an external conversion circuit; the filtering adjustment module adjusts a time constant for generating the second ripple signal according to the first output signal, so that the descending process of the second ripple signal is matched with that of the first ripple signal, and the situation that negative ripples are injected due to the fact that the first ripple signal is lower than the second ripple signal due to slow descending of the second ripple signal is avoided. Therefore, the number of times of conduction of an upper tube of a power tube in an external conversion circuit is reduced, and the problem of output voltage overshoot of the COT control mode BUCK converter when light load jumps to heavy load is solved.

The invention discloses a starting circuit for suppressing starting overshoot, which is integrated in a DCDC converter and does not need an external expansion special device. The circuit comprises a reference voltage module, a step voltage slow rising module, a timer and an operational amplifier self-bias module. The step voltage slow rising module generates a soft start voltage signal VSTART to a first positive input end of the operational amplifier self-bias module, the reference voltage module outputs a reference voltage VREF to a second positive input end of the operational amplifier self-bias module, and a negative input end of the operational amplifier self-bias module inputs a feedback voltage VFB; the timer outputs a starting enable signal of the operational amplifier self-bias module; the soft start voltage signal VSTART generated by the step voltage slow-rise module realizes that the output voltage in the starting stage of the DCDC converter slowly rises from 0 to a rated value, and starting surge current and voltage overshoot are effectively inhibited.

The present invention provides a hybrid power module comprising a buffer unit and a manufacturing method thereof, the module comprising: a single or a plurality of power subunits embedded in a PCB, each power subunit comprising a copper groove structure, and a Si MOSFET chip and a SiC JFET chip stacked in the copper groove structure; an electrode plate is arranged on the Si MOSFET chip, and one end of the electrode plate is connected with the SiC JFET chip; and the RC buffer unit and the thermosensitive element are arranged on the PCB and are connected with the power subunit. According to the invention, the high-voltage SiC JFET chip and the low-voltage Si MOSFET chip are stacked together, so that parasitic parameters between chips in the power subunit are effectively avoided; the design space is optimized by changing the electrode leading-out mode of the vertical device. The RC buffer unit is integrated near the chip on the PCB, so that dV / dt is effectively suppressed, and voltage overshoot and ringing of the system in the high-frequency switching process are relieved. According to the invention, the thermosensitive element is vertically arranged at the top of the chip, so that the contradiction between the electrical isolation of the temperature sensing detection circuit and the temperature monitoring accuracy of the chip is solved.

A method implemented by a control circuit adaptively controls operating parameters of a switched-mode power supply to compensate for variation in circuit parameters of the switched-mode power supply, such as variation of: an inductance of an inductor, a capacitance of an output capacitor, and variation of a load capacitance coupled to an output of the switched-mode power supply. The control circuit includes a comparison circuit that determines whether or not an output voltage of the switched-mode power supply has exceeded an overshoot threshold, and a switching control circuit that has an input coupled to an output of the comparison circuit. The switching control circuit adaptively adjusts a control variable that controls one or more operational parameters of the switched-mode power supply in conformity with a relationship between a value of the output voltage and a value of the overshoot threshold in response to the output of the comparison circuit.

The embodiment of the invention provides a low-dropout linear regulator circuit, an anti-overshoot circuit and a chip. The low-dropout linear regulator circuit comprises an error amplifier, a power tube, a first resistor, a second resistor, a load capacitor, a load resistor and an anti-overshoot unit, the inverting input end of the error amplifier is used for receiving reference voltage, the non-inverting input end of the error amplifier is connected with the second end of the first resistor and the first end of the second resistor, the second end of the second resistor is grounded, the output end of the error amplifier is connected with the grid electrode of the power tube, and the source electrode of the power tube is connected with a power supply. The drain electrode of the power tube is respectively connected with the first end of the first resistor, the first end of the load capacitor and the first end of the load resistor, the second end of the load capacitor is grounded, and the second end of the load resistor is grounded; and the anti-overshoot unit is electrically connected with the power tube and is used for performing overshoot protection on the low-dropout linear voltage stabilization unit. According to the embodiment of the invention, the output voltage overshoot can be prevented when the load current suddenly changes.