Method for allocating registers for mixed length instruction set

A technology of register allocation and mixed length, applied in the field of compilation, to achieve the effect of strong reliability and improved instruction density

Active Publication Date: 2012-02-22
ZHEJIANG UNIV
View PDF3 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Taking cskyv2 as an example, if a register operand of an instruction is assigned a register of R16~R31, then the instruction will generate a long instruction (except for individual instructions, which will be introduced below); but even if an instruction only uses R0~ The register of R15, it does not necessarily generate a short instruction, because it may use an immediate value beyond the encodable range of a short instruction, or use 3 different operands, etc.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for allocating registers for mixed length instruction set
  • Method for allocating registers for mixed length instruction set
  • Method for allocating registers for mixed length instruction set

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0036] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0037] The invention is an improved register allocation method based on the graph coloring register allocation method. Graph coloring is the traditional and most commonly used method of register allocation. The basic process is as follows figure 1 A brief description of each phase is as follows:

[0038] Rename (Renumber): Before this stage, the intermediate code can refer to an unlimited number of "virtual registers". In this stage, based on data flow analysis, find all lifetimes in the function and assign unique numbers to them. A lifetime begins with one setting of a variable and ends with the last use of that value.

[0039] Construct conflict graph (Build): At this stage, a "conflict graph G" is established. The nodes in G are life periods, and the edges indicate that there is a conflict between the two life period...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a method for allocating registers for a mixed length instruction set. By less revising the conventional graph coloring register allocation method, namely fully utilizing the characteristics of a mixed coding instruction set, codes with higher code density are generated. The method has the characteristics of simplicity, practicability and high in reliability.

Description

technical field [0001] The invention relates to a compiling technology, in particular to a register allocation method for mixed-length instruction sets. Background technique [0002] Embedded systems often adopt RISC architecture, and their instruction sets are generally fixed-length instruction sets, that is, instructions with only a single length. The instruction length is generally an integer number of bytes, for example, a 16-bit instruction and a 32-bit instruction. A longer instruction length can encode more operands, address more registers, or use a larger immediate value, etc., so it generally has better performance; while a shorter instruction length can make the compiled generated Executors are smaller. In order to have high code density of short instructions while having high performance of long instructions, modern RISC processors begin to use two or more instruction sets with mixed codes of different lengths. For example, ARM's thumb2 instruction set and Zhon...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30G06F9/318
Inventor 李莹闫卫斌吴朝晖尹建伟邓水光吴健
Owner ZHEJIANG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap